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From: Alexandru Stefan ISAILA <aisaila@bitdefender.com>
To: "andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Cc: "boris.ostrovsky@oracle.com" <boris.ostrovsky@oracle.com>,
	"jbeulich@suse.com" <jbeulich@suse.com>,
	"tamas@tklengyel.com" <tamas@tklengyel.com>,
	"rcojocaru@bitdefender.com" <rcojocaru@bitdefender.com>,
	"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH v1] hvm/svm: Implement Debug events
Date: Mon, 19 Mar 2018 15:48:42 +0000	[thread overview]
Message-ID: <1521474528.5331.4.camel@bitdefender.com> (raw)
In-Reply-To: <ad8c8516-e6ba-1282-51c6-578570aab37c@citrix.com>

On Lu, 2018-03-19 at 14:22 +0000, Andrew Cooper wrote:
> On 19/03/18 14:07, Alexandru Isaila wrote:
> > 
> > -    case VMEXIT_EXCEPTION_BP:
> > -        inst_len = __get_instruction_length(v, INSTR_INT3);
> > +    case VMEXIT_EXCEPTION_BP:;
> > +        inst_len = vmcb->nextrip - vmcb->rip;
> Sorry, but no.  This will break on older AMD hardware.  You must
> retain
> the __get_instruction_length().
> 
> NextRIP support was only introduced in Gen2 SVM, and we still support
> Gen1.
> 
> ~Andrew
Yes, you are right, I will re-use the __get_instruction_length() and
add support for the ICEBP instruction fort the next version of the
patch. Just did some tests and it works fine for the int3/int $3
instruction length.

Thanks for the heads-up. 

~Alex 
> 
> ________________________
> This email was scanned by Bitdefender
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  reply	other threads:[~2018-03-19 15:48 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-19 14:07 [PATCH v1] hvm/svm: Implement Debug events Alexandru Isaila
2018-03-19 14:22 ` Andrew Cooper
2018-03-19 15:48   ` Alexandru Stefan ISAILA [this message]
2018-03-19 14:48 ` Tamas K Lengyel
2018-03-19 15:01   ` Razvan Cojocaru

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