diff for duplicates of <1521518336-5467-12-git-send-email-sricharan@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index fb15cdd..08e0b97 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -15,7 +15,7 @@ index 2bc5dec..a8dbbf0 100644 status = "disabled"; }; + -+ blsp_dma: dma@7884000 { ++ blsp_dma: dma at 7884000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x7884000 0x2b000>; + interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; @@ -25,7 +25,7 @@ index 2bc5dec..a8dbbf0 100644 + qcom,ee = <0>; + }; + -+ serial_blsp0: serial@78af000 { ++ serial_blsp0: serial at 78af000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x78af000 0x200>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; @@ -35,7 +35,7 @@ index 2bc5dec..a8dbbf0 100644 + status = "disabled"; + }; + -+ serial_blsp2: serial@78b1000 { ++ serial_blsp2: serial at 78b1000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x78b1000 0x200>; + interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; @@ -48,7 +48,7 @@ index 2bc5dec..a8dbbf0 100644 + status = "disabled"; + }; + -+ spi_0: spi@78b5000 { ++ spi_0: spi at 78b5000 { + compatible = "qcom,spi-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; @@ -63,7 +63,7 @@ index 2bc5dec..a8dbbf0 100644 + status = "disabled"; + }; + -+ i2c_0: i2c@78b6000 { ++ i2c_0: i2c at 78b6000 { + compatible = "qcom,i2c-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; @@ -78,7 +78,7 @@ index 2bc5dec..a8dbbf0 100644 + status = "disabled"; + }; + -+ i2c_1: i2c@78b7000 { ++ i2c_1: i2c at 78b7000 { + compatible = "qcom,i2c-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; @@ -93,7 +93,7 @@ index 2bc5dec..a8dbbf0 100644 + status = "disabled"; + }; + -+ qpic_bam: dma@7984000 { ++ qpic_bam: dma at 7984000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x7984000 0x1a000>; + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; @@ -104,7 +104,7 @@ index 2bc5dec..a8dbbf0 100644 + status = "disabled"; + }; + -+ qpic_nand: nand@79b0000 { ++ qpic_nand: nand at 79b0000 { + compatible = "qcom,ipq8074-nand"; + reg = <0x79b0000 0x10000>; + #address-cells = <1>; diff --git a/a/content_digest b/N1/content_digest index 35a8306..5829e11 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,25 +1,8 @@ "ref\01521518336-5467-1-git-send-email-sricharan@codeaurora.org\0" - "From\0Sricharan R <sricharan@codeaurora.org>\0" + "From\0sricharan@codeaurora.org (Sricharan R)\0" "Subject\0[PATCH v3 11/13] ARM: dts: ipq8074: Add peripheral nodes\0" "Date\0Tue, 20 Mar 2018 09:28:54 +0530\0" - "To\0robh+dt@kernel.org" - robh@kernel.org - mark.rutland@arm.com - linux@armlinux.org.uk - andy.gross@linaro.org - david.brown@linaro.org - catalin.marinas@arm.com - will.deacon@arm.com - sboyd@codeaurora.org - bjorn.andersson@linaro.org - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-arm-msm@vger.kernel.org - linux-soc@vger.kernel.org - absahu@codeaurora.org - " marc.zyngier@arm.com\0" - "Cc\0sricharan@codeaurora.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Add serial, i2c, bam, spi, qpic peripheral nodes.\n" @@ -39,7 +22,7 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" "+\n" - "+\t\tblsp_dma: dma@7884000 {\n" + "+\t\tblsp_dma: dma at 7884000 {\n" "+\t\t\tcompatible = \"qcom,bam-v1.7.0\";\n" "+\t\t\treg = <0x7884000 0x2b000>;\n" "+\t\t\tinterrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -49,7 +32,7 @@ "+\t\t\tqcom,ee = <0>;\n" "+\t\t};\n" "+\n" - "+\t\tserial_blsp0: serial@78af000 {\n" + "+\t\tserial_blsp0: serial at 78af000 {\n" "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.4\", \"qcom,msm-uartdm\";\n" "+\t\t\treg = <0x78af000 0x200>;\n" "+\t\t\tinterrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -59,7 +42,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tserial_blsp2: serial@78b1000 {\n" + "+\t\tserial_blsp2: serial at 78b1000 {\n" "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.4\", \"qcom,msm-uartdm\";\n" "+\t\t\treg = <0x78b1000 0x200>;\n" "+\t\t\tinterrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -72,7 +55,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tspi_0: spi@78b5000 {\n" + "+\t\tspi_0: spi at 78b5000 {\n" "+\t\t\tcompatible = \"qcom,spi-qup-v2.2.1\";\n" "+\t\t\t#address-cells = <1>;\n" "+\t\t\t#size-cells = <0>;\n" @@ -87,7 +70,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\ti2c_0: i2c@78b6000 {\n" + "+\t\ti2c_0: i2c at 78b6000 {\n" "+\t\t\tcompatible = \"qcom,i2c-qup-v2.2.1\";\n" "+\t\t\t#address-cells = <1>;\n" "+\t\t\t#size-cells = <0>;\n" @@ -102,7 +85,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\ti2c_1: i2c@78b7000 {\n" + "+\t\ti2c_1: i2c at 78b7000 {\n" "+\t\t\tcompatible = \"qcom,i2c-qup-v2.2.1\";\n" "+\t\t\t#address-cells = <1>;\n" "+\t\t\t#size-cells = <0>;\n" @@ -117,7 +100,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tqpic_bam: dma@7984000 {\n" + "+\t\tqpic_bam: dma at 7984000 {\n" "+\t\t\tcompatible = \"qcom,bam-v1.7.0\";\n" "+\t\t\treg = <0x7984000 0x1a000>;\n" "+\t\t\tinterrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -128,7 +111,7 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\tqpic_nand: nand@79b0000 {\n" + "+\t\tqpic_nand: nand at 79b0000 {\n" "+\t\t\tcompatible = \"qcom,ipq8074-nand\";\n" "+\t\t\treg = <0x79b0000 0x10000>;\n" "+\t\t\t#address-cells = <1>;\n" @@ -149,4 +132,4 @@ "-- \n" QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -72bdd643a75388a16a244f8b3dd918922bac53e2ee2148c70c3fc2595e1b1623 +57e485ffa093268c9906fc56c95ec7b6293f6e9313fac15040829f3e3294bcf8
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