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From: Abhinav Kumar <abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: manojavm-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	Abhinav Kumar <abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	nganji-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
	hoegsberg-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
	jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	chandanu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Subject: [DPU PATCH 1/2] drm/msm/dsi: check video mode engine status before waiting
Date: Sat,  7 Apr 2018 00:50:04 -0700	[thread overview]
Message-ID: <1523087405-18877-1-git-send-email-abhinavk@codeaurora.org> (raw)

Make sure the video mode engine is on before waiting
for the video done interrupt.

Otherwise it leads to silent timeouts increasing display
turn ON time.

Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 7a03a94..24766c3 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -173,6 +173,7 @@ struct msm_dsi_host {
 
 	bool registered;
 	bool power_on;
+	bool enabled;
 	int irq;
 };
 
@@ -986,13 +987,18 @@ static void dsi_set_tx_power_mode(int mode, struct msm_dsi_host *msm_host)
 
 static void dsi_wait4video_done(struct msm_dsi_host *msm_host)
 {
+	u32 ret = 0;
+
 	dsi_intr_ctrl(msm_host, DSI_IRQ_MASK_VIDEO_DONE, 1);
 
 	reinit_completion(&msm_host->video_comp);
 
-	wait_for_completion_timeout(&msm_host->video_comp,
+	ret = wait_for_completion_timeout(&msm_host->video_comp,
 			msecs_to_jiffies(70));
 
+	if (ret <= 0)
+		pr_err("wait for video done failed\n");
+
 	dsi_intr_ctrl(msm_host, DSI_IRQ_MASK_VIDEO_DONE, 0);
 }
 
@@ -1001,7 +1007,7 @@ static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host)
 	if (!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))
 		return;
 
-	if (msm_host->power_on) {
+	if (msm_host->power_on && msm_host->enabled) {
 		dsi_wait4video_done(msm_host);
 		/* delay 4 ms to skip BLLP */
 		usleep_range(2000, 4000);
@@ -2203,7 +2209,7 @@ int msm_dsi_host_enable(struct mipi_dsi_host *host)
 	 *	pm_runtime_put_autosuspend(&msm_host->pdev->dev);
 	 * }
 	 */
-
+	msm_host->enabled = true;
 	return 0;
 }
 
@@ -2219,7 +2225,7 @@ int msm_dsi_host_disable(struct mipi_dsi_host *host)
 	 * Reset to disable video engine so that we can send off cmd.
 	 */
 	dsi_sw_reset(msm_host);
-
+	msm_host->enabled = false;
 	return 0;
 }
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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             reply	other threads:[~2018-04-07  7:50 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-07  7:50 Abhinav Kumar [this message]
2018-04-07  7:50 ` [DPU PATCH 2/2] drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY Abhinav Kumar
2018-04-08  8:01   ` Archit Taneja
2018-04-09 15:28 ` [Freedreno] [DPU PATCH 1/2] drm/msm/dsi: check video mode engine status before waiting Jordan Crouse
     [not found]   ` <20180409152802.GC5491-9PYrDHPZ2Orvke4nUoYGnHL1okKdlPRT@public.gmane.org>
2018-04-09 21:09     ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
     [not found] ` <1523087405-18877-1-git-send-email-abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-11  1:54   ` [DPU PATCH v2 " Abhinav Kumar
     [not found]     ` <1523411647-16840-1-git-send-email-abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-13 20:26       ` Sean Paul
2018-04-13 21:10         ` [Freedreno] " abhinavk
     [not found]           ` <8353aed54639deed0adee6671bbd1895-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-13 22:04             ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
     [not found]               ` <c5c2cbf36c5fabee154eaa03801e71dc-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-16 17:07                 ` Sean Paul
2018-04-16 17:44                   ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
     [not found]                     ` <56ad41e7f95e907943a310d9c657ae4d-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-16 18:50                       ` Sean Paul
2018-04-11  1:54   ` [DPU PATCH v2 2/2] drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY Abhinav Kumar
     [not found]     ` <1523411647-16840-2-git-send-email-abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-13 20:29       ` Sean Paul
2018-04-13 20:52         ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
     [not found]           ` <41fb3b8501b466e40a542066b76004c0-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-16 17:01             ` Sean Paul

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