Re: [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake

[John Spotswood <john.a.spotswood@intel.com>]

On Fri, 2018-04-27 at 14:31 -0700, Oscar Mateo wrote:
> Only enough to achieve HuC authentication. No GuC submission
> or any other feature for the time being.
> 
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_guc.c      | 10 ++++++++--
>  drivers/gpu/drm/i915/intel_guc_fwif.h |  1 +
>  2 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc.c
> b/drivers/gpu/drm/i915/intel_guc.c
> index 116f4cc..133747c 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc
> *guc)
>  
>  	params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER;
>  
> -	params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER |
> -			GUC_CTL_VCS2_ENABLED;
> +	if (INTEL_GEN(dev_priv) >= 11) {
> +		params[GUC_CTL_FEATURE] |=
> GEN11_GUC_CTL_DISABLE_SCHEDULER;
> +	 } else {
> +		params[GUC_CTL_FEATURE] |=
> GUC_CTL_DISABLE_SCHEDULER;
> 
> +		params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED;

Should the OR'ing of GUC_CTL_VCS2_ENABLED be outside of the
conditional?  It looks like the only purpose of the conditional is to
distinguish GEN for the scheduler disable flag.

> +	}
>  
>  	params[GUC_CTL_LOG_PARAMS] = guc->log.flags;
>  
> @@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc)
>  		u32 pgs = intel_guc_ggtt_offset(guc, guc-
> >stage_desc_pool);
>  		u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
>  
> +		GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11);
> +
>  		params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
>  		params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
>  
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
> b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 0867ba7..781c0c0 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -106,6 +106,7 @@
>  #define   GUC_CTL_PREEMPTION_LOG	(1 << 5)
>  #define   GUC_CTL_ENABLE_SLPC		(1 << 7)
>  #define   GUC_CTL_RESET_ON_PREMPT_FAILURE	(1 << 8)
> +#define   GEN11_GUC_CTL_DISABLE_SCHEDULER	(1 << 14)
>  
>  #define GUC_CTL_DEBUG			8
>  #define   GUC_LOG_VERBOSITY_SHIFT	0
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