From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: Tarun Vyas <tarun.vyas@intel.com>, intel-gfx@lists.freedesktop.org
Cc: rodrigo.vivi@intel.com
Subject: Re: [PATCH v3] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update
Date: Mon, 09 Jul 2018 16:46:42 -0700 [thread overview]
Message-ID: <1531180002.4283.8.camel@intel.com> (raw)
In-Reply-To: <20180709212848.115994-1-tarun.vyas@intel.com>
On Mon, 2018-07-09 at 14:28 -0700, Tarun Vyas wrote:
> In commit "drm/i915: Wait for PSR exit before checking for vblank
> evasion", the idea was to limit the PSR IDLE checks when PSR is
> actually supported. While CAN_PSR does do that check, it doesn't
> applies on a per-crtc basis. crtc_state->has_psr is a more granular
> check that only applies to pipe(s) that have PSR enabled.
>
> Currently, the driver supports PSR on port A + transcoder eDP, so
> only pipe A will wait for PSR to go IDLE, as it should, and other
> pipes should return immediately.
>
> Without the has_psr check, non-PSR pipe_updates (pipe B/C in this
> case), end up waiting on PSR pipe (pipe A in this case) to exit PSR,
> which may incur substantial delays for non-PSR pipe updates alongwith
> the fact the it doesn't makes any sense.
>
> Fixes: a608987970b9 ("drm/i915: Wait for PSR exit before checking for
> vblank evasion")
>
> v2: Remove unnecessary parantheses, make checkpatch happy.
There are checkpatch failures in this revision too.
>
> v3: Move the has_psr check to intel_psr_wait_for_idle and commit
> message changes (DK).
>
> Signed-off-by: Tarun Vyas <tarun.vyas@intel.com>
> ---
> drivers/gpu/drm/i915/intel_drv.h | 2 +-
> drivers/gpu/drm/i915/intel_psr.c | 5 ++++-
> drivers/gpu/drm/i915/intel_sprite.c | 2 +-
> 3 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 61e715ddd0d5..3f7fbaeb1ee9 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1923,7 +1923,7 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
> void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool
> debug);
> void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32
> psr_iir);
> void intel_psr_short_pulse(struct intel_dp *intel_dp);
> -int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv);
> +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv, const
> struct intel_crtc_state *crtc_state);
>
> /* intel_runtime_pm.c */
> int intel_power_domains_init(struct drm_i915_private *);
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 23acc9ac8d4d..3691c857cc91 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -717,11 +717,14 @@ void intel_psr_disable(struct intel_dp
> *intel_dp,
> cancel_work_sync(&dev_priv->psr.work);
> }
>
> -int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv)
> +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv, const
> struct intel_crtc_state *crtc_state)
> {
Derive dev_priv from crtc_state and call it new_crtc_state?
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prev parent reply other threads:[~2018-07-09 23:20 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-09 21:28 [PATCH v3] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update Tarun Vyas
2018-07-09 21:46 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update (rev3) Patchwork
2018-07-09 22:02 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-09 23:46 ` Dhinakaran Pandiyan [this message]
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