From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC From: Paul Cercueil Message-Id: <1531237502.17118.3@crapouillou.net> Date: Tue, 10 Jul 2018 17:45:02 +0200 To: Vinod Cc: Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Zubair Lutfullah Kakakhel , Mathieu Malaterre , Daniel Silsby , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org List-ID: TGUgbHVuLiA5IGp1aWwuIDIwMTggw6AgMTk6MTQsIFZpbm9kIDx2a291bEBrZXJuZWwub3JnPiBh IMOpY3JpdCA6Cj4gT24gMDMtMDctMTgsIDE0OjMyLCBQYXVsIENlcmN1ZWlsIHdyb3RlOgo+PiAg VGhlIEpaNDcyNUIgaGFzIG9uZSBETUEgY29yZSBzdGFycmluZyBzaXggRE1BIGNoYW5uZWxzLgo+ PiAgQXMgZm9yIHRoZSBKWjQ3NzAsIGVhY2ggRE1BIGNoYW5uZWwncyBjbG9jayBjYW4gYmUgZW5h YmxlZCB3aXRoCj4+ICBhIHJlZ2lzdGVyIHdyaXRlLCB0aGUgZGlmZmVyZW5jZSBoZXJlIGJlaW5n IHRoYXQgb25jZSBzdGFydGVkLCBpdAo+PiAgaXMgbm90IHBvc3NpYmxlIHRvIHR1cm4gaXQgb2Zm Lgo+IAo+IG9rIHNvIGRpc2FibGUgZm9yIHRoaXMsIHJpZ2h0Li4KPiAKPj4gIEBAIC0yMDQsNiAr MjA1LDggQEAgc3RhdGljIGlubGluZSB2b2lkIAo+PiBqejQ3ODBfZG1hX2NoYW5fZW5hYmxlKHN0 cnVjdCBqejQ3ODBfZG1hX2RldiAqanpkbWEsCj4+ICAgewo+PiAgIAlpZiAoanpkbWEtPnZlcnNp b24gPT0gSURfSlo0NzcwKQo+PiAgIAkJano0NzgwX2RtYV9jdHJsX3dyaXRlbChqemRtYSwgSlpf RE1BX1JFR19EQ0tFUywgQklUKGNobikpOwo+PiAgKwllbHNlIGlmIChqemRtYS0+dmVyc2lvbiA9 PSBJRF9KWjQ3MjVCKQo+PiAgKwkJano0NzgwX2RtYV9jdHJsX3dyaXRlbChqemRtYSwgSlpfRE1B X1JFR19EQ0tFLCBCSVQoY2huKSk7Cj4gCj4gYnV0IHlvdSBhcmUgd3JpdGluZyB0byBhIGRpZmZl cmVudCByZWdpc3RlciBoZXJlLi4KClllcy4gU29DcyA+PSBKWjQ3NzAgaGF2ZSB0aGUgRENLRSBy ZWFkLW9ubHkgcmVnaXN0ZXIsIGFuZCBEQ0tFUy9EQ0tFQyAKdG8gc2V0L2NsZWFyIGJpdHMgaW4g RENLRS4KT24gSlo0NzI1QiwgRENLRSBpcyByZWFkL3dyaXRlLCBidXQgdGhlIHplcm9zIHdyaXR0 ZW4gYXJlIGlnbm9yZWQgKGF0IApsZWFzdCB0aGF0J3Mgd2hhdCB0aGUKZG9jdW1lbnRhdGlvbiBz YXlzKS4KCj4gLS0KPiB+Vmlub2QKClRoYW5rcywKLVBhdWwKLS0tClRvIHVuc3Vic2NyaWJlIGZy b20gdGhpcyBsaXN0OiBzZW5kIHRoZSBsaW5lICJ1bnN1YnNjcmliZSBkbWFlbmdpbmUiIGluCnRo ZSBib2R5IG9mIGEgbWVzc2FnZSB0byBtYWpvcmRvbW9Admdlci5rZXJuZWwub3JnCk1vcmUgbWFq b3Jkb21vIGluZm8gYXQgIGh0dHA6Ly92Z2VyLmtlcm5lbC5vcmcvbWFqb3Jkb21vLWluZm8uaHRt bAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jul 2018 17:45:14 +0200 (CEST) Received: from outils.crapouillou.net ([89.234.176.41]:53092 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23994272AbeGJPpH6c70- convert rfc822-to-8bit (ORCPT ); Tue, 10 Jul 2018 17:45:07 +0200 Date: Tue, 10 Jul 2018 17:45:02 +0200 From: Paul Cercueil Subject: Re: [PATCH 06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC To: Vinod Cc: Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Zubair Lutfullah Kakakhel , Mathieu Malaterre , Daniel Silsby , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org Message-Id: <1531237502.17118.3@crapouillou.net> In-Reply-To: <20180709171458.GL22377@vkoul-mobl> References: <20180703123214.23090-1-paul@crapouillou.net> <20180703123214.23090-7-paul@crapouillou.net> <20180709171458.GL22377@vkoul-mobl> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: 8BIT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1531237507; bh=WjTJmSBBrurN9JyF9IyWDMyPaD+mqwPGq8mYopQDoG8=; h=Date:From:Subject:To:Cc:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding; b=DqSrVO4z5BhlGLAOU7Z7L7XLCxV2kHd9ITCUDKWOvlkRE+7O0nP2/683PCeGYv3cWc3IJg75AogCbLYK/lEnrvC2CDpXNh/7qnaTqTTlxitVmskMLN6u8CHblLLIT36BaR2eRDLMn7z9CBmhWFHhg82K+V0WC6boUZNfTN4v+K0= Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 64760 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: paul@crapouillou.net Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Le lun. 9 juil. 2018 à 19:14, Vinod a écrit : > On 03-07-18, 14:32, Paul Cercueil wrote: >> The JZ4725B has one DMA core starring six DMA channels. >> As for the JZ4770, each DMA channel's clock can be enabled with >> a register write, the difference here being that once started, it >> is not possible to turn it off. > > ok so disable for this, right.. > >> @@ -204,6 +205,8 @@ static inline void >> jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma, >> { >> if (jzdma->version == ID_JZ4770) >> jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKES, BIT(chn)); >> + else if (jzdma->version == ID_JZ4725B) >> + jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKE, BIT(chn)); > > but you are writing to a different register here.. Yes. SoCs >= JZ4770 have the DCKE read-only register, and DCKES/DCKEC to set/clear bits in DCKE. On JZ4725B, DCKE is read/write, but the zeros written are ignored (at least that's what the documentation says). > -- > ~Vinod Thanks, -Paul