Re: System Clock runaway on Xilinx platform

[khollan <khollan@daktronics.com>]

jozsef imrek wrote:
> 
> 
> kevin, how do you get that 175 MHz PLB?
> 
> it should not matter, since the wall clock is derived from the
> cpu clock, but i suspect that your cpu clock is just twice the
> PLB clock, thus it is not 300 MHz, but 350 MHz. this would explain
> the time drift, as
> 
>         300 s * (350 MHz / 300 MHz) = 350 s   (obviously :)
> 
> so here is the extra 50 secs in every 5 minutes.
> 
> 
> 
> -- 
> mazsi
> 
> 

Thanks to an email by jozef imrek I realized that I'm an idiot.  To get the
CPU clock I multiply the PLB X 2 which is 175MHz X 2 = 350 MHz not 300MHz, I
guess I had a brain fart in calculation.  I changed the xparameters to 350
and it seems to be keeping time, I haven't tested it for very long but it's
doing a lot better than before.  Thanks to him I didn't have to wait 45 min
to rebuild the bit stream and probe the clocks.
Thanks Kevin
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