diff for duplicates of <1535200.sepIlriAJS@phil> diff --git a/a/1.txt b/N1/1.txt index 93ccff1..ff7a763 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -285,14 +285,14 @@ rockchip_usb_phy_base *base, +/* + * Enable the bypass of uart2 data through the otg usb phy. + * Original description in the TRM. -+ * 1. Disable the OTG block by setting OTGDISABLE0 to 1’b1. ++ * 1. Disable the OTG block by setting OTGDISABLE0 to 1?b1. + * 2. Disable the pull-up resistance on the D+ line by setting -+ * OPMODE0[1:0] to 2’b01. ++ * OPMODE0[1:0] to 2?b01. + * 3. To ensure that the XO, Bias, and PLL blocks are powered down in Suspend -+ * mode, set COMMONONN to 1’b1. -+ * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1’b0. -+ * 5. Set BYPASSSEL0 to 1’b1. ++ * mode, set COMMONONN to 1?b1. ++ * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1?b0. ++ * 5. Set BYPASSSEL0 to 1?b1. + * 6. To transmit data, controls BYPASSDMEN0, and BYPASSDMDATA0. + * To receive data, monitor FSVPLUS0. + * diff --git a/a/content_digest b/N1/content_digest index 8de792e..50c1355 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,12 +1,7 @@ - "From\0Heiko Stuebner <heiko@sntech.de>\0" + "From\0heiko@sntech.de (Heiko Stuebner)\0" "Subject\0[PATCH v5] phy: rockchip-usb: add handler for usb-uart functionality\0" "Date\0Tue, 26 Jan 2016 20:00:58 +0100\0" - "To\0kishon@ti.com\0" - "Cc\0linux-arm-kernel@lists.infradead.org" - linux-kernel@vger.kernel.org - linux-rockchip@lists.infradead.org - arnd@arndb.de - " romain.perier@gmail.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Most newer Rockchip SoCs provide the possibility to use a usb-phy\n" @@ -296,14 +291,14 @@ "+/*\n" "+ * Enable the bypass of uart2 data through the otg usb phy.\n" "+ * Original description in the TRM.\n" - "+ * 1. Disable the OTG block by setting OTGDISABLE0 to 1\342\200\231b1.\n" + "+ * 1. Disable the OTG block by setting OTGDISABLE0 to 1?b1.\n" "+ * 2. Disable the pull-up resistance on the D+ line by setting\n" - "+ * OPMODE0[1:0] to 2\342\200\231b01.\n" + "+ * OPMODE0[1:0] to 2?b01.\n" "+ * 3. To ensure that the XO, Bias, and PLL blocks are powered down in \n" "Suspend\n" - "+ * mode, set COMMONONN to 1\342\200\231b1.\n" - "+ * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1\342\200\231b0.\n" - "+ * 5. Set BYPASSSEL0 to 1\342\200\231b1.\n" + "+ * mode, set COMMONONN to 1?b1.\n" + "+ * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1?b0.\n" + "+ * 5. Set BYPASSSEL0 to 1?b1.\n" "+ * 6. To transmit data, controls BYPASSDMEN0, and BYPASSDMDATA0.\n" "+ * To receive data, monitor FSVPLUS0.\n" "+ *\n" @@ -434,4 +429,4 @@ "-- \n" 2.6.4 -0c199ebcd8437d18e8dbf8a65f97d0b2520f479ecca07f645cbdcfe5993ed3f3 +3179e7cadc06970cc35dafd3a8bcad198d4445ca29d0d4ea4ef833e0f9a48f0e
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