From: "Benoît Thébaudeau" <benoit.thebaudeau@advansee.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] ROM_SI_REV on MX5
Date: Tue, 21 Aug 2012 00:20:24 +0200 (CEST) [thread overview]
Message-ID: <1537866211.2613888.1345501224399.JavaMail.root@advansee.com> (raw)
In-Reply-To: <CAKGA1bmkz9FFuD-prYDnr9fJ1Zpwtk5Ms_0rUi=YD8CV7zmp2w@mail.gmail.com>
Hi Matt,
> Can anyone tell me where this offset is in relation to, or what it's
> actually meant to be?
>
> Some parts of U-Boot read it out but I can't figure any part of the
> docs that refers to this magic 0x48 offset or what it could be (or
> what it should be when you read it out)?
See "Figure 9-1. Internal ROM and RAM Memory Map" in the i.MX51 RM. This is the
only reference to it that I find in the RM. All the details probably come from
FSL's code. I think that it's close to IIM.SREV, if not the same. It's supposed
to be a ROM version, but it's used like a silicon/tapeout revision.
Best regards,
Beno?t
next prev parent reply other threads:[~2012-08-20 22:20 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-20 21:40 [U-Boot] ROM_SI_REV on MX5 Matt Sealey
2012-08-20 22:20 ` Benoît Thébaudeau [this message]
2012-08-20 22:27 ` Matt Sealey
2012-08-20 22:47 ` Benoît Thébaudeau
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