diff for duplicates of <1541732.nlEXTHQe9F@wasted.cogentembedded.com> diff --git a/a/1.txt b/N1/1.txt index 298fc43..64212c1 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -28,7 +28,7 @@ Index: renesas/arch/arm/boot/dts/r8a7792.dtsi clock-output-names = "hscif1", "hscif0", "scif3", "scif2", "scif1", "scif0"; }; -+ mstp8_clks: mstp8_clks@e6150990 { ++ mstp8_clks: mstp8_clks at e6150990 { + compatible = "renesas,r8a7792-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; @@ -37,6 +37,6 @@ Index: renesas/arch/arm/boot/dts/r8a7792.dtsi + clock-indices = <R8A7792_CLK_ETHERAVB>; + clock-output-names = "etheravb"; + }; - mstp9_clks: mstp9_clks@e6150994 { + mstp9_clks: mstp9_clks at e6150994 { compatible = "renesas,r8a7792-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/a/content_digest b/N1/content_digest index 8323d0e..2b5c976 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,15 +1,8 @@ "ref\03308853.O8HBuWdbK9@wasted.cogentembedded.com\0" - "From\0Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>\0" + "From\0sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)\0" "Subject\0[PATCH 1/2] ARM: dts: r8a7792: add EtherAVB clocks\0" "Date\0Tue, 05 Jul 2016 00:22:38 +0300\0" - "To\0horms@verge.net.au" - linux-renesas-soc@vger.kernel.org - robh+dt@kernel.org - mark.rutland@arm.com - " devicetree@vger.kernel.org\0" - "Cc\0magnus.damm@gmail.com" - linux@arm.linux.org.uk - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Add the EtherAVB clock and its parent, HP clock to the R8A7792 device tree.\n" @@ -42,7 +35,7 @@ " \t\t\tclock-output-names = \"hscif1\", \"hscif0\", \"scif3\",\n" " \t\t\t\t\t \"scif2\", \"scif1\", \"scif0\";\n" " \t\t};\n" - "+\t\tmstp8_clks: mstp8_clks@e6150990 {\n" + "+\t\tmstp8_clks: mstp8_clks at e6150990 {\n" "+\t\t\tcompatible = \"renesas,r8a7792-mstp-clocks\",\n" "+\t\t\t\t \"renesas,cpg-mstp-clocks\";\n" "+\t\t\treg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;\n" @@ -51,8 +44,8 @@ "+\t\t\tclock-indices = <R8A7792_CLK_ETHERAVB>;\n" "+\t\t\tclock-output-names = \"etheravb\";\n" "+\t\t};\n" - " \t\tmstp9_clks: mstp9_clks@e6150994 {\n" + " \t\tmstp9_clks: mstp9_clks at e6150994 {\n" " \t\t\tcompatible = \"renesas,r8a7792-mstp-clocks\",\n" " \t\t\t\t \"renesas,cpg-mstp-clocks\";" -380024c56f1c881e4fde833a8e046b420d76680fc0b93d4209c16d80cef8944e +d114813cbcf784ffd47555a0f4404da104a0b12d2f8484205a03f5ab31e82d4f
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