[Qemu-devel] [PATCH v1 1/5] cpu: introduce die, the new cpu toppolgy emulation level

[Like Xu <like.xu@linux.intel.com>]

Following codes on smp_cores, the smp_dies/nr_dies/die-id is added to
machine and CPUState. In addition to enable_cpuid_0xb, enable_cpuid_0x1f
is introduced to track wether host is a new MCP macine or just ignored.
The number for die level_type on Intel is 5 while core type keeps 2.

Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
 cpus.c                | 1 +
 include/qom/cpu.h     | 1 +
 include/sysemu/cpus.h | 1 +
 qapi/misc.json        | 1 +
 target/i386/cpu.h     | 5 +++++
 5 files changed, 9 insertions(+)

diff --git a/cpus.c b/cpus.c
index b09b702..503558d 100644
--- a/cpus.c
+++ b/cpus.c
@@ -2066,6 +2066,7 @@ static void qemu_dummy_start_vcpu(CPUState *cpu)
 
 void qemu_init_vcpu(CPUState *cpu)
 {
+    cpu->nr_dies = smp_dies;
     cpu->nr_cores = smp_cores;
     cpu->nr_threads = smp_threads;
     cpu->stopped = true;
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 16bbed1..ee53862 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -332,6 +332,7 @@ struct CPUState {
     DeviceState parent_obj;
     /*< public >*/
 
+    int nr_dies;
     int nr_cores;
     int nr_threads;
 
diff --git a/include/sysemu/cpus.h b/include/sysemu/cpus.h
index 731756d..4243c8f 100644
--- a/include/sysemu/cpus.h
+++ b/include/sysemu/cpus.h
@@ -34,6 +34,7 @@ void qtest_clock_warp(int64_t dest);
 #ifndef CONFIG_USER_ONLY
 /* vl.c */
 /* *-user doesn't have configurable SMP topology */
+extern int smp_dies;
 extern int smp_cores;
 extern int smp_threads;
 #endif
diff --git a/qapi/misc.json b/qapi/misc.json
index 24d20a8..a01a9fe 100644
--- a/qapi/misc.json
+++ b/qapi/misc.json
@@ -3229,6 +3229,7 @@
 { 'struct': 'CpuInstanceProperties',
   'data': { '*node-id': 'int',
             '*socket-id': 'int',
+            '*die-id': 'int',
             '*core-id': 'int',
             '*thread-id': 'int'
   }
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ef41a03..aa2ee8a 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -732,6 +732,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
 #define CPUID_TOPOLOGY_LEVEL_INVALID  (0U << 8)
 #define CPUID_TOPOLOGY_LEVEL_SMT      (1U << 8)
 #define CPUID_TOPOLOGY_LEVEL_CORE     (2U << 8)
+#define CPUID_TOPOLOGY_LEVEL_DIE      (5U << 8)
 
 /* MSR Feature Bits */
 #define MSR_ARCH_CAP_RDCL_NO    (1U << 0)
@@ -1450,6 +1451,9 @@ struct X86CPU {
     /* Compatibility bits for old machine types: */
     bool enable_cpuid_0xb;
 
+    /* Compatibility bits for new machine types: */
+    bool enable_cpuid_0x1f;
+
     /* Enable auto level-increase for all CPUID leaves */
     bool full_cpuid_auto_level;
 
@@ -1475,6 +1479,7 @@ struct X86CPU {
 
     int32_t node_id; /* NUMA node this CPU belongs to */
     int32_t socket_id;
+    int32_t die_id;
     int32_t core_id;
     int32_t thread_id;
 
-- 
1.8.3.1