From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [PATCHv2,1/5] Documentation: dt: edac: Fix Stratix10 IRQ bindings From: thor.thayer@linux.intel.com Message-Id: <1551288445-22335-2-git-send-email-thor.thayer@linux.intel.com> Date: Wed, 27 Feb 2019 11:27:21 -0600 To: bp@alien8.de, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org List-ID: RnJvbTogVGhvciBUaGF5ZXIgPHRob3IudGhheWVyQGxpbnV4LmludGVsLmNvbT4KCkZpeCBTdHJh dGl4MTAgRUNDIGJpbmRpbmdzIHRvIHNwZWNpZnkgb25seSB0aGUgc2luZ2xlCmJpdCBlcnJvci4g T24gU3RyYXRpeDEwIGRvdWJsZSBiaXQgZXJyb3JzIGFyZSBoYW5kbGVkCmFzIFNFcnJvcnMgaW5z dGVhZCBvZiBpbnRlcnJ1cHRzLgpJbmRpY2F0ZSB0aGUgZGlmZmVyZW5jZXMgYmV0d2VlbiB0aGUg QVJNNjQgYW5kIEFSTTMyCkVEQUMgYXJjaGl0ZWN0dXJlIGluIHRoZSBiaW5kaW5ncy4KClNpZ25l ZC1vZmYtYnk6IFRob3IgVGhheWVyIDx0aG9yLnRoYXllckBsaW51eC5pbnRlbC5jb20+Ci0tLQp2 MiBObyBjaGFuZ2UKLS0tCiAuLi4vZGV2aWNldHJlZS9iaW5kaW5ncy9lZGFjL3NvY2ZwZ2EtZWNj bWdyLnR4dCAgICB8IDIzICsrKysrKysrKysrKysrKy0tLS0tLS0KIDEgZmlsZSBjaGFuZ2VkLCAx NiBpbnNlcnRpb25zKCspLCA3IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRp b24vZGV2aWNldHJlZS9iaW5kaW5ncy9lZGFjL3NvY2ZwZ2EtZWNjbWdyLnR4dCBiL0RvY3VtZW50 YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9lZGFjL3NvY2ZwZ2EtZWNjbWdyLnR4dAppbmRleCA1 NjI2NTYwYTZjZmQuLmEwYWM1MGUxNTkxMiAxMDA2NDQKLS0tIGEvRG9jdW1lbnRhdGlvbi9kZXZp Y2V0cmVlL2JpbmRpbmdzL2VkYWMvc29jZnBnYS1lY2NtZ3IudHh0CisrKyBiL0RvY3VtZW50YXRp b24vZGV2aWNldHJlZS9iaW5kaW5ncy9lZGFjL3NvY2ZwZ2EtZWNjbWdyLnR4dApAQCAtMjM2LDMz ICsyMzYsNDIgQEAgU3RyYXRpeDEwIFNvQ0ZQR0EgRUNDIE1hbmFnZXIKIFRoZSBTdHJhdGl4MTAg U29DIEVDQyBNYW5hZ2VyIGhhbmRsZXMgdGhlIElSUXMgZm9yIGVhY2ggcGVyaXBoZXJhbAogaW4g YSBzaGFyZWQgcmVnaXN0ZXIgc2ltaWxhciB0byB0aGUgQXJyaWExMC4gSG93ZXZlciwgRUNDIHJl cXVpcmVzCiBhY2Nlc3MgdG8gcmVnaXN0ZXJzIHRoYXQgY2FuIG9ubHkgYmUgcmVhZCBmcm9tIFNl Y3VyZSBNb25pdG9yIHdpdGgKLVNNQyBjYWxscy4gVGhlcmVmb3JlIHRoZSBkZXZpY2UgdHJlZSBp cyBzbGlnaHRseSBkaWZmZXJlbnQuCitTTUMgY2FsbHMuIFRoZXJlZm9yZSB0aGUgZGV2aWNlIHRy ZWUgaXMgc2xpZ2h0bHkgZGlmZmVyZW50LiBOb3RlIHRoYXQKK29ubHkgMSBpbnRlcnJ1cHQgaXMg c2VudCBiZWNhdXNlIHRoZSBkb3VibGUgYml0IGVycm9ycyBhcmUgdHJlYXRlZCBhcworU0Vycm9y cyBpbnN0ZWFkIG9mIElSUS4KIAogUmVxdWlyZWQgUHJvcGVydGllczoKIC0gY29tcGF0aWJsZSA6 IFNob3VsZCBiZSAiYWx0cixzb2NmcGdhLXMxMC1lY2MtbWFuYWdlciIKLS0gaW50ZXJydXB0cyA6 IFNob3VsZCBiZSBzaW5nbGUgYml0IGVycm9yIGludGVycnVwdCwgdGhlbiBkb3VibGUgYml0IGVy cm9yCi0JaW50ZXJydXB0LgorLSBhbHRyLHN5c2dyLXN5c2NvbiA6IHBoYW5kbGUgdG8gU3RyYXRp eDEwIFN5c3RlbSBNYW5hZ2VyIEJsb2NrCisJICAgICAgICAgICAgICBjb250YWluaW5nIHRoZSBF Q0MgbWFuYWdlciByZWdpc3RlcnMuCistIGludGVycnVwdHMgOiBTaG91bGQgYmUgc2luZ2xlIGJp dCBlcnJvciBpbnRlcnJ1cHQuCiAtIGludGVycnVwdC1jb250cm9sbGVyIDogYm9vbGVhbiBpbmRp Y2F0b3IgdGhhdCBFQ0MgTWFuYWdlciBpcyBhbiBpbnRlcnJ1cHQgY29udHJvbGxlcgogLSAjaW50 ZXJydXB0LWNlbGxzIDogbXVzdCBiZSBzZXQgdG8gMi4KKy0gI2FkZHJlc3MtY2VsbHM6IG11c3Qg YmUgMQorLSAjc2l6ZS1jZWxsczogbXVzdCBiZSAxCistIHJhbmdlcyA6IHN0YW5kYXJkIGRlZmlu aXRpb24sIHNob3VsZCB0cmFuc2xhdGUgZnJvbSBsb2NhbCBhZGRyZXNzZXMKIAogU3ViY29tcG9u ZW50czoKIAogU0RSQU0gRUNDCiBSZXF1aXJlZCBQcm9wZXJ0aWVzOgogLSBjb21wYXRpYmxlIDog U2hvdWxkIGJlICJhbHRyLHNkcmFtLWVkYWMtczEwIgotLSBpbnRlcnJ1cHRzIDogU2hvdWxkIGJl IHNpbmdsZSBiaXQgZXJyb3IgaW50ZXJydXB0LCB0aGVuIGRvdWJsZSBiaXQgZXJyb3IKLQlpbnRl cnJ1cHQsIGluIHRoaXMgb3JkZXIuCistIGludGVycnVwdHMgOiBTaG91bGQgYmUgc2luZ2xlIGJp dCBlcnJvciBpbnRlcnJ1cHQuCiAKIEV4YW1wbGU6CiAKIAllY2NtZ3IgewogCQljb21wYXRpYmxl ID0gImFsdHIsc29jZnBnYS1zMTAtZWNjLW1hbmFnZXIiOwotCQlpbnRlcnJ1cHRzID0gPDAgMTUg ND4sIDwwIDk1IDQ+OworCQlhbHRyLHN5c21nci1zeXNjb24gPSA8JnN5c21ncj47CisJCSNhZGRy ZXNzLWNlbGxzID0gPDE+OworCQkjc2l6ZS1jZWxscyA9IDwxPjsKKwkJaW50ZXJydXB0cyA9IDww IDE1IDQ+OwogCQlpbnRlcnJ1cHQtY29udHJvbGxlcjsKIAkJI2ludGVycnVwdC1jZWxscyA9IDwy PjsKKwkJcmFuZ2VzOwogCiAJCXNkcmFtZWRhYyB7CiAJCQljb21wYXRpYmxlID0gImFsdHIsc2Ry YW0tZWRhYy1zMTAiOwotCQkJaW50ZXJydXB0cyA9IDwxNiA0PiwgPDQ4IDQ+OworCQkJaW50ZXJy dXB0cyA9IDwxNiBJUlFfVFlQRV9MRVZFTF9ISUdIPjsKIAkJfTsKIAl9Owo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: thor.thayer@linux.intel.com Subject: [PATCHv2 1/5] Documentation: dt: edac: Fix Stratix10 IRQ bindings Date: Wed, 27 Feb 2019 11:27:21 -0600 Message-ID: <1551288445-22335-2-git-send-email-thor.thayer@linux.intel.com> References: <1551288445-22335-1-git-send-email-thor.thayer@linux.intel.com> Return-path: In-Reply-To: <1551288445-22335-1-git-send-email-thor.thayer@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org To: bp@alien8.de, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org From: Thor Thayer Fix Stratix10 ECC bindings to specify only the single bit error. On Stratix10 double bit errors are handled as SErrors instead of interrupts. Indicate the differences between the ARM64 and ARM32 EDAC architecture in the bindings. Signed-off-by: Thor Thayer --- v2 No change --- .../devicetree/bindings/edac/socfpga-eccmgr.txt | 23 +++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/edac/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/edac/socfpga-eccmgr.txt index 5626560a6cfd..a0ac50e15912 100644 --- a/Documentation/devicetree/bindings/edac/socfpga-eccmgr.txt +++ b/Documentation/devicetree/bindings/edac/socfpga-eccmgr.txt @@ -236,33 +236,42 @@ Stratix10 SoCFPGA ECC Manager The Stratix10 SoC ECC Manager handles the IRQs for each peripheral in a shared register similar to the Arria10. However, ECC requires access to registers that can only be read from Secure Monitor with -SMC calls. Therefore the device tree is slightly different. +SMC calls. Therefore the device tree is slightly different. Note that +only 1 interrupt is sent because the double bit errors are treated as +SErrors instead of IRQ. Required Properties: - compatible : Should be "altr,socfpga-s10-ecc-manager" -- interrupts : Should be single bit error interrupt, then double bit error - interrupt. +- altr,sysgr-syscon : phandle to Stratix10 System Manager Block + containing the ECC manager registers. +- interrupts : Should be single bit error interrupt. - interrupt-controller : boolean indicator that ECC Manager is an interrupt controller - #interrupt-cells : must be set to 2. +- #address-cells: must be 1 +- #size-cells: must be 1 +- ranges : standard definition, should translate from local addresses Subcomponents: SDRAM ECC Required Properties: - compatible : Should be "altr,sdram-edac-s10" -- interrupts : Should be single bit error interrupt, then double bit error - interrupt, in this order. +- interrupts : Should be single bit error interrupt. Example: eccmgr { compatible = "altr,socfpga-s10-ecc-manager"; - interrupts = <0 15 4>, <0 95 4>; + altr,sysmgr-syscon = <&sysmgr>; + #address-cells = <1>; + #size-cells = <1>; + interrupts = <0 15 4>; interrupt-controller; #interrupt-cells = <2>; + ranges; sdramedac { compatible = "altr,sdram-edac-s10"; - interrupts = <16 4>, <48 4>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; }; }; -- 2.7.4