From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v10 0/9] Add support for loading FPGA bitstream
Date: Tue, 5 Mar 2019 15:42:12 +0000 [thread overview]
Message-ID: <1551800531.12474.1.camel@intel.com> (raw)
In-Reply-To: <20190305151937.31054-1-tien.fong.chee@intel.com>
On Tue, 2019-03-05 at 23:19 +0800, tien.fong.chee at intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
>
> This version mainly resolved some comments from Simek in [v9].
>
> This series is working on top of u-boot.git http://git.denx.de/u-boot
> .git
>
> These patches are required before applying this series of patches
> 1. [U-Boot,v4] misc: fs_loader: Add support for initializing block
> device
> https://patchwork.ozlabs.org/project/uboot/list/?series=89282(done
> review)
>
> 3. [U-Boot] misc: fs_loader: Replace label with DT phandle
> https://patchwork.ozlabs.org/project/uboot/list/?series=92167(under
> review)
>
> [v9]: https://www.mail-archive.com/u-boot at lists.denx.de/msg316086.htm
> l
> [v8]: https://www.mail-archive.com/u-boot at lists.denx.de/msg316086.htm
> l
> [v7]: https://www.mail-archive.com/u-boot at lists.denx.de/msg314511.htm
> l
>
Please ignore this series, i have some minor change for the fit image
description.
> Tien Fong Chee (9):
> ARM: socfpga: Description on FPGA bitstream type and file name for
> Arria 10
> ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK
> ARM: socfpga: Cleaning up the messages
> ARM: socfpga: Move the watchdog reset to the looping location
> ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
> ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
> spl : socfpga: Implement fpga bitstream loading with socfpga loadfs
> ARM: socfpga: Synchronize the configuration for A10 SoCDK
> ARM: socfpga: Increase Malloc pool size to support FAT filesystem
> in
> SPL
>
> arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 17 +
> .../include/mach/fpga_manager_arria10.h | 40 +-
> arch/arm/mach-socfpga/spl_a10.c | 31 +-
> board/altera/arria10-socdk/fit_spl_fpga.its | 38 ++
> configs/socfpga_arria10_defconfig | 21 +-
> .../fpga/altera-socfpga-a10-fpga-mgr.txt | 26 +-
> drivers/fpga/socfpga_arria10.c | 514
> ++++++++++++++++++++-
> include/configs/socfpga_common.h | 4 +-
> include/image.h | 4 +
> 9 files changed, 663 insertions(+), 32 deletions(-)
> create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its
>
Thanks,
TF
next prev parent reply other threads:[~2019-03-05 15:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-05 15:19 [U-Boot] [PATCH v10 0/9] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 1/9] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 2/9] ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 3/9] ARM: socfpga: Cleaning up the messages tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 4/9] ARM: socfpga: Move the watchdog reset to the looping location tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 5/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 6/9] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 7/9] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 8/9] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com
2019-03-05 15:19 ` [U-Boot] [PATCH v10 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL tien.fong.chee at intel.com
2019-03-05 15:42 ` Chee, Tien Fong [this message]
-- strict thread matches above, loose matches on Subject: below --
2019-03-05 15:53 [U-Boot] [PATCH v10 0/9] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-03-05 15:54 ` Marek Vasut
2019-03-05 15:56 ` Chee, Tien Fong
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