From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jordan Crouse Subject: [PATCH v1 0/4] drm/msm/a6xx: Add support for zap shader Date: Tue, 12 Mar 2019 12:13:38 -0600 Message-ID: <1552414422-9568-1-git-send-email-jcrouse@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: freedreno-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Freedreno" To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Kees Cook , Arnd Bergmann , David Airlie , linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sharat Masetty , Douglas Anderson , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Bjorn Andersson , David Brown , Rob Clark , Rob Herring , Jonathan Marek , Thomas Zimmermann , Mamta Shukla , Andy Gross , Daniel Vetter , Sean Paul , Daniel Mack List-Id: linux-arm-msm@vger.kernel.org ClRoaXMgcGF0Y2ggc2VyaWVzIGFkZHMgc3VwcG9ydCBmb3IgbG9hZGluZyB0aGUgemFwIHNoYWRl ciBvbiBhNnh4IGFuZCB1c2luZyBpdAp0byBnZXQgdGhlIEdQVSBvdXQgb2Ygc2VjdXJlIG1vZGUu CgpUaGUgQWRyZW5vIGE1eHggYW5kIGE2eHggR1BVcyBib290IGluICJzZWN1cmUiIG1vZGUgd2hp Y2ggcmVzdHJpY3RzIHRoZSBtZW1vcnkKdGhlIEdQVSBpcyBhbGxvd2VkIHRvIHVzZS4gVG8gZ2V0 IHRoZSBHUFUgb3V0IG9mIHNlY3VyZSBtb2RlIHdlIG5lZWQgdG8gd3JpdGUKdG8gYSByZWdpc3Rl ci4gSG93ZXZlciBzb21lIGJvb3Rsb2FkZXJzIGJsb2NrIGFjY2VzcyB0byB0aGlzIHJlZ2lzdGVy IGFuZApyZXF1aXJlIHRoYXQgdGhlIEdQVSBpbnN0ZWFkIHBlcmZvcm0gYSBzZXF1ZW5jZSB0byBw dWxsIHRoZSBHUFUgb3V0IG9mIHNlY3VyZQptb2RlLiBUaGlzIHNlcXVlbmNlIHJlcXVpcmVzIGEg c3BlY2lhbCAiemFwIiBzaGFkZXIgdGhhdCB3aWxsIGV4ZWN1dGUgaW4Kc2VjdXJlIG1vZGUsIGNs ZWFyIG91dCBhbGwgdGhlIGludGVybmFsIEdQVSBzZXR0aW5ncyBhbmQgdGhlbiB0cmFuc2l0aW9u IHRvCmluLXNlY3VyZSBtb2RlLgoKVGhpcyBzZXJpZXMgYWRkcyBzdXBwb3J0IGZvciBsb2FkaW5n IGFuZCB1c2luZyB0aGUgemFwIHNoYWRlciBvbiBhNnh4IGFzc3VtaW5nCnRoYXQgdGhlIHNoYWRl ciBleGlzdHMgYW5kIHRoYXQgdGhlIGJvb3Rsb2FkZXIgc3VwcG9ydHMgdGhlIHNlY3VyZSBtb2Rl LiBJZiBhbnkKcGFydCBvZiB0aGUgc2VxdWVuY2UgZmFpbHMgdGhlbiBmYWxsIGJhY2sgdG8gd3Jp dGluZyB0aGUgcmVnaXN0ZXIuIElmIHdlIGdldCBpdAp3cm9uZywgdGhlbiB3cml0aW5nIHRvIHRo ZSByZWdpc3RlciB3aWxsIHRyaWdnZXIgYSBwcm90ZWN0aW9uIG1vZGUgZXJyb3IgYW5kCnRoZSBz eXN0ZW0gd2lsbCBnbyBkb3duLgoKVGhlIGFjdHVhbCB6YXAgc2hhZGVyIHdvcmtzIGFsbW9zdCBp ZGVudGljYWxseSB0byB0aGUgb25lIG9uIDV4eCBvdXRzaWRlIG9mCmEgbWlub3Igd29ya2Fyb3Vu ZCBmb3Igc3lzdGVtIHJlc3VtZS4gVGhlIGZpcnN0IHBhdGNoIG1vdmVzIHRoZSBhNXh4IHNwZWNp ZmljCnN1cHBvcnQgdG8gdGhlIGdlbmVyaWMgYWRyZW5vIGRyaXZlci4gVGhlIHNlY29uZCBwYXRj aCBhZGQgc3VwcG9ydCBmb3IgdGhlCnphcCBzaGFkZXIgYW5kIHRoZSBmaW5hbCB0d28gcGF0Y2hl cyBhZGQgdGhlIERUIGJpbmRpbmdzIGFuZCBEVCBzZXR0aW5ncyBmb3IKc2V0dGluZyB1cCB0aGUg cmVzZXJ2ZWQgbWVtb3J5IHRoYXQgdGhlIHNoYWRlciByZXF1aXJlcy4KCgpKb3JkYW4gQ3JvdXNl ICg0KToKICBkcm0vbXNtL2dwdTogTW92ZSB6YXAgc2hhZGVyIGxvYWRpbmcgdG8gYWRyZW5vCiAg ZHJtL21zbS9hNnh4OiBBZGQgemFwIHNoYWRlciBsb2FkCiAgZHQtYmluZGluZ3M6IGRybS9tc20v Z3B1OiBEb2N1bWVudCBhNXh4IC8gYTZ4eCB6YXAgc2hhZGVyIHJlZ2lvbgogIGFybTY0OiBkdHM6 IHNkbTg0NTogQWRkIHphcCBzaGFkZXIgcmVnaW9uIGZvciBHUFUKCiAuLi4vZGV2aWNldHJlZS9i aW5kaW5ncy9kaXNwbGF5L21zbS9ncHUudHh0ICAgICAgICB8ICAgNyArKwogYXJjaC9hcm02NC9i b290L2R0cy9xY29tL3NkbTg0NS5kdHNpICAgICAgICAgICAgICAgfCAgMTEgKysKIGRyaXZlcnMv Z3B1L2RybS9tc20vYWRyZW5vL2E1eHhfZ3B1LmMgICAgICAgICAgICAgIHwgMTA5ICstLS0tLS0t LS0tLS0tLS0tLS0tCiBkcml2ZXJzL2dwdS9kcm0vbXNtL2FkcmVuby9hNnh4X2dwdS5jICAgICAg ICAgICAgICB8ICAzOCArKysrKystCiBkcml2ZXJzL2dwdS9kcm0vbXNtL2FkcmVuby9hZHJlbm9f ZGV2aWNlLmMgICAgICAgICB8ICAgMSArCiBkcml2ZXJzL2dwdS9kcm0vbXNtL2FkcmVuby9hZHJl bm9fZ3B1LmMgICAgICAgICAgICB8IDExMyArKysrKysrKysrKysrKysrKysrKysKIGRyaXZlcnMv Z3B1L2RybS9tc20vYWRyZW5vL2FkcmVub19ncHUuaCAgICAgICAgICAgIHwgICA2ICsrCiA3IGZp bGVzIGNoYW5nZWQsIDE3NiBpbnNlcnRpb25zKCspLCAxMDkgZGVsZXRpb25zKC0pCgotLSAKMi43 LjQKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkZyZWVk cmVubyBtYWlsaW5nIGxpc3QKRnJlZWRyZW5vQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ZyZWVkcmVubw== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11C47C43381 for ; Tue, 12 Mar 2019 18:14:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CFCEA2087C for ; Tue, 12 Mar 2019 18:14:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="UUGIQVVy"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="kasUnOmq" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727567AbfCLSOR (ORCPT ); Tue, 12 Mar 2019 14:14:17 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:58076 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727327AbfCLSOO (ORCPT ); Tue, 12 Mar 2019 14:14:14 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9F2CF61A88; Tue, 12 Mar 2019 18:14:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552414452; bh=VfoQ9P+nBV3qLb1P5GFp8/EbXMKBz+LBU60OvazZA68=; h=From:To:Cc:Subject:Date:From; b=UUGIQVVylF3H8pQoU6D2lESNVWcX9WfTVLKXccV0Gevh02RsKOQmt5XHkcsPO+8mN 1I+N3ZQYtGpDi5jr9t3v+fxnUbAkgOIUqqwtPc4xXFYAIEG3k7qqV4ArnxWHlO2s3L Oa4/wCh/DqgEDTjd5pQuO9n3uM+Tj6cJjRPq7VDY= Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 80F6B619B1; Tue, 12 Mar 2019 18:14:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552414447; bh=VfoQ9P+nBV3qLb1P5GFp8/EbXMKBz+LBU60OvazZA68=; h=From:To:Cc:Subject:Date:From; b=kasUnOmq7pYyOiMC/Jm9UKzf34zQZbFOFwKU5PzuHxCQUZAz2HoJI5Am9gXXfe3so h2KICw3FVFB+HpulmDBBtnuGuJ/pAntOOHR9s1iaunTxbfAe3zdhZBoKC99W4umcbl TmNPssS5xHQua16yrVOiLrmRP0XYeg3w1m3mgqf8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 80F6B619B1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: Bjorn Andersson , Sean Paul , Arnd Bergmann , Thomas Zimmermann , Sharat Masetty , dri-devel@lists.freedesktop.org, Rob Herring , David Airlie , Douglas Anderson , Rob Clark , David Brown , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Andy Gross , Daniel Mack , Kees Cook , linux-kernel@vger.kernel.org, Jonathan Marek , Mark Rutland , Mamta Shukla , Daniel Vetter Subject: [PATCH v1 0/4] drm/msm/a6xx: Add support for zap shader Date: Tue, 12 Mar 2019 12:13:38 -0600 Message-Id: <1552414422-9568-1-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series adds support for loading the zap shader on a6xx and using it to get the GPU out of secure mode. The Adreno a5xx and a6xx GPUs boot in "secure" mode which restricts the memory the GPU is allowed to use. To get the GPU out of secure mode we need to write to a register. However some bootloaders block access to this register and require that the GPU instead perform a sequence to pull the GPU out of secure mode. This sequence requires a special "zap" shader that will execute in secure mode, clear out all the internal GPU settings and then transition to in-secure mode. This series adds support for loading and using the zap shader on a6xx assuming that the shader exists and that the bootloader supports the secure mode. If any part of the sequence fails then fall back to writing the register. If we get it wrong, then writing to the register will trigger a protection mode error and the system will go down. The actual zap shader works almost identically to the one on 5xx outside of a minor workaround for system resume. The first patch moves the a5xx specific support to the generic adreno driver. The second patch add support for the zap shader and the final two patches add the DT bindings and DT settings for setting up the reserved memory that the shader requires. Jordan Crouse (4): drm/msm/gpu: Move zap shader loading to adreno drm/msm/a6xx: Add zap shader load dt-bindings: drm/msm/gpu: Document a5xx / a6xx zap shader region arm64: dts: sdm845: Add zap shader region for GPU .../devicetree/bindings/display/msm/gpu.txt | 7 ++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 11 ++ drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 109 +------------------- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 38 ++++++- drivers/gpu/drm/msm/adreno/adreno_device.c | 1 + drivers/gpu/drm/msm/adreno/adreno_gpu.c | 113 +++++++++++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.h | 6 ++ 7 files changed, 176 insertions(+), 109 deletions(-) -- 2.7.4