From mboxrd@z Thu Jan 1 00:00:00 1970 From: CK Hu Subject: Re: [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data Date: Thu, 6 Jun 2019 13:42:37 +0800 Message-ID: <1559799757.20098.6.camel@mtksdaap41> References: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com> <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: yongqiang.niu@mediatek.com Cc: Mark Rutland , devicetree@vger.kernel.org, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org List-Id: linux-mediatek@lists.infradead.org SGksIFlvbmdxaWFuZzoKCk9uIFdlZCwgMjAxOS0wNi0wNSBhdCAxOTo0MiArMDgwMCwgeW9uZ3Fp YW5nLm5pdUBtZWRpYXRlay5jb20gd3JvdGU6Cj4gRnJvbTogWW9uZ3FpYW5nIE5pdSA8eW9uZ3Fp YW5nLm5pdUBtZWRpYXRlay5jb20+Cj4gCj4gZXhjZXB0IG11dGV4IG1vZCwgbXV0ZXggbW9kIHJl ZyxtdXRleCBzb2YgcmVnLAo+IGFuZCBtdXRleCBzb2YgaWQgd2lsbCBiZSBkZHAgcHJpdmF0ZSBk YXRhCj4gCj4gU2lnbmVkLW9mZi1ieTogWW9uZ3FpYW5nIE5pdSA8eW9uZ3FpYW5nLm5pdUBtZWRp YXRlay5jb20+Cj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2RkcC5j IHwgNTMgKysrKysrKysrKysrKysrKysrKysrKystLS0tLS0tLS0tLQo+ICAxIGZpbGUgY2hhbmdl ZCwgMzYgaW5zZXJ0aW9ucygrKSwgMTcgZGVsZXRpb25zKC0pCj4gCj4gZGlmZiAtLWdpdCBhL2Ry aXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2RkcC5jIGIvZHJpdmVycy9ncHUvZHJtL21l ZGlhdGVrL210a19kcm1fZGRwLmMKPiBpbmRleCA1NzljZTI4Li5hZTk0ZDQ0IDEwMDY0NAo+IC0t LSBhL2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2RkcC5jCj4gKysrIGIvZHJpdmVy cy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwLmMKPiBAQCAtNDEsMTIgKzQxLDEyIEBACj4g ICNkZWZpbmUgRElTUF9SRUdfQ09ORklHX0RTSV9TRUwJCQkweDA1MAo+ICAjZGVmaW5lIERJU1Bf UkVHX0NPTkZJR19EUElfU0VMCQkJMHgwNjQKPiAgCj4gLSNkZWZpbmUgRElTUF9SRUdfTVVURVhf RU4obikJKDB4MjAgKyAweDIwICogKG4pKQo+IC0jZGVmaW5lIERJU1BfUkVHX01VVEVYKG4pCSgw eDI0ICsgMHgyMCAqIChuKSkKPiAtI2RlZmluZSBESVNQX1JFR19NVVRFWF9SU1QobikJKDB4Mjgg KyAweDIwICogKG4pKQo+IC0jZGVmaW5lIERJU1BfUkVHX01VVEVYX01PRChuKQkoMHgyYyArIDB4 MjAgKiAobikpCj4gLSNkZWZpbmUgRElTUF9SRUdfTVVURVhfU09GKG4pCSgweDMwICsgMHgyMCAq IChuKSkKPiAtI2RlZmluZSBESVNQX1JFR19NVVRFWF9NT0QyKG4pCSgweDM0ICsgMHgyMCAqIChu KSkKPiArI2RlZmluZSBESVNQX1JFR19NVVRFWF9FTihuKQkJCSgweDIwICsgMHgyMCAqIChuKSkK PiArI2RlZmluZSBESVNQX1JFR19NVVRFWChuKQkJCSgweDI0ICsgMHgyMCAqIChuKSkKPiArI2Rl ZmluZSBESVNQX1JFR19NVVRFWF9SU1QobikJCQkoMHgyOCArIDB4MjAgKiAobikpCj4gKyNkZWZp bmUgRElTUF9SRUdfTVVURVhfTU9EKG4pCQkJKDB4MmMgKyAweDIwICogKG4pKQo+ICsjZGVmaW5l IERJU1BfUkVHX01VVEVYX1NPRihuKQkJCSgweDMwICsgMHgyMCAqIChuKSkKPiArI2RlZmluZSBE SVNQX1JFR19NVVRFWF9NT0QyKG4pCQkJKDB4MzQgKyAweDIwICogKG4pKQoKWW91IGFkZCAndGFi JyBiZWNhdXNlIG9mICJhZGQgbXV0ZXggbW9kIHJlZ2lzdGVyIG9mZnNldCBpbnRvIGRkcCBwcml2 YXRlCmRhdGEiIG5vdCAiYWRkIG11dGV4IG1vZCBpbnRvIGRkcCBwcml2YXRlIGRhdGEiLCBzbyBt b3ZlIHRoaXMgdG8gdGhlCnJlbGF0ZWQgcGF0Y2guCgpSZWdhcmRzLApDSwoKPiAgCj4gICNkZWZp bmUgSU5UX01VVEVYCQkJCUJJVCgxKQo+ICAKPiBAQCAtMTQ3LDEyICsxNDcsMTYgQEAgc3RydWN0 IG10a19kaXNwX211dGV4IHsKPiAgCWJvb2wgY2xhaW1lZDsKPiAgfTsKPiAgCj4gK3N0cnVjdCBt dGtfZGRwX2RhdGEgewo+ICsJY29uc3QgdW5zaWduZWQgaW50ICptdXRleF9tb2Q7Cj4gK307Cj4g Kwo+ICBzdHJ1Y3QgbXRrX2RkcCB7Cj4gIAlzdHJ1Y3QgZGV2aWNlCQkJKmRldjsKPiAgCXN0cnVj dCBjbGsJCQkqY2xrOwo+ICAJdm9pZCBfX2lvbWVtCQkJKnJlZ3M7Cj4gIAlzdHJ1Y3QgbXRrX2Rp c3BfbXV0ZXgJCW11dGV4WzEwXTsKPiAtCWNvbnN0IHVuc2lnbmVkIGludAkJKm11dGV4X21vZDsK PiArCWNvbnN0IHN0cnVjdCBtdGtfZGRwX2RhdGEJKmRhdGE7Cj4gIH07Cj4gIAo+ICBzdGF0aWMg Y29uc3QgdW5zaWduZWQgaW50IG10MjcwMV9tdXRleF9tb2RbRERQX0NPTVBPTkVOVF9JRF9NQVhd ID0gewo+IEBAIC0yMDIsNiArMjA2LDE4IEBAIHN0cnVjdCBtdGtfZGRwIHsKPiAgCVtERFBfQ09N UE9ORU5UX1dETUExXSA9IE1UODE3M19NVVRFWF9NT0RfRElTUF9XRE1BMSwKPiAgfTsKPiAgCj4g K3N0YXRpYyBjb25zdCBzdHJ1Y3QgbXRrX2RkcF9kYXRhIG10MjcwMV9kZHBfZHJpdmVyX2RhdGEg PSB7Cj4gKwkubXV0ZXhfbW9kID0gbXQyNzAxX211dGV4X21vZCwKPiArfTsKPiArCj4gK3N0YXRp YyBjb25zdCBzdHJ1Y3QgbXRrX2RkcF9kYXRhIG10MjcxMl9kZHBfZHJpdmVyX2RhdGEgPSB7Cj4g KwkubXV0ZXhfbW9kID0gbXQyNzEyX211dGV4X21vZCwKPiArfTsKPiArCj4gK3N0YXRpYyBjb25z dCBzdHJ1Y3QgbXRrX2RkcF9kYXRhIG10ODE3M19kZHBfZHJpdmVyX2RhdGEgPSB7Cj4gKwkubXV0 ZXhfbW9kID0gbXQ4MTczX211dGV4X21vZCwKPiArfTsKPiArCj4gIHN0YXRpYyB1bnNpZ25lZCBp bnQgbXRrX2RkcF9tb3V0X2VuKGVudW0gbXRrX2RkcF9jb21wX2lkIGN1ciwKPiAgCQkJCSAgICBl bnVtIG10a19kZHBfY29tcF9pZCBuZXh0LAo+ICAJCQkJICAgIHVuc2lnbmVkIGludCAqYWRkcikK PiBAQCAtNDY0LDE1ICs0ODAsMTUgQEAgdm9pZCBtdGtfZGlzcF9tdXRleF9hZGRfY29tcChzdHJ1 Y3QgbXRrX2Rpc3BfbXV0ZXggKm11dGV4LAo+ICAJCXJlZyA9IE1VVEVYX1NPRl9EUEkxOwo+ICAJ CWJyZWFrOwo+ICAJZGVmYXVsdDoKPiAtCQlpZiAoZGRwLT5tdXRleF9tb2RbaWRdIDwgMzIpIHsK PiArCQlpZiAoZGRwLT5kYXRhLT5tdXRleF9tb2RbaWRdIDwgMzIpIHsKPiAgCQkJb2Zmc2V0ID0g RElTUF9SRUdfTVVURVhfTU9EKG11dGV4LT5pZCk7Cj4gIAkJCXJlZyA9IHJlYWRsX3JlbGF4ZWQo ZGRwLT5yZWdzICsgb2Zmc2V0KTsKPiAtCQkJcmVnIHw9IDEgPDwgZGRwLT5tdXRleF9tb2RbaWRd Owo+ICsJCQlyZWcgfD0gMSA8PCBkZHAtPmRhdGEtPm11dGV4X21vZFtpZF07Cj4gIAkJCXdyaXRl bF9yZWxheGVkKHJlZywgZGRwLT5yZWdzICsgb2Zmc2V0KTsKPiAgCQl9IGVsc2Ugewo+ICAJCQlv ZmZzZXQgPSBESVNQX1JFR19NVVRFWF9NT0QyKG11dGV4LT5pZCk7Cj4gIAkJCXJlZyA9IHJlYWRs X3JlbGF4ZWQoZGRwLT5yZWdzICsgb2Zmc2V0KTsKPiAtCQkJcmVnIHw9IDEgPDwgKGRkcC0+bXV0 ZXhfbW9kW2lkXSAtIDMyKTsKPiArCQkJcmVnIHw9IDEgPDwgKGRkcC0+ZGF0YS0+bXV0ZXhfbW9k W2lkXSAtIDMyKTsKPiAgCQkJd3JpdGVsX3JlbGF4ZWQocmVnLCBkZHAtPnJlZ3MgKyBvZmZzZXQp Owo+ICAJCX0KPiAgCQlyZXR1cm47Cj4gQEAgLTUwMiwxNSArNTE4LDE1IEBAIHZvaWQgbXRrX2Rp c3BfbXV0ZXhfcmVtb3ZlX2NvbXAoc3RydWN0IG10a19kaXNwX211dGV4ICptdXRleCwKPiAgCQkJ ICAgICAgIGRkcC0+cmVncyArIERJU1BfUkVHX01VVEVYX1NPRihtdXRleC0+aWQpKTsKPiAgCQli cmVhazsKPiAgCWRlZmF1bHQ6Cj4gLQkJaWYgKGRkcC0+bXV0ZXhfbW9kW2lkXSA8IDMyKSB7Cj4g KwkJaWYgKGRkcC0+ZGF0YS0+bXV0ZXhfbW9kW2lkXSA8IDMyKSB7Cj4gIAkJCW9mZnNldCA9IERJ U1BfUkVHX01VVEVYX01PRChtdXRleC0+aWQpOwo+ICAJCQlyZWcgPSByZWFkbF9yZWxheGVkKGRk cC0+cmVncyArIG9mZnNldCk7Cj4gLQkJCXJlZyAmPSB+KDEgPDwgZGRwLT5tdXRleF9tb2RbaWRd KTsKPiArCQkJcmVnICY9IH4oMSA8PCBkZHAtPmRhdGEtPm11dGV4X21vZFtpZF0pOwo+ICAJCQl3 cml0ZWxfcmVsYXhlZChyZWcsIGRkcC0+cmVncyArIG9mZnNldCk7Cj4gIAkJfSBlbHNlIHsKPiAg CQkJb2Zmc2V0ID0gRElTUF9SRUdfTVVURVhfTU9EMihtdXRleC0+aWQpOwo+ICAJCQlyZWcgPSBy ZWFkbF9yZWxheGVkKGRkcC0+cmVncyArIG9mZnNldCk7Cj4gLQkJCXJlZyAmPSB+KDEgPDwgKGRk cC0+bXV0ZXhfbW9kW2lkXSAtIDMyKSk7Cj4gKwkJCXJlZyAmPSB+KDEgPDwgKGRkcC0+ZGF0YS0+ bXV0ZXhfbW9kW2lkXSAtIDMyKSk7Cj4gIAkJCXdyaXRlbF9yZWxheGVkKHJlZywgZGRwLT5yZWdz ICsgb2Zmc2V0KTsKPiAgCQl9Cj4gIAkJYnJlYWs7Cj4gQEAgLTU4NSw3ICs2MDEsNyBAQCBzdGF0 aWMgaW50IG10a19kZHBfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgCQly ZXR1cm4gUFRSX0VSUihkZHAtPnJlZ3MpOwo+ICAJfQo+ICAKPiAtCWRkcC0+bXV0ZXhfbW9kID0g b2ZfZGV2aWNlX2dldF9tYXRjaF9kYXRhKGRldik7Cj4gKwlkZHAtPmRhdGEgPSBvZl9kZXZpY2Vf Z2V0X21hdGNoX2RhdGEoZGV2KTsKPiAgCj4gIAlwbGF0Zm9ybV9zZXRfZHJ2ZGF0YShwZGV2LCBk ZHApOwo+ICAKPiBAQCAtNTk4LDkgKzYxNCwxMiBAQCBzdGF0aWMgaW50IG10a19kZHBfcmVtb3Zl KHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCj4gIH0KPiAgCj4gIHN0YXRpYyBjb25zdCBz dHJ1Y3Qgb2ZfZGV2aWNlX2lkIGRkcF9kcml2ZXJfZHRfbWF0Y2hbXSA9IHsKPiAtCXsgLmNvbXBh dGlibGUgPSAibWVkaWF0ZWssbXQyNzAxLWRpc3AtbXV0ZXgiLCAuZGF0YSA9IG10MjcwMV9tdXRl eF9tb2R9LAo+IC0JeyAuY29tcGF0aWJsZSA9ICJtZWRpYXRlayxtdDI3MTItZGlzcC1tdXRleCIs IC5kYXRhID0gbXQyNzEyX211dGV4X21vZH0sCj4gLQl7IC5jb21wYXRpYmxlID0gIm1lZGlhdGVr LG10ODE3My1kaXNwLW11dGV4IiwgLmRhdGEgPSBtdDgxNzNfbXV0ZXhfbW9kfSwKPiArCXsgLmNv bXBhdGlibGUgPSAibWVkaWF0ZWssbXQyNzAxLWRpc3AtbXV0ZXgiLAo+ICsJICAuZGF0YSA9ICZt dDI3MDFfZGRwX2RyaXZlcl9kYXRhfSwKPiArCXsgLmNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQy NzEyLWRpc3AtbXV0ZXgiLAo+ICsJICAuZGF0YSA9ICZtdDI3MTJfZGRwX2RyaXZlcl9kYXRhfSwK PiArCXsgLmNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQ4MTczLWRpc3AtbXV0ZXgiLAo+ICsJICAu ZGF0YSA9ICZtdDgxNzNfZGRwX2RyaXZlcl9kYXRhfSwKPiAgCXt9LAo+ICB9Owo+ICBNT0RVTEVf REVWSUNFX1RBQkxFKG9mLCBkZHBfZHJpdmVyX2R0X21hdGNoKTsKCgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRy aS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5v cmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWw= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,T_DKIMWL_WL_HIGH,UNPARSEABLE_RELAY, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BF95C04AB5 for ; Thu, 6 Jun 2019 05:43:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3F7022083D for ; Thu, 6 Jun 2019 05:43:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Hsm9z7jM" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3F7022083D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UATH7tm/4NR+TiHLx4a9iaTZpfSjfrwoDiu1u5LxHZc=; b=Hsm9z7jMrQHMp4 uW7ktXTcr2MmBaOdSC+JdtbPEMrjro2/xIs29CG9TohJ+akr20YA0kU/Ij6FRoPyoT5IW3/zqsSNw ip2jwupqFibkGEKCoYK5Uaclxd+iK6Y7nI3lOFdXCkHkUtJIPK2dJgrH8UJ+Qq3MQyY2QMAZmp7Pt jLUMZ6X2JaYWzDW9LHuUTepWB3K+XCF875/o1wiwjt8TcQZE/afd8Onf4hUqkG4QyF8AUep3BTalW ie0Tc9tRFjOJR8FxgYmHX5fW1TxJS1CpFNBVMKWTK7LwpEAw21TlYJaG1vEKMiGj3y0v0bVfHAX+b p61AVQzQLKJa2vqypq2A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hYlBC-0001Yj-Cq; Thu, 06 Jun 2019 05:43:14 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hYlB8-0001YM-5V; Thu, 06 Jun 2019 05:43:12 +0000 X-UUID: ff387e1e83db4c889151184145fe237a-20190605 X-UUID: ff387e1e83db4c889151184145fe237a-20190605 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1874761941; Wed, 05 Jun 2019 21:42:49 -0800 Received: from MTKMBS31N2.mediatek.inc (172.27.4.87) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 5 Jun 2019 22:42:47 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 6 Jun 2019 13:42:39 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 6 Jun 2019 13:42:37 +0800 Message-ID: <1559799757.20098.6.camel@mtksdaap41> Subject: Re: [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data From: CK Hu To: Date: Thu, 6 Jun 2019 13:42:37 +0800 In-Reply-To: <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> References: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com> <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190605_224310_217824_D22D0143 X-CRM114-Status: GOOD ( 15.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Philipp Zabel , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-mediatek@lists.infradead.org, Daniel Vetter , Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > except mutex mod, mutex mod reg,mutex sof reg, > and mutex sof id will be ddp private data > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 53 +++++++++++++++++++++++----------- > 1 file changed, 36 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 579ce28..ae94d44 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -41,12 +41,12 @@ > #define DISP_REG_CONFIG_DSI_SEL 0x050 > #define DISP_REG_CONFIG_DPI_SEL 0x064 > > -#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > -#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > -#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) > -#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n)) > -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n)) > -#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) > +#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > +#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > +#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) > +#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n)) > +#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n)) > +#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) You add 'tab' because of "add mutex mod register offset into ddp private data" not "add mutex mod into ddp private data", so move this to the related patch. Regards, CK > > #define INT_MUTEX BIT(1) > > @@ -147,12 +147,16 @@ struct mtk_disp_mutex { > bool claimed; > }; > > +struct mtk_ddp_data { > + const unsigned int *mutex_mod; > +}; > + > struct mtk_ddp { > struct device *dev; > struct clk *clk; > void __iomem *regs; > struct mtk_disp_mutex mutex[10]; > - const unsigned int *mutex_mod; > + const struct mtk_ddp_data *data; > }; > > static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = { > @@ -202,6 +206,18 @@ struct mtk_ddp { > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, > }; > > +static const struct mtk_ddp_data mt2701_ddp_driver_data = { > + .mutex_mod = mt2701_mutex_mod, > +}; > + > +static const struct mtk_ddp_data mt2712_ddp_driver_data = { > + .mutex_mod = mt2712_mutex_mod, > +}; > + > +static const struct mtk_ddp_data mt8173_ddp_driver_data = { > + .mutex_mod = mt8173_mutex_mod, > +}; > + > static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > enum mtk_ddp_comp_id next, > unsigned int *addr) > @@ -464,15 +480,15 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex, > reg = MUTEX_SOF_DPI1; > break; > default: > - if (ddp->mutex_mod[id] < 32) { > + if (ddp->data->mutex_mod[id] < 32) { > offset = DISP_REG_MUTEX_MOD(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg |= 1 << ddp->mutex_mod[id]; > + reg |= 1 << ddp->data->mutex_mod[id]; > writel_relaxed(reg, ddp->regs + offset); > } else { > offset = DISP_REG_MUTEX_MOD2(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg |= 1 << (ddp->mutex_mod[id] - 32); > + reg |= 1 << (ddp->data->mutex_mod[id] - 32); > writel_relaxed(reg, ddp->regs + offset); > } > return; > @@ -502,15 +518,15 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex, > ddp->regs + DISP_REG_MUTEX_SOF(mutex->id)); > break; > default: > - if (ddp->mutex_mod[id] < 32) { > + if (ddp->data->mutex_mod[id] < 32) { > offset = DISP_REG_MUTEX_MOD(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg &= ~(1 << ddp->mutex_mod[id]); > + reg &= ~(1 << ddp->data->mutex_mod[id]); > writel_relaxed(reg, ddp->regs + offset); > } else { > offset = DISP_REG_MUTEX_MOD2(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg &= ~(1 << (ddp->mutex_mod[id] - 32)); > + reg &= ~(1 << (ddp->data->mutex_mod[id] - 32)); > writel_relaxed(reg, ddp->regs + offset); > } > break; > @@ -585,7 +601,7 @@ static int mtk_ddp_probe(struct platform_device *pdev) > return PTR_ERR(ddp->regs); > } > > - ddp->mutex_mod = of_device_get_match_data(dev); > + ddp->data = of_device_get_match_data(dev); > > platform_set_drvdata(pdev, ddp); > > @@ -598,9 +614,12 @@ static int mtk_ddp_remove(struct platform_device *pdev) > } > > static const struct of_device_id ddp_driver_dt_match[] = { > - { .compatible = "mediatek,mt2701-disp-mutex", .data = mt2701_mutex_mod}, > - { .compatible = "mediatek,mt2712-disp-mutex", .data = mt2712_mutex_mod}, > - { .compatible = "mediatek,mt8173-disp-mutex", .data = mt8173_mutex_mod}, > + { .compatible = "mediatek,mt2701-disp-mutex", > + .data = &mt2701_ddp_driver_data}, > + { .compatible = "mediatek,mt2712-disp-mutex", > + .data = &mt2712_ddp_driver_data}, > + { .compatible = "mediatek,mt8173-disp-mutex", > + .data = &mt8173_ddp_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, ddp_driver_dt_match); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A846C04AB5 for ; Thu, 6 Jun 2019 05:42:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 086CA20673 for ; Thu, 6 Jun 2019 05:42:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726369AbfFFFmv (ORCPT ); Thu, 6 Jun 2019 01:42:51 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:29517 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725267AbfFFFmu (ORCPT ); Thu, 6 Jun 2019 01:42:50 -0400 X-UUID: 9c3da1f7682a4564842f2f6a9a9598ad-20190606 X-UUID: 9c3da1f7682a4564842f2f6a9a9598ad-20190606 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 520499542; Thu, 06 Jun 2019 13:42:43 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 6 Jun 2019 13:42:39 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 6 Jun 2019 13:42:37 +0800 Message-ID: <1559799757.20098.6.camel@mtksdaap41> Subject: Re: [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data From: CK Hu To: CC: Philipp Zabel , Rob Herring , Matthias Brugger , "David Airlie" , Daniel Vetter , Mark Rutland , , , , , Date: Thu, 6 Jun 2019 13:42:37 +0800 In-Reply-To: <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> References: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com> <1559734986-7379-7-git-send-email-yongqiang.niu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Yongqiang: On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > except mutex mod, mutex mod reg,mutex sof reg, > and mutex sof id will be ddp private data > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 53 +++++++++++++++++++++++----------- > 1 file changed, 36 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index 579ce28..ae94d44 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -41,12 +41,12 @@ > #define DISP_REG_CONFIG_DSI_SEL 0x050 > #define DISP_REG_CONFIG_DPI_SEL 0x064 > > -#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > -#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > -#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) > -#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n)) > -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n)) > -#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) > +#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) > +#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) > +#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) > +#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n)) > +#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n)) > +#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) You add 'tab' because of "add mutex mod register offset into ddp private data" not "add mutex mod into ddp private data", so move this to the related patch. Regards, CK > > #define INT_MUTEX BIT(1) > > @@ -147,12 +147,16 @@ struct mtk_disp_mutex { > bool claimed; > }; > > +struct mtk_ddp_data { > + const unsigned int *mutex_mod; > +}; > + > struct mtk_ddp { > struct device *dev; > struct clk *clk; > void __iomem *regs; > struct mtk_disp_mutex mutex[10]; > - const unsigned int *mutex_mod; > + const struct mtk_ddp_data *data; > }; > > static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = { > @@ -202,6 +206,18 @@ struct mtk_ddp { > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, > }; > > +static const struct mtk_ddp_data mt2701_ddp_driver_data = { > + .mutex_mod = mt2701_mutex_mod, > +}; > + > +static const struct mtk_ddp_data mt2712_ddp_driver_data = { > + .mutex_mod = mt2712_mutex_mod, > +}; > + > +static const struct mtk_ddp_data mt8173_ddp_driver_data = { > + .mutex_mod = mt8173_mutex_mod, > +}; > + > static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > enum mtk_ddp_comp_id next, > unsigned int *addr) > @@ -464,15 +480,15 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex, > reg = MUTEX_SOF_DPI1; > break; > default: > - if (ddp->mutex_mod[id] < 32) { > + if (ddp->data->mutex_mod[id] < 32) { > offset = DISP_REG_MUTEX_MOD(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg |= 1 << ddp->mutex_mod[id]; > + reg |= 1 << ddp->data->mutex_mod[id]; > writel_relaxed(reg, ddp->regs + offset); > } else { > offset = DISP_REG_MUTEX_MOD2(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg |= 1 << (ddp->mutex_mod[id] - 32); > + reg |= 1 << (ddp->data->mutex_mod[id] - 32); > writel_relaxed(reg, ddp->regs + offset); > } > return; > @@ -502,15 +518,15 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex, > ddp->regs + DISP_REG_MUTEX_SOF(mutex->id)); > break; > default: > - if (ddp->mutex_mod[id] < 32) { > + if (ddp->data->mutex_mod[id] < 32) { > offset = DISP_REG_MUTEX_MOD(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg &= ~(1 << ddp->mutex_mod[id]); > + reg &= ~(1 << ddp->data->mutex_mod[id]); > writel_relaxed(reg, ddp->regs + offset); > } else { > offset = DISP_REG_MUTEX_MOD2(mutex->id); > reg = readl_relaxed(ddp->regs + offset); > - reg &= ~(1 << (ddp->mutex_mod[id] - 32)); > + reg &= ~(1 << (ddp->data->mutex_mod[id] - 32)); > writel_relaxed(reg, ddp->regs + offset); > } > break; > @@ -585,7 +601,7 @@ static int mtk_ddp_probe(struct platform_device *pdev) > return PTR_ERR(ddp->regs); > } > > - ddp->mutex_mod = of_device_get_match_data(dev); > + ddp->data = of_device_get_match_data(dev); > > platform_set_drvdata(pdev, ddp); > > @@ -598,9 +614,12 @@ static int mtk_ddp_remove(struct platform_device *pdev) > } > > static const struct of_device_id ddp_driver_dt_match[] = { > - { .compatible = "mediatek,mt2701-disp-mutex", .data = mt2701_mutex_mod}, > - { .compatible = "mediatek,mt2712-disp-mutex", .data = mt2712_mutex_mod}, > - { .compatible = "mediatek,mt8173-disp-mutex", .data = mt8173_mutex_mod}, > + { .compatible = "mediatek,mt2701-disp-mutex", > + .data = &mt2701_ddp_driver_data}, > + { .compatible = "mediatek,mt2712-disp-mutex", > + .data = &mt2712_ddp_driver_data}, > + { .compatible = "mediatek,mt8173-disp-mutex", > + .data = &mt8173_ddp_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);