diff for duplicates of <1563810792776.27767@bt.com> diff --git a/a/content_digest b/N1/content_digest index e634a14..851f7bf 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,33 +1,33 @@ "ref\0e9c6e5310b1a4863be45d45bf087fc3d@tpw09926dag18e.domain1.systemhost.net\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v2 19/20] target/sparc: Add TLB entry with attributes\0" + "Subject\0[Qemu-arm] [Qemu-devel] [PATCH v2 19/20] target/sparc: Add TLB entry with attributes\0" "Date\0Mon, 22 Jul 2019 15:53:13 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<peter.maydell@linaro.org>" - <walling@linux.ibm.com> - <david@redhat.com> - <palmer@sifive.com> - <mark.cave-ayland@ilande.co.uk> - <Alistair.Francis@wdc.com> - <arikalo@wavecomp.com> - <mst@redhat.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <rth@twiddle.net> - <atar4qemu@gmail.com> - <ehabkost@redhat.com> - <sw@weilnetz.de> - <alex.williamson@redhat.com> - <qemu-arm@nongnu.org> - <david@gibson.dropbear.id.au> - <qemu-riscv@nongnu.org> - <cohuck@redhat.com> - <claudio.fontana@huawei.com> - <qemu-s390x@nongnu.org> - <qemu-ppc@nongnu.org> - <amarkovic@wavecomp.com> - <pbonzini@redhat.com> - " <aurelien@aurel32.net>\0" + "Cc\0peter.maydell@linaro.org" + walling@linux.ibm.com + mst@redhat.com + palmer@sifive.com + mark.cave-ayland@ilande.co.uk + Alistair.Francis@wdc.com + arikalo@wavecomp.com + david@redhat.com + pasic@linux.ibm.com + borntraeger@de.ibm.com + rth@twiddle.net + atar4qemu@gmail.com + ehabkost@redhat.com + sw@weilnetz.de + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + david@gibson.dropbear.id.au + qemu-riscv@nongnu.org + cohuck@redhat.com + claudio.fontana@huawei.com + alex.williamson@redhat.com + qemu-ppc@nongnu.org + amarkovic@wavecomp.com + pbonzini@redhat.com + " aurelien@aurel32.net\0" "\01:1\0" "b\0" "Append MemTxAttrs to interfaces so we can pass along up coming Invert\n" @@ -294,4 +294,4 @@ "</body>\r\n" "</html>\r\n" -4332e334d74085551c26582007bc5b97cb8e318469101c25fc51f926dec14f9c +6b4b0b8e04ae1edf1f3960d34c4cd8f02ccf585d617a730cd3695bd7936ccca2
diff --git a/a/2.bin b/a/2.bin deleted file mode 100644 index bed6993..0000000 --- a/a/2.bin +++ /dev/null @@ -1,139 +0,0 @@ -<html> -<head> -<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> -<style type="text/css" style="display:none"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style> -</head> -<body dir="ltr" style="font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;"> -<p></p> -<div><span style="font-size: 12pt;">Append MemTxAttrs to interfaces so we can pass along up coming Invert</span><br> -</div> -<div>Endian TTE bit on SPARC64.</div> -<div><br> -</div> -<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div> -<div>---</div> -<div> target/sparc/mmu_helper.c | 32 ++++++++++++++++++--------------</div> -<div> 1 file changed, 18 insertions(+), 14 deletions(-)</div> -<div><br> -</div> -<div>diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c</div> -<div>index cbd1e91..826e14b 100644</div> -<div>--- a/target/sparc/mmu_helper.c</div> -<div>+++ b/target/sparc/mmu_helper.c</div> -<div>@@ -88,7 +88,7 @@ static const int perm_table[2][8] = {</div> -<div> };</div> -<div> </div> -<div> static int get_physical_address(CPUSPARCState *env, hwaddr *physical,</div> -<div>- int *prot, int *access_index,</div> -<div>+ int *prot, int *access_index, MemTxAttrs *attrs,</div> -<div> target_ulong address, int rw, int mmu_idx,</div> -<div> target_ulong *page_size)</div> -<div> {</div> -<div>@@ -219,6 +219,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div> -<div> target_ulong vaddr;</div> -<div> target_ulong page_size;</div> -<div> int error_code = 0, prot, access_index;</div> -<div>+ MemTxAttrs attrs = {};</div> -<div> </div> -<div> /*</div> -<div> * TODO: If we ever need tlb_vaddr_to_host for this target,</div> -<div>@@ -229,7 +230,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div> -<div> assert(!probe);</div> -<div> </div> -<div> address &= TARGET_PAGE_MASK;</div> -<div>- error_code = get_physical_address(env, &paddr, &prot, &access_index,</div> -<div>+ error_code = get_physical_address(env, &paddr, &prot, &access_index, &attrs,</div> -<div> address, access_type,</div> -<div> mmu_idx, &page_size);</div> -<div> vaddr = address;</div> -<div>@@ -490,8 +491,8 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,</div> -<div> return 0;</div> -<div> }</div> -<div> </div> -<div>-static int get_physical_address_data(CPUSPARCState *env,</div> -<div>- hwaddr *physical, int *prot,</div> -<div>+static int get_physical_address_data(CPUSPARCState *env, hwaddr *physical,</div> -<div>+ int *prot, MemTxAttrs *attrs,</div> -<div> target_ulong address, int rw, int mmu_idx)</div> -<div> {</div> -<div> CPUState *cs = env_cpu(env);</div> -<div>@@ -608,8 +609,8 @@ static int get_physical_address_data(CPUSPARCState *env,</div> -<div> return 1;</div> -<div> }</div> -<div> </div> -<div>-static int get_physical_address_code(CPUSPARCState *env,</div> -<div>- hwaddr *physical, int *prot,</div> -<div>+static int get_physical_address_code(CPUSPARCState *env, hwaddr *physical,</div> -<div>+ int *prot, MemTxAttrs *attrs,</div> -<div> target_ulong address, int mmu_idx)</div> -<div> {</div> -<div> CPUState *cs = env_cpu(env);</div> -<div>@@ -686,7 +687,7 @@ static int get_physical_address_code(CPUSPARCState *env,</div> -<div> }</div> -<div> </div> -<div> static int get_physical_address(CPUSPARCState *env, hwaddr *physical,</div> -<div>- int *prot, int *access_index,</div> -<div>+ int *prot, int *access_index, MemTxAttrs *attrs,</div> -<div> target_ulong address, int rw, int mmu_idx,</div> -<div> target_ulong *page_size)</div> -<div> {</div> -<div>@@ -716,11 +717,11 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,</div> -<div> }</div> -<div> </div> -<div> if (rw == 2) {</div> -<div>- return get_physical_address_code(env, physical, prot, address,</div> -<div>+ return get_physical_address_code(env, physical, prot, attrs, address,</div> -<div> mmu_idx);</div> -<div> } else {</div> -<div>- return get_physical_address_data(env, physical, prot, address, rw,</div> -<div>- mmu_idx);</div> -<div>+ return get_physical_address_data(env, physical, prot, attrs, address,</div> -<div>+ rw, mmu_idx);</div> -<div> }</div> -<div> }</div> -<div> </div> -<div>@@ -734,10 +735,11 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div> -<div> target_ulong vaddr;</div> -<div> hwaddr paddr;</div> -<div> target_ulong page_size;</div> -<div>+ MemTxAttrs attrs = {};</div> -<div> int error_code = 0, prot, access_index;</div> -<div> </div> -<div> address &= TARGET_PAGE_MASK;</div> -<div>- error_code = get_physical_address(env, &paddr, &prot, &access_index,</div> -<div>+ error_code = get_physical_address(env, &paddr, &prot, &access_index, &attrs,</div> -<div> address, access_type,</div> -<div> mmu_idx, &page_size);</div> -<div> if (likely(error_code == 0)) {</div> -<div>@@ -747,7 +749,8 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div> -<div> env->dmmu.mmu_primary_context,</div> -<div> env->dmmu.mmu_secondary_context);</div> -<div> </div> -<div>- tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, page_size);</div> -<div>+ tlb_set_page_with_attrs(cs, vaddr, paddr, attrs, prot, mmu_idx,</div> -<div>+ page_size);</div> -<div> return true;</div> -<div> }</div> -<div> if (probe) {</div> -<div>@@ -849,9 +852,10 @@ static int cpu_sparc_get_phys_page(CPUSPARCState *env, hwaddr *phys,</div> -<div> {</div> -<div> target_ulong page_size;</div> -<div> int prot, access_index;</div> -<div>+ MemTxAttrs attrs = {};</div> -<div> </div> -<div>- return get_physical_address(env, phys, &prot, &access_index, addr, rw,</div> -<div>- mmu_idx, &page_size);</div> -<div>+ return get_physical_address(env, phys, &prot, &access_index, &attrs, addr,</div> -<div>+ rw, mmu_idx, &page_size);</div> -<div> }</div> -<div> </div> -<div> #if defined(TARGET_SPARC64)</div> -<div>-- </div> -<div>1.8.3.1</div> -<div><br> -<br> -</div> -<p><br> -</p> -</body> -</html> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index e54d0ae..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,2 +0,0 @@ -Content-Type: text/html; charset="iso-8859-1" -Content-Transfer-Encoding: quoted-printable diff --git a/a/content_digest b/N2/content_digest index e634a14..7594e23 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,34 +1,34 @@ "ref\0e9c6e5310b1a4863be45d45bf087fc3d@tpw09926dag18e.domain1.systemhost.net\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v2 19/20] target/sparc: Add TLB entry with attributes\0" + "Subject\0[Qemu-devel] [PATCH v2 19/20] target/sparc: Add TLB entry with attributes\0" "Date\0Mon, 22 Jul 2019 15:53:13 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<peter.maydell@linaro.org>" - <walling@linux.ibm.com> - <david@redhat.com> - <palmer@sifive.com> - <mark.cave-ayland@ilande.co.uk> - <Alistair.Francis@wdc.com> - <arikalo@wavecomp.com> - <mst@redhat.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <rth@twiddle.net> - <atar4qemu@gmail.com> - <ehabkost@redhat.com> - <sw@weilnetz.de> - <alex.williamson@redhat.com> - <qemu-arm@nongnu.org> - <david@gibson.dropbear.id.au> - <qemu-riscv@nongnu.org> - <cohuck@redhat.com> - <claudio.fontana@huawei.com> - <qemu-s390x@nongnu.org> - <qemu-ppc@nongnu.org> - <amarkovic@wavecomp.com> - <pbonzini@redhat.com> - " <aurelien@aurel32.net>\0" - "\01:1\0" + "Cc\0peter.maydell@linaro.org" + walling@linux.ibm.com + mst@redhat.com + palmer@sifive.com + mark.cave-ayland@ilande.co.uk + Alistair.Francis@wdc.com + arikalo@wavecomp.com + david@redhat.com + pasic@linux.ibm.com + borntraeger@de.ibm.com + rth@twiddle.net + atar4qemu@gmail.com + ehabkost@redhat.com + sw@weilnetz.de + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + david@gibson.dropbear.id.au + qemu-riscv@nongnu.org + cohuck@redhat.com + claudio.fontana@huawei.com + alex.williamson@redhat.com + qemu-ppc@nongnu.org + amarkovic@wavecomp.com + pbonzini@redhat.com + " aurelien@aurel32.net\0" + "\00:1\0" "b\0" "Append MemTxAttrs to interfaces so we can pass along up coming Invert\n" "Endian TTE bit on SPARC64.\n" @@ -152,146 +152,5 @@ " #if defined(TARGET_SPARC64)\n" "--\n" 1.8.3.1 - "\01:2\0" - "b\0" - "<html>\r\n" - "<head>\r\n" - "<meta http-equiv=\"Content-Type\" content=\"text/html; charset=iso-8859-1\">\r\n" - "<style type=\"text/css\" style=\"display:none\"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style>\r\n" - "</head>\r\n" - "<body dir=\"ltr\" style=\"font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;\">\r\n" - "<p></p>\r\n" - "<div><span style=\"font-size: 12pt;\">Append MemTxAttrs to interfaces so we can pass along up coming Invert</span><br>\r\n" - "</div>\r\n" - "<div>Endian TTE bit on SPARC64.</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div>\r\n" - "<div>---</div>\r\n" - "<div> target/sparc/mmu_helper.c | 32 ++++++++++++++++++--------------</div>\r\n" - "<div> 1 file changed, 18 insertions(+), 14 deletions(-)</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c</div>\r\n" - "<div>index cbd1e91..826e14b 100644</div>\r\n" - "<div>--- a/target/sparc/mmu_helper.c</div>\r\n" - "<div>+++ b/target/sparc/mmu_helper.c</div>\r\n" - "<div>@@ -88,7 +88,7 @@ static const int perm_table[2][8] = {</div>\r\n" - "<div> };</div>\r\n" - "<div> </div>\r\n" - "<div> static int get_physical_address(CPUSPARCState *env, hwaddr *physical,</div>\r\n" - "<div>- int *prot, int *access_index,</div>\r\n" - "<div>+ int *prot, int *access_index, MemTxAttrs *attrs,</div>\r\n" - "<div> target_ulong address, int rw, int mmu_idx,</div>\r\n" - "<div> target_ulong *page_size)</div>\r\n" - "<div> {</div>\r\n" - "<div>@@ -219,6 +219,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div>\r\n" - "<div> target_ulong vaddr;</div>\r\n" - "<div> target_ulong page_size;</div>\r\n" - "<div> int error_code = 0, prot, access_index;</div>\r\n" - "<div>+ MemTxAttrs attrs = {};</div>\r\n" - "<div> </div>\r\n" - "<div> /*</div>\r\n" - "<div> * TODO: If we ever need tlb_vaddr_to_host for this target,</div>\r\n" - "<div>@@ -229,7 +230,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div>\r\n" - "<div> assert(!probe);</div>\r\n" - "<div> </div>\r\n" - "<div> address &= TARGET_PAGE_MASK;</div>\r\n" - "<div>- error_code = get_physical_address(env, &paddr, &prot, &access_index,</div>\r\n" - "<div>+ error_code = get_physical_address(env, &paddr, &prot, &access_index, &attrs,</div>\r\n" - "<div> address, access_type,</div>\r\n" - "<div> mmu_idx, &page_size);</div>\r\n" - "<div> vaddr = address;</div>\r\n" - "<div>@@ -490,8 +491,8 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,</div>\r\n" - "<div> return 0;</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>-static int get_physical_address_data(CPUSPARCState *env,</div>\r\n" - "<div>- hwaddr *physical, int *prot,</div>\r\n" - "<div>+static int get_physical_address_data(CPUSPARCState *env, hwaddr *physical,</div>\r\n" - "<div>+ int *prot, MemTxAttrs *attrs,</div>\r\n" - "<div> target_ulong address, int rw, int mmu_idx)</div>\r\n" - "<div> {</div>\r\n" - "<div> CPUState *cs = env_cpu(env);</div>\r\n" - "<div>@@ -608,8 +609,8 @@ static int get_physical_address_data(CPUSPARCState *env,</div>\r\n" - "<div> return 1;</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>-static int get_physical_address_code(CPUSPARCState *env,</div>\r\n" - "<div>- hwaddr *physical, int *prot,</div>\r\n" - "<div>+static int get_physical_address_code(CPUSPARCState *env, hwaddr *physical,</div>\r\n" - "<div>+ int *prot, MemTxAttrs *attrs,</div>\r\n" - "<div> target_ulong address, int mmu_idx)</div>\r\n" - "<div> {</div>\r\n" - "<div> CPUState *cs = env_cpu(env);</div>\r\n" - "<div>@@ -686,7 +687,7 @@ static int get_physical_address_code(CPUSPARCState *env,</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> static int get_physical_address(CPUSPARCState *env, hwaddr *physical,</div>\r\n" - "<div>- int *prot, int *access_index,</div>\r\n" - "<div>+ int *prot, int *access_index, MemTxAttrs *attrs,</div>\r\n" - "<div> target_ulong address, int rw, int mmu_idx,</div>\r\n" - "<div> target_ulong *page_size)</div>\r\n" - "<div> {</div>\r\n" - "<div>@@ -716,11 +717,11 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> if (rw == 2) {</div>\r\n" - "<div>- return get_physical_address_code(env, physical, prot, address,</div>\r\n" - "<div>+ return get_physical_address_code(env, physical, prot, attrs, address,</div>\r\n" - "<div> mmu_idx);</div>\r\n" - "<div> } else {</div>\r\n" - "<div>- return get_physical_address_data(env, physical, prot, address, rw,</div>\r\n" - "<div>- mmu_idx);</div>\r\n" - "<div>+ return get_physical_address_data(env, physical, prot, attrs, address,</div>\r\n" - "<div>+ rw, mmu_idx);</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -734,10 +735,11 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div>\r\n" - "<div> target_ulong vaddr;</div>\r\n" - "<div> hwaddr paddr;</div>\r\n" - "<div> target_ulong page_size;</div>\r\n" - "<div>+ MemTxAttrs attrs = {};</div>\r\n" - "<div> int error_code = 0, prot, access_index;</div>\r\n" - "<div> </div>\r\n" - "<div> address &= TARGET_PAGE_MASK;</div>\r\n" - "<div>- error_code = get_physical_address(env, &paddr, &prot, &access_index,</div>\r\n" - "<div>+ error_code = get_physical_address(env, &paddr, &prot, &access_index, &attrs,</div>\r\n" - "<div> address, access_type,</div>\r\n" - "<div> mmu_idx, &page_size);</div>\r\n" - "<div> if (likely(error_code == 0)) {</div>\r\n" - "<div>@@ -747,7 +749,8 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,</div>\r\n" - "<div> env->dmmu.mmu_primary_context,</div>\r\n" - "<div> env->dmmu.mmu_secondary_context);</div>\r\n" - "<div> </div>\r\n" - "<div>- tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, page_size);</div>\r\n" - "<div>+ tlb_set_page_with_attrs(cs, vaddr, paddr, attrs, prot, mmu_idx,</div>\r\n" - "<div>+ page_size);</div>\r\n" - "<div> return true;</div>\r\n" - "<div> }</div>\r\n" - "<div> if (probe) {</div>\r\n" - "<div>@@ -849,9 +852,10 @@ static int cpu_sparc_get_phys_page(CPUSPARCState *env, hwaddr *phys,</div>\r\n" - "<div> {</div>\r\n" - "<div> target_ulong page_size;</div>\r\n" - "<div> int prot, access_index;</div>\r\n" - "<div>+ MemTxAttrs attrs = {};</div>\r\n" - "<div> </div>\r\n" - "<div>- return get_physical_address(env, phys, &prot, &access_index, addr, rw,</div>\r\n" - "<div>- mmu_idx, &page_size);</div>\r\n" - "<div>+ return get_physical_address(env, phys, &prot, &access_index, &attrs, addr,</div>\r\n" - "<div>+ rw, mmu_idx, &page_size);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> #if defined(TARGET_SPARC64)</div>\r\n" - "<div>-- </div>\r\n" - "<div>1.8.3.1</div>\r\n" - "<div><br>\r\n" - "<br>\r\n" - "</div>\r\n" - "<p><br>\r\n" - "</p>\r\n" - "</body>\r\n" - "</html>\r\n" -4332e334d74085551c26582007bc5b97cb8e318469101c25fc51f926dec14f9c +1ef1aba065d1cb78a657f29a6e227ed72016dae5d992bc665308623473cc70e9
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