diff for duplicates of <1564041947711.97987@bt.com> diff --git a/a/content_digest b/N1/content_digest index 9a11392..36e30e1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,33 +3,33 @@ "ref\01564038073754.91133@bt.com\0" "ref\01564041524365.23360@bt.com\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v4 13/15] cputlb: Byte swap memory transaction attribute\0" + "Subject\0[Qemu-arm] [Qemu-devel] [PATCH v4 13/15] cputlb: Byte swap memory transaction attribute\0" "Date\0Thu, 25 Jul 2019 08:05:47 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<peter.maydell@linaro.org>" - <walling@linux.ibm.com> - <mst@redhat.com> - <palmer@sifive.com> - <mark.cave-ayland@ilande.co.uk> - <Alistair.Francis@wdc.com> - <arikalo@wavecomp.com> - <david@redhat.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <rth@twiddle.net> - <atar4qemu@gmail.com> - <ehabkost@redhat.com> - <sw@weilnetz.de> - <alex.williamson@redhat.com> - <qemu-arm@nongnu.org> - <david@gibson.dropbear.id.au> - <qemu-riscv@nongnu.org> - <cohuck@redhat.com> - <qemu-s390x@nongnu.org> - <qemu-ppc@nongnu.org> - <amarkovic@wavecomp.com> - <pbonzini@redhat.com> - " <aurelien@aurel32.net>\0" + "Cc\0peter.maydell@linaro.org" + walling@linux.ibm.com + mst@redhat.com + palmer@sifive.com + mark.cave-ayland@ilande.co.uk + Alistair.Francis@wdc.com + arikalo@wavecomp.com + david@redhat.com + pasic@linux.ibm.com + borntraeger@de.ibm.com + rth@twiddle.net + atar4qemu@gmail.com + ehabkost@redhat.com + sw@weilnetz.de + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + david@gibson.dropbear.id.au + qemu-riscv@nongnu.org + cohuck@redhat.com + alex.williamson@redhat.com + qemu-ppc@nongnu.org + amarkovic@wavecomp.com + pbonzini@redhat.com + " aurelien@aurel32.net\0" "\01:1\0" "b\0" "Notice new attribute, byte swap, and force the transaction through the\n" @@ -179,4 +179,4 @@ "</body>\r\n" "</html>\r\n" -4e156f0c631bb9736c3ac5173f766b3355d1234b1368381eb2d84028b4f9c6c6 +2f27fb13fcfed75f3e6f46bd2cb7f208ef9bd45509d1e039529ac841453610ff
diff --git a/a/2.bin b/a/2.bin deleted file mode 100644 index 3a64c9c..0000000 --- a/a/2.bin +++ /dev/null @@ -1,81 +0,0 @@ -<html> -<head> -<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> -<style type="text/css" style="display:none"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style> -</head> -<body dir="ltr" style="font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;"> -<p></p> -<div><span style="font-size: 12pt;">Notice new attribute, byte swap, and force the transaction through the</span><br> -</div> -<div>memory slow path.</div> -<div><br> -</div> -<div>Required by architectures that can invert endianness of memory</div> -<div>transaction, e.g. SPARC64 has the Invert Endian TTE bit.</div> -<div><br> -</div> -<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div> -<div>---</div> -<div> accel/tcg/cputlb.c | 11 +++++++++++</div> -<div> include/exec/memattrs.h | 2 ++</div> -<div> 2 files changed, 13 insertions(+)</div> -<div><br> -</div> -<div>diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c</div> -<div>index e61b1eb..f292a87 100644</div> -<div>--- a/accel/tcg/cputlb.c</div> -<div>+++ b/accel/tcg/cputlb.c</div> -<div>@@ -738,6 +738,9 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,</div> -<div> */</div> -<div> address |= TLB_RECHECK;</div> -<div> }</div> -<div>+ if (attrs.byte_swap) {</div> -<div>+ address |= TLB_FORCE_SLOW;</div> -<div>+ }</div> -<div> if (!memory_region_is_ram(section->mr) &&</div> -<div> !memory_region_is_romd(section->mr)) {</div> -<div> /* IO memory case */</div> -<div>@@ -891,6 +894,10 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> bool locked = false;</div> -<div> MemTxResult r;</div> -<div> </div> -<div>+ if (iotlbentry->attrs.byte_swap) {</div> -<div>+ op ^= MO_BSWAP;</div> -<div>+ }</div> -<div>+</div> -<div> section = iotlb_to_section(cpu, iotlbentry->addr, iotlbentry->attrs);</div> -<div> mr = section->mr;</div> -<div> mr_offset = (iotlbentry->addr & TARGET_PAGE_MASK) + addr;</div> -<div>@@ -933,6 +940,10 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> bool locked = false;</div> -<div> MemTxResult r;</div> -<div> </div> -<div>+ if (iotlbentry->attrs.byte_swap) {</div> -<div>+ op ^= MO_BSWAP;</div> -<div>+ }</div> -<div>+</div> -<div> section = iotlb_to_section(cpu, iotlbentry->addr, iotlbentry->attrs);</div> -<div> mr = section->mr;</div> -<div> mr_offset = (iotlbentry->addr & TARGET_PAGE_MASK) + addr;</div> -<div>diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h</div> -<div>index d4a3477..a0644eb 100644</div> -<div>--- a/include/exec/memattrs.h</div> -<div>+++ b/include/exec/memattrs.h</div> -<div>@@ -37,6 +37,8 @@ typedef struct MemTxAttrs {</div> -<div> unsigned int user:1;</div> -<div> /* Requester ID (for MSI for example) */</div> -<div> unsigned int requester_id:16;</div> -<div>+ /* SPARC64: TTE invert endianness */</div> -<div>+ unsigned int byte_swap:1;</div> -<div> /*</div> -<div> * The following are target-specific page-table bits. These are not</div> -<div> * related to actual memory transactions at all. However, this structure</div> -<div>-- </div> -<div>1.8.3.1</div> -<div><br> -<br> -</div> -<p><br> -</p> -</body> -</html> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index e54d0ae..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,2 +0,0 @@ -Content-Type: text/html; charset="iso-8859-1" -Content-Transfer-Encoding: quoted-printable diff --git a/a/content_digest b/N2/content_digest index 9a11392..28a191e 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,34 +3,34 @@ "ref\01564038073754.91133@bt.com\0" "ref\01564041524365.23360@bt.com\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v4 13/15] cputlb: Byte swap memory transaction attribute\0" + "Subject\0[Qemu-devel] [PATCH v4 13/15] cputlb: Byte swap memory transaction attribute\0" "Date\0Thu, 25 Jul 2019 08:05:47 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<peter.maydell@linaro.org>" - <walling@linux.ibm.com> - <mst@redhat.com> - <palmer@sifive.com> - <mark.cave-ayland@ilande.co.uk> - <Alistair.Francis@wdc.com> - <arikalo@wavecomp.com> - <david@redhat.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <rth@twiddle.net> - <atar4qemu@gmail.com> - <ehabkost@redhat.com> - <sw@weilnetz.de> - <alex.williamson@redhat.com> - <qemu-arm@nongnu.org> - <david@gibson.dropbear.id.au> - <qemu-riscv@nongnu.org> - <cohuck@redhat.com> - <qemu-s390x@nongnu.org> - <qemu-ppc@nongnu.org> - <amarkovic@wavecomp.com> - <pbonzini@redhat.com> - " <aurelien@aurel32.net>\0" - "\01:1\0" + "Cc\0peter.maydell@linaro.org" + walling@linux.ibm.com + mst@redhat.com + palmer@sifive.com + mark.cave-ayland@ilande.co.uk + Alistair.Francis@wdc.com + arikalo@wavecomp.com + david@redhat.com + pasic@linux.ibm.com + borntraeger@de.ibm.com + rth@twiddle.net + atar4qemu@gmail.com + ehabkost@redhat.com + sw@weilnetz.de + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + david@gibson.dropbear.id.au + qemu-riscv@nongnu.org + cohuck@redhat.com + alex.williamson@redhat.com + qemu-ppc@nongnu.org + amarkovic@wavecomp.com + pbonzini@redhat.com + " aurelien@aurel32.net\0" + "\00:1\0" "b\0" "Notice new attribute, byte swap, and force the transaction through the\n" "memory slow path.\n" @@ -95,88 +95,5 @@ " * related to actual memory transactions at all. However, this structure\n" "--\n" 1.8.3.1 - "\01:2\0" - "b\0" - "<html>\r\n" - "<head>\r\n" - "<meta http-equiv=\"Content-Type\" content=\"text/html; charset=iso-8859-1\">\r\n" - "<style type=\"text/css\" style=\"display:none\"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style>\r\n" - "</head>\r\n" - "<body dir=\"ltr\" style=\"font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;\">\r\n" - "<p></p>\r\n" - "<div><span style=\"font-size: 12pt;\">Notice new attribute, byte swap, and force the transaction through the</span><br>\r\n" - "</div>\r\n" - "<div>memory slow path.</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>Required by architectures that can invert endianness of memory</div>\r\n" - "<div>transaction, e.g. SPARC64 has the Invert Endian TTE bit.</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div>\r\n" - "<div>---</div>\r\n" - "<div> accel/tcg/cputlb.c | 11 +++++++++++</div>\r\n" - "<div> include/exec/memattrs.h | 2 ++</div>\r\n" - "<div> 2 files changed, 13 insertions(+)</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c</div>\r\n" - "<div>index e61b1eb..f292a87 100644</div>\r\n" - "<div>--- a/accel/tcg/cputlb.c</div>\r\n" - "<div>+++ b/accel/tcg/cputlb.c</div>\r\n" - "<div>@@ -738,6 +738,9 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,</div>\r\n" - "<div> */</div>\r\n" - "<div> address |= TLB_RECHECK;</div>\r\n" - "<div> }</div>\r\n" - "<div>+ if (attrs.byte_swap) {</div>\r\n" - "<div>+ address |= TLB_FORCE_SLOW;</div>\r\n" - "<div>+ }</div>\r\n" - "<div> if (!memory_region_is_ram(section->mr) &&</div>\r\n" - "<div> !memory_region_is_romd(section->mr)) {</div>\r\n" - "<div> /* IO memory case */</div>\r\n" - "<div>@@ -891,6 +894,10 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> bool locked = false;</div>\r\n" - "<div> MemTxResult r;</div>\r\n" - "<div> </div>\r\n" - "<div>+ if (iotlbentry->attrs.byte_swap) {</div>\r\n" - "<div>+ op ^= MO_BSWAP;</div>\r\n" - "<div>+ }</div>\r\n" - "<div>+</div>\r\n" - "<div> section = iotlb_to_section(cpu, iotlbentry->addr, iotlbentry->attrs);</div>\r\n" - "<div> mr = section->mr;</div>\r\n" - "<div> mr_offset = (iotlbentry->addr & TARGET_PAGE_MASK) + addr;</div>\r\n" - "<div>@@ -933,6 +940,10 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> bool locked = false;</div>\r\n" - "<div> MemTxResult r;</div>\r\n" - "<div> </div>\r\n" - "<div>+ if (iotlbentry->attrs.byte_swap) {</div>\r\n" - "<div>+ op ^= MO_BSWAP;</div>\r\n" - "<div>+ }</div>\r\n" - "<div>+</div>\r\n" - "<div> section = iotlb_to_section(cpu, iotlbentry->addr, iotlbentry->attrs);</div>\r\n" - "<div> mr = section->mr;</div>\r\n" - "<div> mr_offset = (iotlbentry->addr & TARGET_PAGE_MASK) + addr;</div>\r\n" - "<div>diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h</div>\r\n" - "<div>index d4a3477..a0644eb 100644</div>\r\n" - "<div>--- a/include/exec/memattrs.h</div>\r\n" - "<div>+++ b/include/exec/memattrs.h</div>\r\n" - "<div>@@ -37,6 +37,8 @@ typedef struct MemTxAttrs {</div>\r\n" - "<div> unsigned int user:1;</div>\r\n" - "<div> /* Requester ID (for MSI for example) */</div>\r\n" - "<div> unsigned int requester_id:16;</div>\r\n" - "<div>+ /* SPARC64: TTE invert endianness */</div>\r\n" - "<div>+ unsigned int byte_swap:1;</div>\r\n" - "<div> /*</div>\r\n" - "<div> * The following are target-specific page-table bits. These are not</div>\r\n" - "<div> * related to actual memory transactions at all. However, this structure</div>\r\n" - "<div>-- </div>\r\n" - "<div>1.8.3.1</div>\r\n" - "<div><br>\r\n" - "<br>\r\n" - "</div>\r\n" - "<p><br>\r\n" - "</p>\r\n" - "</body>\r\n" - "</html>\r\n" -4e156f0c631bb9736c3ac5173f766b3355d1234b1368381eb2d84028b4f9c6c6 +861b1dc8be4c70f576db68d9cbedf26e1d36a328f4c19f543865c762ffca3407
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