diff for duplicates of <1564048584882.52438@bt.com> diff --git a/a/content_digest b/N1/content_digest index 3ba8c18..a28719f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,36 +1,35 @@ "ref\045d1ebe4b2ed4c039c9da20a738652df@tpw09926dag18e.domain1.systemhost.net\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v4 11/15] memory: Single byte swap along the I/O path\0" + "Subject\0[Qemu-arm] [Qemu-devel] [PATCH v4 11/15] memory: Single byte swap along the I/O path\0" "Date\0Thu, 25 Jul 2019 09:56:25 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<peter.maydell@linaro.org>" - <walling@linux.ibm.com> - <sagark@eecs.berkeley.edu> - <david@redhat.com> - <palmer@sifive.com> - <mark.cave-ayland@ilande.co.uk> - <Alistair.Francis@wdc.com> - <edgar.iglesias@gmail.com> - <arikalo@wavecomp.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <rth@twiddle.net> - <atar4qemu@gmail.com> - <ehabkost@redhat.com> - <alex.williamson@redhat.com> - <qemu-arm@nongnu.org> - <stefanha@redhat.com> - <shorne@gmail.com> - <david@gibson.dropbear.id.au> - <qemu-riscv@nongnu.org> - <qemu-s390x@nongnu.org> - <kbastian@mail.uni-paderborn.de> - <cohuck@redhat.com> - <laurent@vivier.eu> - <qemu-ppc@nongnu.org> - <amarkovic@wavecomp.com> - <pbonzini@redhat.com> - " <aurelien@aurel32.net>\0" + "Cc\0peter.maydell@linaro.org" + walling@linux.ibm.com + sagark@eecs.berkeley.edu + david@redhat.com + palmer@sifive.com + mark.cave-ayland@ilande.co.uk + laurent@vivier.eu + Alistair.Francis@wdc.com + arikalo@wavecomp.com + pasic@linux.ibm.com + borntraeger@de.ibm.com + rth@twiddle.net + atar4qemu@gmail.com + ehabkost@redhat.com + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + stefanha@redhat.com + shorne@gmail.com + david@gibson.dropbear.id.au + qemu-riscv@nongnu.org + kbastian@mail.uni-paderborn.de + cohuck@redhat.com + alex.williamson@redhat.com + qemu-ppc@nongnu.org + amarkovic@wavecomp.com + pbonzini@redhat.com + " aurelien@aurel32.net\0" "\01:1\0" "b\0" "Now that MemOp has been pushed down into the memory API, we can\n" @@ -534,4 +533,4 @@ "</body>\r\n" "</html>\r\n" -063d896433154404e22fb1ac59b1e3d976e07a82e4b798b1b1dcd02394c04bb1 +ce5c50b6340143965075d46bc7535f91f973915fa968a4a5568a52fe342b2b98
diff --git a/a/2.bin b/a/2.bin deleted file mode 100644 index 34592f8..0000000 --- a/a/2.bin +++ /dev/null @@ -1,258 +0,0 @@ -<html> -<head> -<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> -<style type="text/css" style="display:none"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style> -</head> -<body dir="ltr" style="font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;"> -<p></p> -<div><span style="font-size: 12pt;">Now that MemOp has been pushed down into the memory API, we can</span><br> -</div> -<div>collapse the two byte swaps adjust_endianness and handle_bswap into</div> -<div>the former.</div> -<div><br> -</div> -<div>Collapsing byte swaps along the I/O path enables additional endian</div> -<div>inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant</div> -<div>byte swaps cancelling out.</div> -<div><br> -</div> -<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div> -<div>---</div> -<div> accel/tcg/cputlb.c | 58 +++++++++++++++++++++++++-----------------------------</div> -<div> memory.c | 30 ++++++++++++++++------------</div> -<div> 2 files changed, 44 insertions(+), 44 deletions(-)</div> -<div><br> -</div> -<div>diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c</div> -<div>index a4a0bf7..e61b1eb 100644</div> -<div>--- a/accel/tcg/cputlb.c</div> -<div>+++ b/accel/tcg/cputlb.c</div> -<div>@@ -881,7 +881,7 @@ static void tlb_fill(CPUState *cpu, target_ulong addr, int size,</div> -<div> </div> -<div> static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> int mmu_idx, target_ulong addr, uintptr_t retaddr,</div> -<div>- MMUAccessType access_type, int size)</div> -<div>+ MMUAccessType access_type, MemOp op)</div> -<div> {</div> -<div> CPUState *cpu = env_cpu(env);</div> -<div> hwaddr mr_offset;</div> -<div>@@ -906,14 +906,13 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> qemu_mutex_lock_iothread();</div> -<div> locked = true;</div> -<div> }</div> -<div>- r = memory_region_dispatch_read(mr, mr_offset, &val, SIZE_MEMOP(size),</div> -<div>- iotlbentry->attrs);</div> -<div>+ r = memory_region_dispatch_read(mr, mr_offset, &val, op, iotlbentry->attrs);</div> -<div> if (r != MEMTX_OK) {</div> -<div> hwaddr physaddr = mr_offset +</div> -<div> section->offset_within_address_space -</div> -<div> section->offset_within_region;</div> -<div> </div> -<div>- cpu_transaction_failed(cpu, physaddr, addr, size, access_type,</div> -<div>+ cpu_transaction_failed(cpu, physaddr, addr, MEMOP_SIZE(op), access_type,</div> -<div> mmu_idx, iotlbentry->attrs, r, retaddr);</div> -<div> }</div> -<div> if (locked) {</div> -<div>@@ -925,7 +924,7 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> </div> -<div> static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> int mmu_idx, uint64_t val, target_ulong addr,</div> -<div>- uintptr_t retaddr, int size)</div> -<div>+ uintptr_t retaddr, MemOp op)</div> -<div> {</div> -<div> CPUState *cpu = env_cpu(env);</div> -<div> hwaddr mr_offset;</div> -<div>@@ -947,15 +946,15 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> qemu_mutex_lock_iothread();</div> -<div> locked = true;</div> -<div> }</div> -<div>- r = memory_region_dispatch_write(mr, mr_offset, val, SIZE_MEMOP(size),</div> -<div>- iotlbentry->attrs);</div> -<div>+ r = memory_region_dispatch_write(mr, mr_offset, val, op, iotlbentry->attrs);</div> -<div> if (r != MEMTX_OK) {</div> -<div> hwaddr physaddr = mr_offset +</div> -<div> section->offset_within_address_space -</div> -<div> section->offset_within_region;</div> -<div> </div> -<div>- cpu_transaction_failed(cpu, physaddr, addr, size, MMU_DATA_STORE,</div> -<div>- mmu_idx, iotlbentry->attrs, r, retaddr);</div> -<div>+ cpu_transaction_failed(cpu, physaddr, addr, MEMOP_SIZE(op),</div> -<div>+ MMU_DATA_STORE, mmu_idx, iotlbentry->attrs, r,</div> -<div>+ retaddr);</div> -<div> }</div> -<div> if (locked) {</div> -<div> qemu_mutex_unlock_iothread();</div> -<div>@@ -1210,26 +1209,13 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,</div> -<div> #endif</div> -<div> </div> -<div> /*</div> -<div>- * Byte Swap Helper</div> -<div>+ * Byte Swap Checker</div> -<div> *</div> -<div>- * This should all dead code away depending on the build host and</div> -<div>- * access type.</div> -<div>+ * Dead code should all go away depending on the build host and access type.</div> -<div> */</div> -<div>-</div> -<div>-static inline uint64_t handle_bswap(uint64_t val, int size, bool big_endian)</div> -<div>+static inline bool need_bswap(bool big_endian)</div> -<div> {</div> -<div>- if ((big_endian && NEED_BE_BSWAP) || (!big_endian && NEED_LE_BSWAP)) {</div> -<div>- switch (size) {</div> -<div>- case 1: return val;</div> -<div>- case 2: return bswap16(val);</div> -<div>- case 4: return bswap32(val);</div> -<div>- case 8: return bswap64(val);</div> -<div>- default:</div> -<div>- g_assert_not_reached();</div> -<div>- }</div> -<div>- } else {</div> -<div>- return val;</div> -<div>- }</div> -<div>+ return (big_endian && NEED_BE_BSWAP) || (!big_endian && NEED_LE_BSWAP);</div> -<div> }</div> -<div> </div> -<div> /*</div> -<div>@@ -1260,6 +1246,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div> -<div> void *haddr;</div> -<div> uint64_t res;</div> -<div>+ MemOp op;</div> -<div> </div> -<div> /* Handle CPU specific unaligned behaviour */</div> -<div> if (addr & ((1 << a_bits) - 1)) {</div> -<div>@@ -1305,9 +1292,13 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div> }</div> -<div> }</div> -<div> </div> -<div>- res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],</div> -<div>- mmu_idx, addr, retaddr, access_type, size);</div> -<div>- return handle_bswap(res, size, big_endian);</div> -<div>+ op = SIZE_MEMOP(size);</div> -<div>+ if (need_bswap(big_endian)) {</div> -<div>+ op ^= MO_BSWAP;</div> -<div>+ }</div> -<div>+</div> -<div>+ return io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],</div> -<div>+ mmu_idx, addr, retaddr, access_type, op);</div> -<div> }</div> -<div> </div> -<div> /* Handle slow unaligned access (it spans two pages or IO). */</div> -<div>@@ -1508,6 +1499,7 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> const size_t tlb_off = offsetof(CPUTLBEntry, addr_write);</div> -<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div> -<div> void *haddr;</div> -<div>+ MemOp op;</div> -<div> </div> -<div> /* Handle CPU specific unaligned behaviour */</div> -<div> if (addr & ((1 << a_bits) - 1)) {</div> -<div>@@ -1553,9 +1545,13 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> }</div> -<div> }</div> -<div> </div> -<div>+ op = SIZE_MEMOP(size);</div> -<div>+ if (need_bswap(big_endian)) {</div> -<div>+ op ^= MO_BSWAP;</div> -<div>+ }</div> -<div>+</div> -<div> io_writex(env, &env_tlb(env)->d[mmu_idx].iotlb[index], mmu_idx,</div> -<div>- handle_bswap(val, size, big_endian),</div> -<div>- addr, retaddr, size);</div> -<div>+ val, addr, retaddr, op);</div> -<div> return;</div> -<div> }</div> -<div> </div> -<div>diff --git a/memory.c b/memory.c</div> -<div>index 6982e19..0277d3d 100644</div> -<div>--- a/memory.c</div> -<div>+++ b/memory.c</div> -<div>@@ -352,7 +352,7 @@ static bool memory_region_big_endian(MemoryRegion *mr)</div> -<div> #endif</div> -<div> }</div> -<div> </div> -<div>-static bool memory_region_wrong_endianness(MemoryRegion *mr)</div> -<div>+static bool memory_region_endianness_inverted(MemoryRegion *mr)</div> -<div> {</div> -<div> #ifdef TARGET_WORDS_BIGENDIAN</div> -<div> return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;</div> -<div>@@ -361,23 +361,27 @@ static bool memory_region_wrong_endianness(MemoryRegion *mr)</div> -<div> #endif</div> -<div> }</div> -<div> </div> -<div>-static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)</div> -<div>+static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)</div> -<div> {</div> -<div>- if (memory_region_wrong_endianness(mr)) {</div> -<div>- switch (size) {</div> -<div>- case 1:</div> -<div>+ if (memory_region_endianness_inverted(mr)) {</div> -<div>+ op ^= MO_BSWAP;</div> -<div>+ }</div> -<div>+</div> -<div>+ if (op & MO_BSWAP) {</div> -<div>+ switch (op & MO_SIZE) {</div> -<div>+ case MO_8:</div> -<div> break;</div> -<div>- case 2:</div> -<div>+ case MO_16:</div> -<div> *data = bswap16(*data);</div> -<div> break;</div> -<div>- case 4:</div> -<div>+ case MO_32:</div> -<div> *data = bswap32(*data);</div> -<div> break;</div> -<div>- case 8:</div> -<div>+ case MO_64:</div> -<div> *data = bswap64(*data);</div> -<div> break;</div> -<div> default:</div> -<div>- abort();</div> -<div>+ g_assert_not_reached();</div> -<div> }</div> -<div> }</div> -<div> }</div> -<div>@@ -1451,7 +1455,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr,</div> -<div> }</div> -<div> </div> -<div> r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);</div> -<div>- adjust_endianness(mr, pval, size);</div> -<div>+ adjust_endianness(mr, pval, op);</div> -<div> return r;</div> -<div> }</div> -<div> </div> -<div>@@ -1494,7 +1498,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr,</div> -<div> return MEMTX_DECODE_ERROR;</div> -<div> }</div> -<div> </div> -<div>- adjust_endianness(mr, &data, size);</div> -<div>+ adjust_endianness(mr, &data, op);</div> -<div> </div> -<div> if ((!kvm_eventfds_enabled()) &&</div> -<div> memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {</div> -<div>@@ -2340,7 +2344,7 @@ void memory_region_add_eventfd(MemoryRegion *mr,</div> -<div> }</div> -<div> </div> -<div> if (size) {</div> -<div>- adjust_endianness(mr, &mrfd.data, size);</div> -<div>+ adjust_endianness(mr, &mrfd.data, SIZE_MEMOP(size));</div> -<div> }</div> -<div> memory_region_transaction_begin();</div> -<div> for (i = 0; i < mr->ioeventfd_nb; ++i) {</div> -<div>@@ -2375,7 +2379,7 @@ void memory_region_del_eventfd(MemoryRegion *mr,</div> -<div> unsigned i;</div> -<div> </div> -<div> if (size) {</div> -<div>- adjust_endianness(mr, &mrfd.data, size);</div> -<div>+ adjust_endianness(mr, &mrfd.data, SIZE_MEMOP(size));</div> -<div> }</div> -<div> memory_region_transaction_begin();</div> -<div> for (i = 0; i < mr->ioeventfd_nb; ++i) {</div> -<div>-- </div> -<div>1.8.3.1</div> -<div><br> -<br> -</div> -<p><br> -</p> -</body> -</html> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index e54d0ae..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,2 +0,0 @@ -Content-Type: text/html; charset="iso-8859-1" -Content-Transfer-Encoding: quoted-printable diff --git a/a/content_digest b/N2/content_digest index 3ba8c18..3a7889f 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,37 +1,37 @@ "ref\045d1ebe4b2ed4c039c9da20a738652df@tpw09926dag18e.domain1.systemhost.net\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v4 11/15] memory: Single byte swap along the I/O path\0" + "Subject\0[Qemu-devel] [PATCH v4 11/15] memory: Single byte swap along the I/O path\0" "Date\0Thu, 25 Jul 2019 09:56:25 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<peter.maydell@linaro.org>" - <walling@linux.ibm.com> - <sagark@eecs.berkeley.edu> - <david@redhat.com> - <palmer@sifive.com> - <mark.cave-ayland@ilande.co.uk> - <Alistair.Francis@wdc.com> - <edgar.iglesias@gmail.com> - <arikalo@wavecomp.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <rth@twiddle.net> - <atar4qemu@gmail.com> - <ehabkost@redhat.com> - <alex.williamson@redhat.com> - <qemu-arm@nongnu.org> - <stefanha@redhat.com> - <shorne@gmail.com> - <david@gibson.dropbear.id.au> - <qemu-riscv@nongnu.org> - <qemu-s390x@nongnu.org> - <kbastian@mail.uni-paderborn.de> - <cohuck@redhat.com> - <laurent@vivier.eu> - <qemu-ppc@nongnu.org> - <amarkovic@wavecomp.com> - <pbonzini@redhat.com> - " <aurelien@aurel32.net>\0" - "\01:1\0" + "Cc\0peter.maydell@linaro.org" + walling@linux.ibm.com + sagark@eecs.berkeley.edu + david@redhat.com + palmer@sifive.com + mark.cave-ayland@ilande.co.uk + laurent@vivier.eu + Alistair.Francis@wdc.com + edgar.iglesias@gmail.com + arikalo@wavecomp.com + pasic@linux.ibm.com + borntraeger@de.ibm.com + rth@twiddle.net + atar4qemu@gmail.com + ehabkost@redhat.com + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + stefanha@redhat.com + shorne@gmail.com + david@gibson.dropbear.id.au + qemu-riscv@nongnu.org + kbastian@mail.uni-paderborn.de + cohuck@redhat.com + alex.williamson@redhat.com + qemu-ppc@nongnu.org + amarkovic@wavecomp.com + pbonzini@redhat.com + " aurelien@aurel32.net\0" + "\00:1\0" "b\0" "Now that MemOp has been pushed down into the memory API, we can\n" "collapse the two byte swaps adjust_endianness and handle_bswap into\n" @@ -273,265 +273,5 @@ " for (i = 0; i < mr->ioeventfd_nb; ++i) {\n" "--\n" 1.8.3.1 - "\01:2\0" - "b\0" - "<html>\r\n" - "<head>\r\n" - "<meta http-equiv=\"Content-Type\" content=\"text/html; charset=iso-8859-1\">\r\n" - "<style type=\"text/css\" style=\"display:none\"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style>\r\n" - "</head>\r\n" - "<body dir=\"ltr\" style=\"font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;\">\r\n" - "<p></p>\r\n" - "<div><span style=\"font-size: 12pt;\">Now that MemOp has been pushed down into the memory API, we can</span><br>\r\n" - "</div>\r\n" - "<div>collapse the two byte swaps adjust_endianness and handle_bswap into</div>\r\n" - "<div>the former.</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>Collapsing byte swaps along the I/O path enables additional endian</div>\r\n" - "<div>inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant</div>\r\n" - "<div>byte swaps cancelling out.</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div>\r\n" - "<div>---</div>\r\n" - "<div> accel/tcg/cputlb.c | 58 +++++++++++++++++++++++++-----------------------------</div>\r\n" - "<div> memory.c | 30 ++++++++++++++++------------</div>\r\n" - "<div> 2 files changed, 44 insertions(+), 44 deletions(-)</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c</div>\r\n" - "<div>index a4a0bf7..e61b1eb 100644</div>\r\n" - "<div>--- a/accel/tcg/cputlb.c</div>\r\n" - "<div>+++ b/accel/tcg/cputlb.c</div>\r\n" - "<div>@@ -881,7 +881,7 @@ static void tlb_fill(CPUState *cpu, target_ulong addr, int size,</div>\r\n" - "<div> </div>\r\n" - "<div> static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> int mmu_idx, target_ulong addr, uintptr_t retaddr,</div>\r\n" - "<div>- MMUAccessType access_type, int size)</div>\r\n" - "<div>+ MMUAccessType access_type, MemOp op)</div>\r\n" - "<div> {</div>\r\n" - "<div> CPUState *cpu = env_cpu(env);</div>\r\n" - "<div> hwaddr mr_offset;</div>\r\n" - "<div>@@ -906,14 +906,13 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> qemu_mutex_lock_iothread();</div>\r\n" - "<div> locked = true;</div>\r\n" - "<div> }</div>\r\n" - "<div>- r = memory_region_dispatch_read(mr, mr_offset, &val, SIZE_MEMOP(size),</div>\r\n" - "<div>- iotlbentry->attrs);</div>\r\n" - "<div>+ r = memory_region_dispatch_read(mr, mr_offset, &val, op, iotlbentry->attrs);</div>\r\n" - "<div> if (r != MEMTX_OK) {</div>\r\n" - "<div> hwaddr physaddr = mr_offset +</div>\r\n" - "<div> section->offset_within_address_space -</div>\r\n" - "<div> section->offset_within_region;</div>\r\n" - "<div> </div>\r\n" - "<div>- cpu_transaction_failed(cpu, physaddr, addr, size, access_type,</div>\r\n" - "<div>+ cpu_transaction_failed(cpu, physaddr, addr, MEMOP_SIZE(op), access_type,</div>\r\n" - "<div> mmu_idx, iotlbentry->attrs, r, retaddr);</div>\r\n" - "<div> }</div>\r\n" - "<div> if (locked) {</div>\r\n" - "<div>@@ -925,7 +924,7 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> </div>\r\n" - "<div> static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> int mmu_idx, uint64_t val, target_ulong addr,</div>\r\n" - "<div>- uintptr_t retaddr, int size)</div>\r\n" - "<div>+ uintptr_t retaddr, MemOp op)</div>\r\n" - "<div> {</div>\r\n" - "<div> CPUState *cpu = env_cpu(env);</div>\r\n" - "<div> hwaddr mr_offset;</div>\r\n" - "<div>@@ -947,15 +946,15 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> qemu_mutex_lock_iothread();</div>\r\n" - "<div> locked = true;</div>\r\n" - "<div> }</div>\r\n" - "<div>- r = memory_region_dispatch_write(mr, mr_offset, val, SIZE_MEMOP(size),</div>\r\n" - "<div>- iotlbentry->attrs);</div>\r\n" - "<div>+ r = memory_region_dispatch_write(mr, mr_offset, val, op, iotlbentry->attrs);</div>\r\n" - "<div> if (r != MEMTX_OK) {</div>\r\n" - "<div> hwaddr physaddr = mr_offset +</div>\r\n" - "<div> section->offset_within_address_space -</div>\r\n" - "<div> section->offset_within_region;</div>\r\n" - "<div> </div>\r\n" - "<div>- cpu_transaction_failed(cpu, physaddr, addr, size, MMU_DATA_STORE,</div>\r\n" - "<div>- mmu_idx, iotlbentry->attrs, r, retaddr);</div>\r\n" - "<div>+ cpu_transaction_failed(cpu, physaddr, addr, MEMOP_SIZE(op),</div>\r\n" - "<div>+ MMU_DATA_STORE, mmu_idx, iotlbentry->attrs, r,</div>\r\n" - "<div>+ retaddr);</div>\r\n" - "<div> }</div>\r\n" - "<div> if (locked) {</div>\r\n" - "<div> qemu_mutex_unlock_iothread();</div>\r\n" - "<div>@@ -1210,26 +1209,13 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> #endif</div>\r\n" - "<div> </div>\r\n" - "<div> /*</div>\r\n" - "<div>- * Byte Swap Helper</div>\r\n" - "<div>+ * Byte Swap Checker</div>\r\n" - "<div> *</div>\r\n" - "<div>- * This should all dead code away depending on the build host and</div>\r\n" - "<div>- * access type.</div>\r\n" - "<div>+ * Dead code should all go away depending on the build host and access type.</div>\r\n" - "<div> */</div>\r\n" - "<div>-</div>\r\n" - "<div>-static inline uint64_t handle_bswap(uint64_t val, int size, bool big_endian)</div>\r\n" - "<div>+static inline bool need_bswap(bool big_endian)</div>\r\n" - "<div> {</div>\r\n" - "<div>- if ((big_endian && NEED_BE_BSWAP) || (!big_endian && NEED_LE_BSWAP)) {</div>\r\n" - "<div>- switch (size) {</div>\r\n" - "<div>- case 1: return val;</div>\r\n" - "<div>- case 2: return bswap16(val);</div>\r\n" - "<div>- case 4: return bswap32(val);</div>\r\n" - "<div>- case 8: return bswap64(val);</div>\r\n" - "<div>- default:</div>\r\n" - "<div>- g_assert_not_reached();</div>\r\n" - "<div>- }</div>\r\n" - "<div>- } else {</div>\r\n" - "<div>- return val;</div>\r\n" - "<div>- }</div>\r\n" - "<div>+ return (big_endian && NEED_BE_BSWAP) || (!big_endian && NEED_LE_BSWAP);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> /*</div>\r\n" - "<div>@@ -1260,6 +1246,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div>\r\n" - "<div> void *haddr;</div>\r\n" - "<div> uint64_t res;</div>\r\n" - "<div>+ MemOp op;</div>\r\n" - "<div> </div>\r\n" - "<div> /* Handle CPU specific unaligned behaviour */</div>\r\n" - "<div> if (addr & ((1 << a_bits) - 1)) {</div>\r\n" - "<div>@@ -1305,9 +1292,13 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>- res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],</div>\r\n" - "<div>- mmu_idx, addr, retaddr, access_type, size);</div>\r\n" - "<div>- return handle_bswap(res, size, big_endian);</div>\r\n" - "<div>+ op = SIZE_MEMOP(size);</div>\r\n" - "<div>+ if (need_bswap(big_endian)) {</div>\r\n" - "<div>+ op ^= MO_BSWAP;</div>\r\n" - "<div>+ }</div>\r\n" - "<div>+</div>\r\n" - "<div>+ return io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],</div>\r\n" - "<div>+ mmu_idx, addr, retaddr, access_type, op);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> /* Handle slow unaligned access (it spans two pages or IO). */</div>\r\n" - "<div>@@ -1508,6 +1499,7 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> const size_t tlb_off = offsetof(CPUTLBEntry, addr_write);</div>\r\n" - "<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div>\r\n" - "<div> void *haddr;</div>\r\n" - "<div>+ MemOp op;</div>\r\n" - "<div> </div>\r\n" - "<div> /* Handle CPU specific unaligned behaviour */</div>\r\n" - "<div> if (addr & ((1 << a_bits) - 1)) {</div>\r\n" - "<div>@@ -1553,9 +1545,13 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>+ op = SIZE_MEMOP(size);</div>\r\n" - "<div>+ if (need_bswap(big_endian)) {</div>\r\n" - "<div>+ op ^= MO_BSWAP;</div>\r\n" - "<div>+ }</div>\r\n" - "<div>+</div>\r\n" - "<div> io_writex(env, &env_tlb(env)->d[mmu_idx].iotlb[index], mmu_idx,</div>\r\n" - "<div>- handle_bswap(val, size, big_endian),</div>\r\n" - "<div>- addr, retaddr, size);</div>\r\n" - "<div>+ val, addr, retaddr, op);</div>\r\n" - "<div> return;</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>diff --git a/memory.c b/memory.c</div>\r\n" - "<div>index 6982e19..0277d3d 100644</div>\r\n" - "<div>--- a/memory.c</div>\r\n" - "<div>+++ b/memory.c</div>\r\n" - "<div>@@ -352,7 +352,7 @@ static bool memory_region_big_endian(MemoryRegion *mr)</div>\r\n" - "<div> #endif</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>-static bool memory_region_wrong_endianness(MemoryRegion *mr)</div>\r\n" - "<div>+static bool memory_region_endianness_inverted(MemoryRegion *mr)</div>\r\n" - "<div> {</div>\r\n" - "<div> #ifdef TARGET_WORDS_BIGENDIAN</div>\r\n" - "<div> return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;</div>\r\n" - "<div>@@ -361,23 +361,27 @@ static bool memory_region_wrong_endianness(MemoryRegion *mr)</div>\r\n" - "<div> #endif</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>-static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)</div>\r\n" - "<div>+static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)</div>\r\n" - "<div> {</div>\r\n" - "<div>- if (memory_region_wrong_endianness(mr)) {</div>\r\n" - "<div>- switch (size) {</div>\r\n" - "<div>- case 1:</div>\r\n" - "<div>+ if (memory_region_endianness_inverted(mr)) {</div>\r\n" - "<div>+ op ^= MO_BSWAP;</div>\r\n" - "<div>+ }</div>\r\n" - "<div>+</div>\r\n" - "<div>+ if (op & MO_BSWAP) {</div>\r\n" - "<div>+ switch (op & MO_SIZE) {</div>\r\n" - "<div>+ case MO_8:</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 2:</div>\r\n" - "<div>+ case MO_16:</div>\r\n" - "<div> *data = bswap16(*data);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 4:</div>\r\n" - "<div>+ case MO_32:</div>\r\n" - "<div> *data = bswap32(*data);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 8:</div>\r\n" - "<div>+ case MO_64:</div>\r\n" - "<div> *data = bswap64(*data);</div>\r\n" - "<div> break;</div>\r\n" - "<div> default:</div>\r\n" - "<div>- abort();</div>\r\n" - "<div>+ g_assert_not_reached();</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div>@@ -1451,7 +1455,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr,</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);</div>\r\n" - "<div>- adjust_endianness(mr, pval, size);</div>\r\n" - "<div>+ adjust_endianness(mr, pval, op);</div>\r\n" - "<div> return r;</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1494,7 +1498,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr,</div>\r\n" - "<div> return MEMTX_DECODE_ERROR;</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>- adjust_endianness(mr, &data, size);</div>\r\n" - "<div>+ adjust_endianness(mr, &data, op);</div>\r\n" - "<div> </div>\r\n" - "<div> if ((!kvm_eventfds_enabled()) &&</div>\r\n" - "<div> memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {</div>\r\n" - "<div>@@ -2340,7 +2344,7 @@ void memory_region_add_eventfd(MemoryRegion *mr,</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> if (size) {</div>\r\n" - "<div>- adjust_endianness(mr, &mrfd.data, size);</div>\r\n" - "<div>+ adjust_endianness(mr, &mrfd.data, SIZE_MEMOP(size));</div>\r\n" - "<div> }</div>\r\n" - "<div> memory_region_transaction_begin();</div>\r\n" - "<div> for (i = 0; i < mr->ioeventfd_nb; ++i) {</div>\r\n" - "<div>@@ -2375,7 +2379,7 @@ void memory_region_del_eventfd(MemoryRegion *mr,</div>\r\n" - "<div> unsigned i;</div>\r\n" - "<div> </div>\r\n" - "<div> if (size) {</div>\r\n" - "<div>- adjust_endianness(mr, &mrfd.data, size);</div>\r\n" - "<div>+ adjust_endianness(mr, &mrfd.data, SIZE_MEMOP(size));</div>\r\n" - "<div> }</div>\r\n" - "<div> memory_region_transaction_begin();</div>\r\n" - "<div> for (i = 0; i < mr->ioeventfd_nb; ++i) {</div>\r\n" - "<div>-- </div>\r\n" - "<div>1.8.3.1</div>\r\n" - "<div><br>\r\n" - "<br>\r\n" - "</div>\r\n" - "<p><br>\r\n" - "</p>\r\n" - "</body>\r\n" - "</html>\r\n" -063d896433154404e22fb1ac59b1e3d976e07a82e4b798b1b1dcd02394c04bb1 +1cbbad97691bb76addb8da85eddb2d61ebeccb89a29f2649a73a244ad39ce49e
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