From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.86_2) id 1hqtzC-00054B-T4 for mharc-qemu-riscv@gnu.org; Fri, 26 Jul 2019 02:45:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43442) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqtz8-0004sp-HK for qemu-riscv@nongnu.org; Fri, 26 Jul 2019 02:45:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hqtz1-0000U9-Kw for qemu-riscv@nongnu.org; Fri, 26 Jul 2019 02:45:42 -0400 Received: from smtpe1.intersmtp.com ([62.239.224.234]:29496) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hqtyo-0000Fk-Ku; Fri, 26 Jul 2019 02:45:31 -0400 Received: from tpw09926dag18f.domain1.systemhost.net (10.9.212.26) by RDW083A012ED68.bt.com (10.187.98.38) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 26 Jul 2019 07:44:43 +0100 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by tpw09926dag18f.domain1.systemhost.net (10.9.212.26) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 26 Jul 2019 07:45:20 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Fri, 26 Jul 2019 07:45:20 +0100 From: To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Thread-Topic: [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: Access MemoryRegion with MemOp Thread-Index: AQHVQ32xmZrzMOQ0Z0aD7OWVKxhuxQ== Date: Fri, 26 Jul 2019 06:45:20 +0000 Message-ID: <1564123519581.61197@bt.com> References: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.42] Content-Type: multipart/alternative; boundary="_000_156412351958161197btcom_" MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 62.239.224.234 Subject: [Qemu-riscv] [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: Access MemoryRegion with MemOp X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Jul 2019 06:45:49 -0000 --_000_156412351958161197btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable No-op SIZE_MEMOP macro allows us to later easily convert memory_region_dispatch_{read|write} paramter "unsigned size" into a size+sign+endianness encoded "MemOp op". Being a no-op macro, this patch does not introduce any logical change. Signed-off-by: Tony Nguyen Reviewed-by: Philippe Mathieu-Daud=E9 --- hw/intc/armv7m_nvic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 9f8f0d3..25bb88a 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -18,6 +18,7 @@ #include "hw/intc/armv7m_nvic.h" #include "target/arm/cpu.h" #include "exec/exec-all.h" +#include "exec/memop.h" #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" @@ -2345,7 +2346,8 @@ static MemTxResult nvic_sysreg_ns_write(void *opaque,= hwaddr addr, if (attrs.secure) { /* S accesses to the alias act like NS accesses to the real region= */ attrs.secure =3D 0; - return memory_region_dispatch_write(mr, addr, value, size, attrs); + return memory_region_dispatch_write(mr, addr, value, SIZE_MEMOP(si= ze), + attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -2364,7 +2366,8 @@ static MemTxResult nvic_sysreg_ns_read(void *opaque, = hwaddr addr, if (attrs.secure) { /* S accesses to the alias act like NS accesses to the real region= */ attrs.secure =3D 0; - return memory_region_dispatch_read(mr, addr, data, size, attrs); + return memory_region_dispatch_read(mr, addr, data, SIZE_MEMOP(size= ), + attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -2390,7 +2393,8 @@ static MemTxResult nvic_systick_write(void *opaque, h= waddr addr, /* Direct the access to the correct systick */ mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]= ), 0); - return memory_region_dispatch_write(mr, addr, value, size, attrs); + return memory_region_dispatch_write(mr, addr, value, SIZE_MEMOP(size), + attrs); } static MemTxResult nvic_systick_read(void *opaque, hwaddr addr, @@ -2402,7 +2406,7 @@ static MemTxResult nvic_systick_read(void *opaque, hw= addr addr, /* Direct the access to the correct systick */ mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]= ), 0); - return memory_region_dispatch_read(mr, addr, data, size, attrs); + return memory_region_dispatch_read(mr, addr, data, SIZE_MEMOP(size), a= ttrs); } static const MemoryRegionOps nvic_systick_ops =3D { -- 1.8.3.1 --_000_156412351958161197btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

No-op SIZE_MEMOP macro allows us to l= ater easily convert
memory_region_dispatch_{read|write} paramter "unsigned size"= into a
size+sign+endianness encoded "MemOp op".

Being a no-op macro, this patch does not introduce any logical change.=

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Philippe Mathieu-Daud=E9 <philmd@redhat.com>
---
 hw/intc/armv7m_nvic.c | 12 +++++++&#= 43;----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 9f8f0d3..25bb88a 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -18,6 +18,7 @@
 #include "hw/intc/armv7m_nvic.h"
 #include "target/arm/cpu.h"
 #include "exec/exec-all.h"
+#include "exec/memop.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "trace.h"
@@ -2345,7 +2346,8 @@ static MemTxResult nvic_sysreg_ns_write(void= *opaque, hwaddr addr,
     if (attrs.secure) {
         /* S accesses to the alias act like = NS accesses to the real region */
         attrs.secure =3D 0;
-        return memory_region_dispatch_write(mr, a= ddr, value, size, attrs);
+        return memory_region_dispatch_write(m= r, addr, value, SIZE_MEMOP(size),
+                   &= nbsp;                    =    attrs);
     } else {
         /* NS attrs are RAZ/WI for privilege= d, and BusFault for user */
         if (attrs.user) {
@@ -2364,7 +2366,8 @@ static MemTxResult nvic_sysreg_ns_read(void = *opaque, hwaddr addr,
     if (attrs.secure) {
         /* S accesses to the alias act like = NS accesses to the real region */
         attrs.secure =3D 0;
-        return memory_region_dispatch_read(mr, ad= dr, data, size, attrs);
+        return memory_region_dispatch_read(mr= , addr, data, SIZE_MEMOP(size),
+                   &= nbsp;                    =   attrs);
     } else {
         /* NS attrs are RAZ/WI for privilege= d, and BusFault for user */
         if (attrs.user) {
@@ -2390,7 +2393,8 @@ static MemTxResult nvic_systick_write(void *= opaque, hwaddr addr,
 
     /* Direct the access to the correct systick */
     mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&= s->systick[attrs.secure]), 0);
-    return memory_region_dispatch_write(mr, addr, value, si= ze, attrs);
+    return memory_region_dispatch_write(mr, addr, value= , SIZE_MEMOP(size),
+                   &= nbsp;                    = attrs);
 }
 
 static MemTxResult nvic_systick_read(void *opaque, hwaddr addr,<= /div>
@@ -2402,7 +2406,7 @@ static MemTxResult nvic_systick_read(void *o= paque, hwaddr addr,
 
     /* Direct the access to the correct systick */
     mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&= s->systick[attrs.secure]), 0);
-    return memory_region_dispatch_read(mr, addr, data, size= , attrs);
+    return memory_region_dispatch_read(mr, addr, data, = SIZE_MEMOP(size), attrs);
 }
 
 static const MemoryRegionOps nvic_systick_ops =3D {
-- 
1.8.3.1



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[209.51.188.17]) by mx.google.com with ESMTPS id n9si33834915qta.275.2019.07.25.23.46.14 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 25 Jul 2019 23:46:14 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=bt.com Received: from localhost ([::1]:36636 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqtzX-0005fp-Si for alex.bennee@linaro.org; Fri, 26 Jul 2019 02:46:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43770) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqtzQ-0005Ww-7H for qemu-arm@nongnu.org; Fri, 26 Jul 2019 02:46:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hqtzJ-0000hk-DK for qemu-arm@nongnu.org; Fri, 26 Jul 2019 02:46:00 -0400 Received: from smtpe1.intersmtp.com ([62.239.224.234]:29496) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hqtyo-0000Fk-Ku; Fri, 26 Jul 2019 02:45:31 -0400 Received: from tpw09926dag18f.domain1.systemhost.net (10.9.212.26) by RDW083A012ED68.bt.com (10.187.98.38) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 26 Jul 2019 07:44:43 +0100 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by tpw09926dag18f.domain1.systemhost.net (10.9.212.26) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 26 Jul 2019 07:45:20 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Fri, 26 Jul 2019 07:45:20 +0100 From: To: Thread-Topic: [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: Access MemoryRegion with MemOp Thread-Index: AQHVQ32xmZrzMOQ0Z0aD7OWVKxhuxQ== Date: Fri, 26 Jul 2019 06:45:20 +0000 Message-ID: <1564123519581.61197@bt.com> References: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.42] Content-Type: multipart/alternative; boundary="_000_156412351958161197btcom_" MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 62.239.224.234 Subject: [Qemu-arm] [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: Access MemoryRegion with MemOp X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, walling@linux.ibm.com, sagark@eecs.berkeley.edu, mst@redhat.com, palmer@sifive.com, mark.cave-ayland@ilande.co.uk, laurent@vivier.eu, Alistair.Francis@wdc.com, arikalo@wavecomp.com, david@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com, ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, stefanha@redhat.com, shorne@gmail.com, david@gibson.dropbear.id.au, qemu-riscv@nongnu.org, kbastian@mail.uni-paderborn.de, cohuck@redhat.com, alex.williamson@redhat.com, qemu-ppc@nongnu.org, amarkovic@wavecomp.com, pbonzini@redhat.com, aurelien@aurel32.net Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: V89g4yejT+LQ --_000_156412351958161197btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable No-op SIZE_MEMOP macro allows us to later easily convert memory_region_dispatch_{read|write} paramter "unsigned size" into a size+sign+endianness encoded "MemOp op". Being a no-op macro, this patch does not introduce any logical change. Signed-off-by: Tony Nguyen Reviewed-by: Philippe Mathieu-Daud=E9 --- hw/intc/armv7m_nvic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 9f8f0d3..25bb88a 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -18,6 +18,7 @@ #include "hw/intc/armv7m_nvic.h" #include "target/arm/cpu.h" #include "exec/exec-all.h" +#include "exec/memop.h" #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" @@ -2345,7 +2346,8 @@ static MemTxResult nvic_sysreg_ns_write(void *opaque,= hwaddr addr, if (attrs.secure) { /* S accesses to the alias act like NS accesses to the real region= */ attrs.secure =3D 0; - return memory_region_dispatch_write(mr, addr, value, size, attrs); + return memory_region_dispatch_write(mr, addr, value, SIZE_MEMOP(si= ze), + attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -2364,7 +2366,8 @@ static MemTxResult nvic_sysreg_ns_read(void *opaque, = hwaddr addr, if (attrs.secure) { /* S accesses to the alias act like NS accesses to the real region= */ attrs.secure =3D 0; - return memory_region_dispatch_read(mr, addr, data, size, attrs); + return memory_region_dispatch_read(mr, addr, data, SIZE_MEMOP(size= ), + attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -2390,7 +2393,8 @@ static MemTxResult nvic_systick_write(void *opaque, h= waddr addr, /* Direct the access to the correct systick */ mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]= ), 0); - return memory_region_dispatch_write(mr, addr, value, size, attrs); + return memory_region_dispatch_write(mr, addr, value, SIZE_MEMOP(size), + attrs); } static MemTxResult nvic_systick_read(void *opaque, hwaddr addr, @@ -2402,7 +2406,7 @@ static MemTxResult nvic_systick_read(void *opaque, hw= addr addr, /* Direct the access to the correct systick */ mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]= ), 0); - return memory_region_dispatch_read(mr, addr, data, size, attrs); + return memory_region_dispatch_read(mr, addr, data, SIZE_MEMOP(size), a= ttrs); } static const MemoryRegionOps nvic_systick_ops =3D { -- 1.8.3.1 --_000_156412351958161197btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

No-op SIZE_MEMOP macro allows us to l= ater easily convert
memory_region_dispatch_{read|write} paramter "unsigned size"= into a
size+sign+endianness encoded "MemOp op".

Being a no-op macro, this patch does not introduce any logical change.=

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Philippe Mathieu-Daud=E9 <philmd@redhat.com>
---
 hw/intc/armv7m_nvic.c | 12 +++++++&#= 43;----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 9f8f0d3..25bb88a 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -18,6 +18,7 @@
 #include "hw/intc/armv7m_nvic.h"
 #include "target/arm/cpu.h"
 #include "exec/exec-all.h"
+#include "exec/memop.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
 #include "trace.h"
@@ -2345,7 +2346,8 @@ static MemTxResult nvic_sysreg_ns_write(void= *opaque, hwaddr addr,
     if (attrs.secure) {
         /* S accesses to the alias act like = NS accesses to the real region */
         attrs.secure =3D 0;
-        return memory_region_dispatch_write(mr, a= ddr, value, size, attrs);
+        return memory_region_dispatch_write(m= r, addr, value, SIZE_MEMOP(size),
+                   &= nbsp;                    =    attrs);
     } else {
         /* NS attrs are RAZ/WI for privilege= d, and BusFault for user */
         if (attrs.user) {
@@ -2364,7 +2366,8 @@ static MemTxResult nvic_sysreg_ns_read(void = *opaque, hwaddr addr,
     if (attrs.secure) {
         /* S accesses to the alias act like = NS accesses to the real region */
         attrs.secure =3D 0;
-        return memory_region_dispatch_read(mr, ad= dr, data, size, attrs);
+        return memory_region_dispatch_read(mr= , addr, data, SIZE_MEMOP(size),
+                   &= nbsp;                    =   attrs);
     } else {
         /* NS attrs are RAZ/WI for privilege= d, and BusFault for user */
         if (attrs.user) {
@@ -2390,7 +2393,8 @@ static MemTxResult nvic_systick_write(void *= opaque, hwaddr addr,
 
     /* Direct the access to the correct systick */
     mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&= s->systick[attrs.secure]), 0);
-    return memory_region_dispatch_write(mr, addr, value, si= ze, attrs);
+    return memory_region_dispatch_write(mr, addr, value= , SIZE_MEMOP(size),
+                   &= nbsp;                    = attrs);
 }
 
 static MemTxResult nvic_systick_read(void *opaque, hwaddr addr,<= /div>
@@ -2402,7 +2406,7 @@ static MemTxResult nvic_systick_read(void *o= paque, hwaddr addr,
 
     /* Direct the access to the correct systick */
     mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&= s->systick[attrs.secure]), 0);
-    return memory_region_dispatch_read(mr, addr, data, size= , attrs);
+    return memory_region_dispatch_read(mr, addr, data, = SIZE_MEMOP(size), attrs);
 }
 
 static const MemoryRegionOps nvic_systick_ops =3D {
-- 
1.8.3.1



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X-Received-From: 62.239.224.234 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.23 Subject: [Qemu-devel] [PATCH v5 05/15] hw/intc/armv7m_nic: Access MemoryRegion with MemOp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, walling@linux.ibm.com, sagark@eecs.berkeley.edu, mst@redhat.com, palmer@sifive.com, mark.cave-ayland@ilande.co.uk, laurent@vivier.eu, Alistair.Francis@wdc.com, edgar.iglesias@gmail.com, arikalo@wavecomp.com, david@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com, ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, stefanha@redhat.com, shorne@gmail.com, david@gibson.dropbear.id.au, qemu-riscv@nongnu.org, kbastian@mail.uni-paderborn.de, cohuck@redhat.com, alex.williamson@redhat.com, qemu-ppc@nongnu.org, amarkovic@wavecomp.com, pbonzini@redhat.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" No-op SIZE_MEMOP macro allows us to later easily convert memory_region_dispatch_{read|write} paramter "unsigned size" into a size+sign+endianness encoded "MemOp op". Being a no-op macro, this patch does not introduce any logical change. Signed-off-by: Tony Nguyen Reviewed-by: Philippe Mathieu-Daud=E9 --- hw/intc/armv7m_nvic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 9f8f0d3..25bb88a 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -18,6 +18,7 @@ #include "hw/intc/armv7m_nvic.h" #include "target/arm/cpu.h" #include "exec/exec-all.h" +#include "exec/memop.h" #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" @@ -2345,7 +2346,8 @@ static MemTxResult nvic_sysreg_ns_write(void *opaque,= hwaddr addr, if (attrs.secure) { /* S accesses to the alias act like NS accesses to the real region= */ attrs.secure =3D 0; - return memory_region_dispatch_write(mr, addr, value, size, attrs); + return memory_region_dispatch_write(mr, addr, value, SIZE_MEMOP(si= ze), + attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -2364,7 +2366,8 @@ static MemTxResult nvic_sysreg_ns_read(void *opaque, = hwaddr addr, if (attrs.secure) { /* S accesses to the alias act like NS accesses to the real region= */ attrs.secure =3D 0; - return memory_region_dispatch_read(mr, addr, data, size, attrs); + return memory_region_dispatch_read(mr, addr, data, SIZE_MEMOP(size= ), + attrs); } else { /* NS attrs are RAZ/WI for privileged, and BusFault for user */ if (attrs.user) { @@ -2390,7 +2393,8 @@ static MemTxResult nvic_systick_write(void *opaque, h= waddr addr, /* Direct the access to the correct systick */ mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]= ), 0); - return memory_region_dispatch_write(mr, addr, value, size, attrs); + return memory_region_dispatch_write(mr, addr, value, SIZE_MEMOP(size), + attrs); } static MemTxResult nvic_systick_read(void *opaque, hwaddr addr, @@ -2402,7 +2406,7 @@ static MemTxResult nvic_systick_read(void *opaque, hw= addr addr, /* Direct the access to the correct systick */ mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]= ), 0); - return memory_region_dispatch_read(mr, addr, data, size, attrs); + return memory_region_dispatch_read(mr, addr, data, SIZE_MEMOP(size), a= ttrs); } static const MemoryRegionOps nvic_systick_ops =3D { -- 1.8.3.1