From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.86_2) id 1hqu0A-0008EW-Qx for mharc-qemu-riscv@gnu.org; Fri, 26 Jul 2019 02:46:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47097) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqu05-0007tL-Ly for qemu-riscv@nongnu.org; Fri, 26 Jul 2019 02:46:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hqu02-0002Bf-Dj for qemu-riscv@nongnu.org; Fri, 26 Jul 2019 02:46:44 -0400 Received: from smtpe1.intersmtp.com ([62.239.224.237]:8668) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hqtzw-00027I-Mn; Fri, 26 Jul 2019 02:46:40 -0400 Received: from tpw09926dag18h.domain1.systemhost.net (10.9.212.42) by RDW083A010ED66.bt.com (10.187.98.36) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 26 Jul 2019 07:45:42 +0100 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by tpw09926dag18h.domain1.systemhost.net (10.9.212.42) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 26 Jul 2019 07:46:33 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Fri, 26 Jul 2019 07:46:33 +0100 From: To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Thread-Topic: [Qemu-devel] [PATCH v5 08/15] exec: Access MemoryRegion with MemOp Thread-Index: AQHVQ33c+7KJC5c7EkCSxxIi+HBNhg== Date: Fri, 26 Jul 2019 06:46:33 +0000 Message-ID: <1564123592639.10426@bt.com> References: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.42] Content-Type: multipart/alternative; boundary="_000_156412359263910426btcom_" MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 62.239.224.237 Subject: [Qemu-riscv] [Qemu-devel] [PATCH v5 08/15] exec: Access MemoryRegion with MemOp X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Jul 2019 06:46:49 -0000 --_000_156412359263910426btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable No-op SIZE_MEMOP macro allows us to later easily convert memory_region_dispatch_{read|write} paramter "unsigned size" into a size+sign+endianness encoded "MemOp op". Being a no-op macro, this patch does not introduce any logical change. Signed-off-by: Tony Nguyen Reviewed-by: Philippe Mathieu-Daud=E9 --- exec.c | 6 ++++-- memory_ldst.inc.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/exec.c b/exec.c index 3e78de3..5013864 100644 --- a/exec.c +++ b/exec.c @@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(FlatView *= fv, hwaddr addr, /* XXX: could force current_cpu to NULL to avoid potential bugs */ val =3D ldn_p(buf, l); - result |=3D memory_region_dispatch_write(mr, addr1, val, l, at= trs); + result |=3D memory_region_dispatch_write(mr, addr1, val, + SIZE_MEMOP(l), attrs); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwad= dr addr, /* I/O case */ release_lock |=3D prepare_mmio_access(mr); l =3D memory_access_size(mr, l, addr1); - result |=3D memory_region_dispatch_read(mr, addr1, &val, l, at= trs); + result |=3D memory_region_dispatch_read(mr, addr1, &val, + SIZE_MEMOP(l), attrs); stn_p(buf, l, val); } else { /* RAM case */ diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index acf865b..e073cf9 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 4, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(4), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap32(val); @@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 8, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(8), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap64(val); @@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 1, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 2, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(2), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap16(val); @@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL= , if (l < 4 || !memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(4), = attrs); } else { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); stl_p(ptr, val); @@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, val =3D bswap32(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(4), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 1, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, val =3D bswap16(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 2, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(2), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, val =3D bswap64(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 8, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(8), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); -- 1.8.3.1 --_000_156412359263910426btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

No-op SIZE_MEMOP macro allows us to l= ater easily convert
memory_region_dispatch_{read|write} paramter "unsigned size"= into a
size+sign+endianness encoded "MemOp op".

Being a no-op macro, this patch does not introduce any logical change.=

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Philippe Mathieu-Daud=E9 <philmd@redhat.com>
---
 exec.c            |  6 +&= #43;++--
 memory_ldst.inc.c | 18 ++++++++&= #43;---------
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/exec.c b/exec.c
index 3e78de3..5013864 100644
--- a/exec.c
+++ b/exec.c
@@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(F= latView *fv, hwaddr addr,
             /* XXX: could force cu= rrent_cpu to NULL to avoid
                potential bugs= */
             val =3D ldn_p(buf, l);=
-            result |=3D memory_region_d= ispatch_write(mr, addr1, val, l, attrs);
+            result |=3D memory_regi= on_dispatch_write(mr, addr1, val,
+                   &= nbsp;                    =           SIZE_MEMOP(l), attrs);
         } else {
             /* RAM case */
             ptr =3D qemu_ram_ptr_l= ength(mr->ram_block, addr1, &l, false);
@@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView = *fv, hwaddr addr,
             /* I/O case */
             release_lock |=3D prep= are_mmio_access(mr);
             l =3D memory_access_si= ze(mr, l, addr1);
-            result |=3D memory_region_d= ispatch_read(mr, addr1, &val, l, attrs);
+            result |=3D memory_regi= on_dispatch_read(mr, addr1, &val,
+                   &= nbsp;                    =          SIZE_MEMOP(l), attrs);
             stn_p(buf, l, val);
         } else {
             /* RAM case */
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index acf865b..e073cf9 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_in= ternal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 4, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(4), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap32(val);<= /div>
@@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_= internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 8, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(8), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap64(val);<= /div>
@@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1= _DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 1, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw= _internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 2, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(2), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap16(val);<= /div>
@@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(= ARG1_DECL,
     if (l < 4 || !memory_access_is_direct(mr, true)= ) {
         release_lock |=3D prepare_mmio_acces= s(mr);
 
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(4), attrs);
     } else {
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
         stl_p(ptr, val);
@@ -346,7 +346,7 @@ static inline void glue(address_space_stl_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap32(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(4), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL= ,
     mr =3D TRANSLATE(addr, &addr1, &l, true, a= ttrs);
     if (!memory_access_is_direct(mr, true)) {
         release_lock |=3D prepare_mmio_acces= s(mr);
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 1, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -451,7 +451,7 @@ static inline void glue(address_space_stw_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap16(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 2, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(2), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, S= UFFIX)(ARG1_DECL,
             val =3D bswap64(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 8, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(8), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
-- 
1.8.3.1



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[209.51.188.17]) by mx.google.com with ESMTPS id n37si30363378qte.331.2019.07.25.23.47.20 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 25 Jul 2019 23:47:20 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=bt.com Received: from localhost ([::1]:36680 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqu0c-00016a-5S for alex.bennee@linaro.org; Fri, 26 Jul 2019 02:47:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48441) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqu0F-0008VQ-4K for qemu-arm@nongnu.org; Fri, 26 Jul 2019 02:46:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hqu0D-0002hV-1h for qemu-arm@nongnu.org; Fri, 26 Jul 2019 02:46:54 -0400 Received: from smtpe1.intersmtp.com ([62.239.224.237]:8668) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hqtzw-00027I-Mn; Fri, 26 Jul 2019 02:46:40 -0400 Received: from tpw09926dag18h.domain1.systemhost.net (10.9.212.42) by RDW083A010ED66.bt.com (10.187.98.36) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 26 Jul 2019 07:45:42 +0100 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by tpw09926dag18h.domain1.systemhost.net (10.9.212.42) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 26 Jul 2019 07:46:33 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Fri, 26 Jul 2019 07:46:33 +0100 From: To: Thread-Topic: [Qemu-devel] [PATCH v5 08/15] exec: Access MemoryRegion with MemOp Thread-Index: AQHVQ33c+7KJC5c7EkCSxxIi+HBNhg== Date: Fri, 26 Jul 2019 06:46:33 +0000 Message-ID: <1564123592639.10426@bt.com> References: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.42] Content-Type: multipart/alternative; boundary="_000_156412359263910426btcom_" MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 62.239.224.237 Subject: [Qemu-arm] [Qemu-devel] [PATCH v5 08/15] exec: Access MemoryRegion with MemOp X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, walling@linux.ibm.com, sagark@eecs.berkeley.edu, mst@redhat.com, palmer@sifive.com, mark.cave-ayland@ilande.co.uk, laurent@vivier.eu, Alistair.Francis@wdc.com, arikalo@wavecomp.com, david@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com, ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, stefanha@redhat.com, shorne@gmail.com, david@gibson.dropbear.id.au, qemu-riscv@nongnu.org, kbastian@mail.uni-paderborn.de, cohuck@redhat.com, alex.williamson@redhat.com, qemu-ppc@nongnu.org, amarkovic@wavecomp.com, pbonzini@redhat.com, aurelien@aurel32.net Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: hxZQAT9/p7zI --_000_156412359263910426btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable No-op SIZE_MEMOP macro allows us to later easily convert memory_region_dispatch_{read|write} paramter "unsigned size" into a size+sign+endianness encoded "MemOp op". Being a no-op macro, this patch does not introduce any logical change. Signed-off-by: Tony Nguyen Reviewed-by: Philippe Mathieu-Daud=E9 --- exec.c | 6 ++++-- memory_ldst.inc.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/exec.c b/exec.c index 3e78de3..5013864 100644 --- a/exec.c +++ b/exec.c @@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(FlatView *= fv, hwaddr addr, /* XXX: could force current_cpu to NULL to avoid potential bugs */ val =3D ldn_p(buf, l); - result |=3D memory_region_dispatch_write(mr, addr1, val, l, at= trs); + result |=3D memory_region_dispatch_write(mr, addr1, val, + SIZE_MEMOP(l), attrs); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwad= dr addr, /* I/O case */ release_lock |=3D prepare_mmio_access(mr); l =3D memory_access_size(mr, l, addr1); - result |=3D memory_region_dispatch_read(mr, addr1, &val, l, at= trs); + result |=3D memory_region_dispatch_read(mr, addr1, &val, + SIZE_MEMOP(l), attrs); stn_p(buf, l, val); } else { /* RAM case */ diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index acf865b..e073cf9 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 4, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(4), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap32(val); @@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 8, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(8), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap64(val); @@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 1, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 2, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(2), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap16(val); @@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL= , if (l < 4 || !memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(4), = attrs); } else { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); stl_p(ptr, val); @@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, val =3D bswap32(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(4), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 1, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, val =3D bswap16(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 2, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(2), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, val =3D bswap64(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 8, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(8), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); -- 1.8.3.1 --_000_156412359263910426btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

No-op SIZE_MEMOP macro allows us to l= ater easily convert
memory_region_dispatch_{read|write} paramter "unsigned size"= into a
size+sign+endianness encoded "MemOp op".

Being a no-op macro, this patch does not introduce any logical change.=

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Philippe Mathieu-Daud=E9 <philmd@redhat.com>
---
 exec.c            |  6 +&= #43;++--
 memory_ldst.inc.c | 18 ++++++++&= #43;---------
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/exec.c b/exec.c
index 3e78de3..5013864 100644
--- a/exec.c
+++ b/exec.c
@@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(F= latView *fv, hwaddr addr,
             /* XXX: could force cu= rrent_cpu to NULL to avoid
                potential bugs= */
             val =3D ldn_p(buf, l);=
-            result |=3D memory_region_d= ispatch_write(mr, addr1, val, l, attrs);
+            result |=3D memory_regi= on_dispatch_write(mr, addr1, val,
+                   &= nbsp;                    =           SIZE_MEMOP(l), attrs);
         } else {
             /* RAM case */
             ptr =3D qemu_ram_ptr_l= ength(mr->ram_block, addr1, &l, false);
@@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView = *fv, hwaddr addr,
             /* I/O case */
             release_lock |=3D prep= are_mmio_access(mr);
             l =3D memory_access_si= ze(mr, l, addr1);
-            result |=3D memory_region_d= ispatch_read(mr, addr1, &val, l, attrs);
+            result |=3D memory_regi= on_dispatch_read(mr, addr1, &val,
+                   &= nbsp;                    =          SIZE_MEMOP(l), attrs);
             stn_p(buf, l, val);
         } else {
             /* RAM case */
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index acf865b..e073cf9 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_in= ternal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 4, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(4), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap32(val);<= /div>
@@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_= internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 8, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(8), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap64(val);<= /div>
@@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1= _DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 1, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw= _internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 2, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, SIZE_MEMOP(2), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap16(val);<= /div>
@@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(= ARG1_DECL,
     if (l < 4 || !memory_access_is_direct(mr, true)= ) {
         release_lock |=3D prepare_mmio_acces= s(mr);
 
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(4), attrs);
     } else {
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
         stl_p(ptr, val);
@@ -346,7 +346,7 @@ static inline void glue(address_space_stl_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap32(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(4), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL= ,
     mr =3D TRANSLATE(addr, &addr1, &l, true, a= ttrs);
     if (!memory_access_is_direct(mr, true)) {
         release_lock |=3D prepare_mmio_acces= s(mr);
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 1, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -451,7 +451,7 @@ static inline void glue(address_space_stw_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap16(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 2, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(2), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, S= UFFIX)(ARG1_DECL,
             val =3D bswap64(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 8, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, SIZE_MEMOP(8), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
-- 
1.8.3.1



--_000_156412359263910426btcom_-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2800C7618B for ; Fri, 26 Jul 2019 06:48:10 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A85FC218B8 for ; Fri, 26 Jul 2019 06:48:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A85FC218B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=bt.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36722 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqu1R-0004A3-V3 for qemu-devel@archiver.kernel.org; Fri, 26 Jul 2019 02:48:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49103) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hqu0K-0000LQ-Rg for qemu-devel@nongnu.org; Fri, 26 Jul 2019 02:47:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hqu0G-0002rm-Vc for qemu-devel@nongnu.org; Fri, 26 Jul 2019 02:46:59 -0400 Received: from smtpe1.intersmtp.com ([62.239.224.237]:8668) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hqtzw-00027I-Mn; Fri, 26 Jul 2019 02:46:40 -0400 Received: from tpw09926dag18h.domain1.systemhost.net (10.9.212.42) by RDW083A010ED66.bt.com (10.187.98.36) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 26 Jul 2019 07:45:42 +0100 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by tpw09926dag18h.domain1.systemhost.net (10.9.212.42) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 26 Jul 2019 07:46:33 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Fri, 26 Jul 2019 07:46:33 +0100 From: To: Thread-Topic: [Qemu-devel] [PATCH v5 08/15] exec: Access MemoryRegion with MemOp Thread-Index: AQHVQ33c+7KJC5c7EkCSxxIi+HBNhg== Date: Fri, 26 Jul 2019 06:46:33 +0000 Message-ID: <1564123592639.10426@bt.com> References: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <3106a3c959c4498fad13a5799c89ba7b@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.42] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 62.239.224.237 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.23 Subject: [Qemu-devel] [PATCH v5 08/15] exec: Access MemoryRegion with MemOp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, walling@linux.ibm.com, sagark@eecs.berkeley.edu, mst@redhat.com, palmer@sifive.com, mark.cave-ayland@ilande.co.uk, laurent@vivier.eu, Alistair.Francis@wdc.com, edgar.iglesias@gmail.com, arikalo@wavecomp.com, david@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, rth@twiddle.net, atar4qemu@gmail.com, ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, stefanha@redhat.com, shorne@gmail.com, david@gibson.dropbear.id.au, qemu-riscv@nongnu.org, kbastian@mail.uni-paderborn.de, cohuck@redhat.com, alex.williamson@redhat.com, qemu-ppc@nongnu.org, amarkovic@wavecomp.com, pbonzini@redhat.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" No-op SIZE_MEMOP macro allows us to later easily convert memory_region_dispatch_{read|write} paramter "unsigned size" into a size+sign+endianness encoded "MemOp op". Being a no-op macro, this patch does not introduce any logical change. Signed-off-by: Tony Nguyen Reviewed-by: Philippe Mathieu-Daud=E9 --- exec.c | 6 ++++-- memory_ldst.inc.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/exec.c b/exec.c index 3e78de3..5013864 100644 --- a/exec.c +++ b/exec.c @@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(FlatView *= fv, hwaddr addr, /* XXX: could force current_cpu to NULL to avoid potential bugs */ val =3D ldn_p(buf, l); - result |=3D memory_region_dispatch_write(mr, addr1, val, l, at= trs); + result |=3D memory_region_dispatch_write(mr, addr1, val, + SIZE_MEMOP(l), attrs); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwad= dr addr, /* I/O case */ release_lock |=3D prepare_mmio_access(mr); l =3D memory_access_size(mr, l, addr1); - result |=3D memory_region_dispatch_read(mr, addr1, &val, l, at= trs); + result |=3D memory_region_dispatch_read(mr, addr1, &val, + SIZE_MEMOP(l), attrs); stn_p(buf, l, val); } else { /* RAM case */ diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index acf865b..e073cf9 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 4, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(4), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap32(val); @@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 8, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(8), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap64(val); @@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 1, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 2, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, SIZE_MEMOP(2), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap16(val); @@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL= , if (l < 4 || !memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(4), = attrs); } else { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); stl_p(ptr, val); @@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, val =3D bswap32(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(4), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 1, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, val =3D bswap16(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 2, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(2), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, val =3D bswap64(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 8, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, SIZE_MEMOP(8), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); -- 1.8.3.1