From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.86_2) id 1hvLdh-0006ZQ-8j for mharc-qemu-riscv@gnu.org; Wed, 07 Aug 2019 09:06:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43994) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvHJj-0002Xs-Mi for qemu-riscv@nongnu.org; Wed, 07 Aug 2019 04:29:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hvHJf-0000d8-32 for qemu-riscv@nongnu.org; Wed, 07 Aug 2019 04:29:07 -0400 Received: from smtpe1.intersmtp.com ([213.121.35.77]:2286) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hvHJe-0000cI-Dp; Wed, 07 Aug 2019 04:29:03 -0400 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by BWP09926082.bt.com (10.36.82.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1713.5; Wed, 7 Aug 2019 09:28:46 +0100 Received: from tpw09926dag18e.domain1.systemhost.net (10.9.212.18) by tpw09926dag18e.domain1.systemhost.net (10.9.212.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 7 Aug 2019 09:28:59 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Wed, 7 Aug 2019 09:28:59 +0100 From: To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Thread-Topic: [Qemu-devel] [PATCH v6 09/26] exec: Access MemoryRegion with MemOp Thread-Index: AQHVTPopl/eCIE+w30qkb8WHjtwBMw== Date: Wed, 7 Aug 2019 08:28:59 +0000 Message-ID: <1565166539442.24361@bt.com> References: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.44] Content-Type: multipart/alternative; boundary="_000_156516653944224361btcom_" MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 213.121.35.77 X-Mailman-Approved-At: Wed, 07 Aug 2019 09:05:47 -0400 Subject: [Qemu-riscv] [Qemu-devel] [PATCH v6 09/26] exec: Access MemoryRegion with MemOp X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Aug 2019 08:29:12 -0000 --_000_156516653944224361btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable The memory_region_dispatch_{read|write} operand "unsigned size" is being converted into a "MemOp op". Convert interfaces by using no-op size_memop. After all interfaces are converted, size_memop will be implemented and the memory_region_dispatch_{read|write} operand "unsigned size" will be converted into a "MemOp op". As size_memop is a no-op, this patch does not change any behaviour. Signed-off-by: Tony Nguyen Reviewed-by: Richard Henderson --- exec.c | 6 ++++-- memory_ldst.inc.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/exec.c b/exec.c index 3e78de3..9f69197 100644 --- a/exec.c +++ b/exec.c @@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(FlatView *= fv, hwaddr addr, /* XXX: could force current_cpu to NULL to avoid potential bugs */ val =3D ldn_p(buf, l); - result |=3D memory_region_dispatch_write(mr, addr1, val, l, at= trs); + result |=3D memory_region_dispatch_write(mr, addr1, val, + size_memop(l), attrs); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwad= dr addr, /* I/O case */ release_lock |=3D prepare_mmio_access(mr); l =3D memory_access_size(mr, l, addr1); - result |=3D memory_region_dispatch_read(mr, addr1, &val, l, at= trs); + result |=3D memory_region_dispatch_read(mr, addr1, &val, + size_memop(l), attrs); stn_p(buf, l, val); } else { /* RAM case */ diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index acf865b..1e8a2fc 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 4, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(4), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap32(val); @@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 8, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(8), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap64(val); @@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 1, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 2, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(2), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap16(val); @@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL= , if (l < 4 || !memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); } else { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); stl_p(ptr, val); @@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, val =3D bswap32(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 1, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, val =3D bswap16(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 2, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(2), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, val =3D bswap64(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 8, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(8), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); -- 1.8.3.1 ? --_000_156516653944224361btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

The memory_region_dispatch_{read|writ= e} operand "unsigned size" is
being converted into a "MemOp op".

Convert interfaces by using no-op size_memop.

After all interfaces are converted, size_memop will be implemented
and the memory_region_dispatch_{read|write} operand "unsigned siz= e"
will be converted into a "MemOp op".

As size_memop is a no-op, this patch does not change any behaviour.

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 exec.c            |  6 +&= #43;++--
 memory_ldst.inc.c | 18 ++++++++&= #43;---------
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/exec.c b/exec.c
index 3e78de3..9f69197 100644
--- a/exec.c
+++ b/exec.c
@@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(F= latView *fv, hwaddr addr,
             /* XXX: could force cu= rrent_cpu to NULL to avoid
                potential bugs= */
             val =3D ldn_p(buf, l);=
-            result |=3D memory_region_d= ispatch_write(mr, addr1, val, l, attrs);
+            result |=3D memory_regi= on_dispatch_write(mr, addr1, val,
+                   &= nbsp;                    =           size_memop(l), attrs);
         } else {
             /* RAM case */
             ptr =3D qemu_ram_ptr_l= ength(mr->ram_block, addr1, &l, false);
@@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView = *fv, hwaddr addr,
             /* I/O case */
             release_lock |=3D prep= are_mmio_access(mr);
             l =3D memory_access_si= ze(mr, l, addr1);
-            result |=3D memory_region_d= ispatch_read(mr, addr1, &val, l, attrs);
+            result |=3D memory_regi= on_dispatch_read(mr, addr1, &val,
+                   &= nbsp;                    =          size_memop(l), attrs);
             stn_p(buf, l, val);
         } else {
             /* RAM case */
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index acf865b..1e8a2fc 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_in= ternal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 4, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(4), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap32(val);<= /div>
@@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_= internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 8, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(8), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap64(val);<= /div>
@@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1= _DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 1, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw= _internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 2, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(2), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap16(val);<= /div>
@@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(= ARG1_DECL,
     if (l < 4 || !memory_access_is_direct(mr, true)= ) {
         release_lock |=3D prepare_mmio_acces= s(mr);
 
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(4), attrs);
     } else {
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
         stl_p(ptr, val);
@@ -346,7 +346,7 @@ static inline void glue(address_space_stl_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap32(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(4), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL= ,
     mr =3D TRANSLATE(addr, &addr1, &l, true, a= ttrs);
     if (!memory_access_is_direct(mr, true)) {
         release_lock |=3D prepare_mmio_acces= s(mr);
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 1, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -451,7 +451,7 @@ static inline void glue(address_space_stw_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap16(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 2, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(2), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, S= UFFIX)(ARG1_DECL,
             val =3D bswap64(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 8, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(8), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
-- 
1.8.3.1

​

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Wed, 7 Aug 2019 09:28:59 +0100 From: To: Thread-Topic: [Qemu-devel] [PATCH v6 09/26] exec: Access MemoryRegion with MemOp Thread-Index: AQHVTPopl/eCIE+w30qkb8WHjtwBMw== Date: Wed, 7 Aug 2019 08:28:59 +0000 Message-ID: <1565166539442.24361@bt.com> References: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.44] Content-Type: multipart/alternative; boundary="_000_156516653944224361btcom_" MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 213.121.35.77 Subject: [Qemu-arm] [Qemu-devel] [PATCH v6 09/26] exec: Access MemoryRegion with MemOp X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, peter.maydell@linaro.org, walling@linux.ibm.com, cohuck@redhat.com, sagark@eecs.berkeley.edu, david@redhat.com, jasowang@redhat.com, palmer@sifive.com, mark.cave-ayland@ilande.co.uk, i.mitsyanko@gmail.com, keith.busch@intel.com, jcmvbkbc@gmail.com, frederic.konrad@adacore.com, dmitry.fleytman@gmail.com, kraxel@redhat.com, gxt@mprc.pku.edu.cn, pburton@wavecomp.com, xiaoguangrong.eric@gmail.com, peter.chubb@nicta.com.au, philmd@redhat.com, robh@kernel.org, hare@suse.com, sstabellini@kernel.org, berto@igalia.com, chouteau@adacore.com, qemu-block@nongnu.org, arikalo@wavecomp.com, jslaby@suse.cz, deller@gmx.de, mst@redhat.com, magnus.damm@gmail.com, jcd@tribudubois.net, pasic@linux.ibm.com, borntraeger@de.ibm.com, mreitz@redhat.com, hpoussin@reactos.org, joel@jms.id.au, anthony.perard@citrix.com, xen-devel@lists.xenproject.org, david@gibson.dropbear.id.au, lersek@redhat.com, green@moxielogic.com, atar4qemu@gmail.com, antonynpavlov@gmail.com, marex@denx.de, jiri@resnulli.us, ehabkost@redhat.com, minyard@acm.org, qemu-s390x@nongnu.org, sw@weilnetz.de, alistair@alistair23.me, yuval.shaia@oracle.com, b.galvani@gmail.com, eric.auger@redhat.com, alex.williamson@redhat.com, qemu-arm@nongnu.org, jan.kiszka@web.de, clg@kaod.org, stefanha@redhat.com, marcandre.lureau@redhat.com, shorne@gmail.com, jsnow@redhat.com, rth@twiddle.net, kwolf@redhat.com, qemu-riscv@nongnu.org, proljc@gmail.com, pbonzini@redhat.com, andrew@aj.id.au, kbastian@mail.uni-paderborn.de, crwulff@gmail.com, laurent@vivier.eu, Andrew.Baumann@microsoft.com, sundeep.lkml@gmail.com, andrew.smirnov@gmail.com, michael@walle.cc, paul.durrant@citrix.com, qemu-ppc@nongnu.org, huth@tuxfamily.org, amarkovic@wavecomp.com, imammedo@redhat.com, aurelien@aurel32.net, stefanb@linux.ibm.com Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: Gaw+Eas3IYZ8 --_000_156516653944224361btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable The memory_region_dispatch_{read|write} operand "unsigned size" is being converted into a "MemOp op". Convert interfaces by using no-op size_memop. After all interfaces are converted, size_memop will be implemented and the memory_region_dispatch_{read|write} operand "unsigned size" will be converted into a "MemOp op". As size_memop is a no-op, this patch does not change any behaviour. Signed-off-by: Tony Nguyen Reviewed-by: Richard Henderson --- exec.c | 6 ++++-- memory_ldst.inc.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/exec.c b/exec.c index 3e78de3..9f69197 100644 --- a/exec.c +++ b/exec.c @@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(FlatView *= fv, hwaddr addr, /* XXX: could force current_cpu to NULL to avoid potential bugs */ val =3D ldn_p(buf, l); - result |=3D memory_region_dispatch_write(mr, addr1, val, l, at= trs); + result |=3D memory_region_dispatch_write(mr, addr1, val, + size_memop(l), attrs); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwad= dr addr, /* I/O case */ release_lock |=3D prepare_mmio_access(mr); l =3D memory_access_size(mr, l, addr1); - result |=3D memory_region_dispatch_read(mr, addr1, &val, l, at= trs); + result |=3D memory_region_dispatch_read(mr, addr1, &val, + size_memop(l), attrs); stn_p(buf, l, val); } else { /* RAM case */ diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index acf865b..1e8a2fc 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 4, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(4), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap32(val); @@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 8, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(8), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap64(val); @@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 1, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 2, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(2), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap16(val); @@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL= , if (l < 4 || !memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); } else { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); stl_p(ptr, val); @@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, val =3D bswap32(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 1, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, val =3D bswap16(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 2, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(2), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, val =3D bswap64(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 8, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(8), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); -- 1.8.3.1 ? --_000_156516653944224361btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

The memory_region_dispatch_{read|writ= e} operand "unsigned size" is
being converted into a "MemOp op".

Convert interfaces by using no-op size_memop.

After all interfaces are converted, size_memop will be implemented
and the memory_region_dispatch_{read|write} operand "unsigned siz= e"
will be converted into a "MemOp op".

As size_memop is a no-op, this patch does not change any behaviour.

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 exec.c            |  6 +&= #43;++--
 memory_ldst.inc.c | 18 ++++++++&= #43;---------
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/exec.c b/exec.c
index 3e78de3..9f69197 100644
--- a/exec.c
+++ b/exec.c
@@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(F= latView *fv, hwaddr addr,
             /* XXX: could force cu= rrent_cpu to NULL to avoid
                potential bugs= */
             val =3D ldn_p(buf, l);=
-            result |=3D memory_region_d= ispatch_write(mr, addr1, val, l, attrs);
+            result |=3D memory_regi= on_dispatch_write(mr, addr1, val,
+                   &= nbsp;                    =           size_memop(l), attrs);
         } else {
             /* RAM case */
             ptr =3D qemu_ram_ptr_l= ength(mr->ram_block, addr1, &l, false);
@@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView = *fv, hwaddr addr,
             /* I/O case */
             release_lock |=3D prep= are_mmio_access(mr);
             l =3D memory_access_si= ze(mr, l, addr1);
-            result |=3D memory_region_d= ispatch_read(mr, addr1, &val, l, attrs);
+            result |=3D memory_regi= on_dispatch_read(mr, addr1, &val,
+                   &= nbsp;                    =          size_memop(l), attrs);
             stn_p(buf, l, val);
         } else {
             /* RAM case */
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index acf865b..1e8a2fc 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_in= ternal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 4, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(4), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap32(val);<= /div>
@@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_= internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 8, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(8), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap64(val);<= /div>
@@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1= _DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 1, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw= _internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 2, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(2), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap16(val);<= /div>
@@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(= ARG1_DECL,
     if (l < 4 || !memory_access_is_direct(mr, true)= ) {
         release_lock |=3D prepare_mmio_acces= s(mr);
 
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(4), attrs);
     } else {
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
         stl_p(ptr, val);
@@ -346,7 +346,7 @@ static inline void glue(address_space_stl_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap32(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(4), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL= ,
     mr =3D TRANSLATE(addr, &addr1, &l, true, a= ttrs);
     if (!memory_access_is_direct(mr, true)) {
         release_lock |=3D prepare_mmio_acces= s(mr);
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 1, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -451,7 +451,7 @@ static inline void glue(address_space_stw_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap16(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 2, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(2), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, S= UFFIX)(ARG1_DECL,
             val =3D bswap64(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 8, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(8), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
-- 
1.8.3.1

​

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Wed, 7 Aug 2019 09:28:59 +0100 Received: from tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c]) by tpw09926dag18e.domain1.systemhost.net ([fe80::a946:6348:ccf4:fa6c%12]) with mapi id 15.00.1395.000; Wed, 7 Aug 2019 09:28:59 +0100 From: To: Thread-Topic: [Qemu-devel] [PATCH v6 09/26] exec: Access MemoryRegion with MemOp Thread-Index: AQHVTPopl/eCIE+w30qkb8WHjtwBMw== Date: Wed, 7 Aug 2019 08:28:59 +0000 Message-ID: <1565166539442.24361@bt.com> References: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net> In-Reply-To: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net> Accept-Language: en-AU, en-GB, en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.187.101.44] MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 07 Aug 2019 08:31:48 +0000 Subject: [Xen-devel] [Qemu-devel] [PATCH v6 09/26] exec: Access MemoryRegion with MemOp X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, peter.maydell@linaro.org, walling@linux.ibm.com, cohuck@redhat.com, sagark@eecs.berkeley.edu, david@redhat.com, jasowang@redhat.com, palmer@sifive.com, mark.cave-ayland@ilande.co.uk, i.mitsyanko@gmail.com, keith.busch@intel.com, jcmvbkbc@gmail.com, frederic.konrad@adacore.com, dmitry.fleytman@gmail.com, kraxel@redhat.com, edgar.iglesias@gmail.com, gxt@mprc.pku.edu.cn, pburton@wavecomp.com, xiaoguangrong.eric@gmail.com, peter.chubb@nicta.com.au, philmd@redhat.com, robh@kernel.org, hare@suse.com, sstabellini@kernel.org, berto@igalia.com, chouteau@adacore.com, qemu-block@nongnu.org, arikalo@wavecomp.com, jslaby@suse.cz, deller@gmx.de, mst@redhat.com, magnus.damm@gmail.com, jcd@tribudubois.net, pasic@linux.ibm.com, borntraeger@de.ibm.com, mreitz@redhat.com, hpoussin@reactos.org, joel@jms.id.au, anthony.perard@citrix.com, xen-devel@lists.xenproject.org, david@gibson.dropbear.id.au, lersek@redhat.com, green@moxielogic.com, atar4qemu@gmail.com, antonynpavlov@gmail.com, marex@denx.de, jiri@resnulli.us, ehabkost@redhat.com, minyard@acm.org, qemu-s390x@nongnu.org, sw@weilnetz.de, alistair@alistair23.me, yuval.shaia@oracle.com, b.galvani@gmail.com, eric.auger@redhat.com, alex.williamson@redhat.com, qemu-arm@nongnu.org, jan.kiszka@web.de, clg@kaod.org, stefanha@redhat.com, marcandre.lureau@redhat.com, shorne@gmail.com, jsnow@redhat.com, rth@twiddle.net, kwolf@redhat.com, qemu-riscv@nongnu.org, proljc@gmail.com, pbonzini@redhat.com, andrew@aj.id.au, kbastian@mail.uni-paderborn.de, crwulff@gmail.com, laurent@vivier.eu, Andrew.Baumann@microsoft.com, sundeep.lkml@gmail.com, andrew.smirnov@gmail.com, michael@walle.cc, paul.durrant@citrix.com, qemu-ppc@nongnu.org, huth@tuxfamily.org, amarkovic@wavecomp.com, imammedo@redhat.com, aurelien@aurel32.net, stefanb@linux.ibm.com Content-Type: multipart/mixed; boundary="===============7550659809370859858==" Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" --===============7550659809370859858== Content-Language: en-AU Content-Type: multipart/alternative; boundary="_000_156516653944224361btcom_" --_000_156516653944224361btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable The memory_region_dispatch_{read|write} operand "unsigned size" is being converted into a "MemOp op". Convert interfaces by using no-op size_memop. After all interfaces are converted, size_memop will be implemented and the memory_region_dispatch_{read|write} operand "unsigned size" will be converted into a "MemOp op". As size_memop is a no-op, this patch does not change any behaviour. Signed-off-by: Tony Nguyen Reviewed-by: Richard Henderson --- exec.c | 6 ++++-- memory_ldst.inc.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/exec.c b/exec.c index 3e78de3..9f69197 100644 --- a/exec.c +++ b/exec.c @@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(FlatView *= fv, hwaddr addr, /* XXX: could force current_cpu to NULL to avoid potential bugs */ val =3D ldn_p(buf, l); - result |=3D memory_region_dispatch_write(mr, addr1, val, l, at= trs); + result |=3D memory_region_dispatch_write(mr, addr1, val, + size_memop(l), attrs); } else { /* RAM case */ ptr =3D qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwad= dr addr, /* I/O case */ release_lock |=3D prepare_mmio_access(mr); l =3D memory_access_size(mr, l, addr1); - result |=3D memory_region_dispatch_read(mr, addr1, &val, l, at= trs); + result |=3D memory_region_dispatch_read(mr, addr1, &val, + size_memop(l), attrs); stn_p(buf, l, val); } else { /* RAM case */ diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index acf865b..1e8a2fc 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 4, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(4), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap32(val); @@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 8, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(8), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap64(val); @@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 1, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, 2, attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(2), = attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap16(val); @@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL= , if (l < 4 || !memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); } else { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); stl_p(ptr, val); @@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, val =3D bswap32(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 4, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, 1, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(1), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, val =3D bswap16(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 2, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(2), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, val =3D bswap64(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, 8, attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(8), = attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); -- 1.8.3.1 ? --_000_156516653944224361btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

The memory_region_dispatch_{read|writ= e} operand "unsigned size" is
being converted into a "MemOp op".

Convert interfaces by using no-op size_memop.

After all interfaces are converted, size_memop will be implemented
and the memory_region_dispatch_{read|write} operand "unsigned siz= e"
will be converted into a "MemOp op".

As size_memop is a no-op, this patch does not change any behaviour.

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 exec.c            |  6 +&= #43;++--
 memory_ldst.inc.c | 18 ++++++++&= #43;---------
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/exec.c b/exec.c
index 3e78de3..9f69197 100644
--- a/exec.c
+++ b/exec.c
@@ -3334,7 +3334,8 @@ static MemTxResult flatview_write_continue(F= latView *fv, hwaddr addr,
             /* XXX: could force cu= rrent_cpu to NULL to avoid
                potential bugs= */
             val =3D ldn_p(buf, l);=
-            result |=3D memory_region_d= ispatch_write(mr, addr1, val, l, attrs);
+            result |=3D memory_regi= on_dispatch_write(mr, addr1, val,
+                   &= nbsp;                    =           size_memop(l), attrs);
         } else {
             /* RAM case */
             ptr =3D qemu_ram_ptr_l= ength(mr->ram_block, addr1, &l, false);
@@ -3395,7 +3396,8 @@ MemTxResult flatview_read_continue(FlatView = *fv, hwaddr addr,
             /* I/O case */
             release_lock |=3D prep= are_mmio_access(mr);
             l =3D memory_access_si= ze(mr, l, addr1);
-            result |=3D memory_region_d= ispatch_read(mr, addr1, &val, l, attrs);
+            result |=3D memory_regi= on_dispatch_read(mr, addr1, &val,
+                   &= nbsp;                    =          size_memop(l), attrs);
             stn_p(buf, l, val);
         } else {
             /* RAM case */
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index acf865b..1e8a2fc 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_in= ternal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 4, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(4), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap32(val);<= /div>
@@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_= internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 8, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(8), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap64(val);<= /div>
@@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1= _DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 1, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw= _internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, 2, attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, size_memop(2), attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap16(val);<= /div>
@@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(= ARG1_DECL,
     if (l < 4 || !memory_access_is_direct(mr, true)= ) {
         release_lock |=3D prepare_mmio_acces= s(mr);
 
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(4), attrs);
     } else {
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
         stl_p(ptr, val);
@@ -346,7 +346,7 @@ static inline void glue(address_space_stl_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap32(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 4, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(4), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL= ,
     mr =3D TRANSLATE(addr, &addr1, &l, true, a= ttrs);
     if (!memory_access_is_direct(mr, true)) {
         release_lock |=3D prepare_mmio_acces= s(mr);
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 1, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(1), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -451,7 +451,7 @@ static inline void glue(address_space_stw_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap16(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 2, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(2), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, S= UFFIX)(ARG1_DECL,
             val =3D bswap64(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, 8, attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, size_memop(8), attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
-- 
1.8.3.1

​

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