diff for duplicates of <1565941103483.3364@bt.com> diff --git a/a/content_digest b/N1/content_digest index abb3d21..e0612c1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,95 +1,94 @@ "ref\043bc5e07ac614d0e8e740bf6007ff77b@tpw09926dag18e.domain1.systemhost.net\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v7 37/42] cputlb: Replace size and endian operands for MemOp\0" + "Subject\0[Qemu-arm] [Qemu-devel] [PATCH v7 37/42] cputlb: Replace size and endian operands for MemOp\0" "Date\0Fri, 16 Aug 2019 07:38:24 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<rth@twiddle.net>" - <pbonzini@redhat.com> - <mst@redhat.com> - <imammedo@redhat.com> - <marcel.apfelbaum@gmail.com> - <xiaoguangrong.eric@gmail.com> - <alistair@alistair23.me> - <peter.maydell@linaro.org> - <b.galvani@gmail.com> - <clg@kaod.org> - <andrew@aj.id.au> - <joel@jms.id.au> - <i.mitsyanko@gmail.com> - <robh@kernel.org> - <peter.chubb@nicta.com.au> - <sundeep.lkml@gmail.com> - <jan.kiszka@web.de> - <balrogg@gmail.com> - <eric.auger@redhat.com> - <kraxel@redhat.com> - <michael@walle.cc> - <kwolf@redhat.com> - <mreitz@redhat.com> - <jsnow@redhat.com> - <keith.busch@intel.com> - <philmd@redhat.com> - <marcandre.lureau@redhat.com> - <Andrew.Baumann@microsoft.com> - <edgar.iglesias@gmail.com> - <antonynpavlov@gmail.com> - <chouteau@adacore.com> - <frederic.konrad@adacore.com> - <huth@tuxfamily.org> - <mark.cave-ayland@ilande.co.uk> - <hpoussin@reactos.org> - <arikalo@wavecomp.com> - <balaton@eik.bme.hu> - <gxt@mprc.pku.edu.cn> - <david@gibson.dropbear.id.au> - <deller@gmx.de> - <ehabkost@redhat.com> - <sstabellini@kernel.org> - <anthony.perard@citrix.com> - <paul.durrant@citrix.com> - <aurelien@aurel32.net> - <amarkovic@wavecomp.com> - <magnus.damm@gmail.com> - <berto@igalia.com> - <minyard@acm.org> - <pburton@wavecomp.com> - <jslaby@suse.cz> - <jcd@tribudubois.net> - <andrew.smirnov@gmail.com> - <green@moxielogic.com> - <jasowang@redhat.com> - <dmitry.fleytman@gmail.com> - <sw@weilnetz.de> - <jiri@resnulli.us> - <crwulff@gmail.com> - <marex@denx.de> - <lersek@redhat.com> - <proljc@gmail.com> - <shorne@gmail.com> - <yuval.shaia@oracle.com> - <palmer@sifive.com> - <sagark@eecs.berkeley.edu> - <kbastian@mail.uni-paderborn.de> - <walling@linux.ibm.com> - <cohuck@redhat.com> - <david@redhat.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <fam@euphon.net> - <hare@suse.com> - <atar4qemu@gmail.com> - <stefanb@linux.ibm.com> - <alex.williamson@redhat.com> - <jcmvbkbc@gmail.com> - <laurent@vivier.eu> - <claudio.fontana@suse.com> - <stefanha@redhat.com> - <qemu-arm@nongnu.org> - <qemu-block@nongnu.org> - <qemu-ppc@nongnu.org> - <xen-devel@lists.xenproject.org> - <qemu-riscv@nongnu.org> - " <qemu-s390x@nongnu.org>\0" + "Cc\0frederic.konrad@adacore.com" + berto@igalia.com + qemu-block@nongnu.org + arikalo@wavecomp.com + pasic@linux.ibm.com + hpoussin@reactos.org + anthony.perard@citrix.com + xen-devel@lists.xenproject.org + lersek@redhat.com + jasowang@redhat.com + jiri@resnulli.us + ehabkost@redhat.com + b.galvani@gmail.com + eric.auger@redhat.com + alex.williamson@redhat.com + stefanha@redhat.com + jsnow@redhat.com + rth@twiddle.net + kwolf@redhat.com + andrew@aj.id.au + claudio.fontana@suse.com + crwulff@gmail.com + laurent@vivier.eu + sundeep.lkml@gmail.com + michael@walle.cc + qemu-ppc@nongnu.org + kbastian@mail.uni-paderborn.de + imammedo@redhat.com + fam@euphon.net + peter.maydell@linaro.org + david@redhat.com + palmer@sifive.com + balaton@eik.bme.hu + keith.busch@intel.com + jcmvbkbc@gmail.com + hare@suse.com + sstabellini@kernel.org + andrew.smirnov@gmail.com + deller@gmx.de + magnus.damm@gmail.com + marcel.apfelbaum@gmail.com + atar4qemu@gmail.com + minyard@acm.org + sw@weilnetz.de + yuval.shaia@oracle.com + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + jan.kiszka@web.de + clg@kaod.org + shorne@gmail.com + qemu-riscv@nongnu.org + i.mitsyanko@gmail.com + cohuck@redhat.com + philmd@redhat.com + amarkovic@wavecomp.com + peter.chubb@nicta.com.au + aurelien@aurel32.net + pburton@wavecomp.com + sagark@eecs.berkeley.edu + green@moxielogic.com + kraxel@redhat.com + gxt@mprc.pku.edu.cn + robh@kernel.org + borntraeger@de.ibm.com + joel@jms.id.au + antonynpavlov@gmail.com + chouteau@adacore.com + balrogg@gmail.com + Andrew.Baumann@microsoft.com + mreitz@redhat.com + walling@linux.ibm.com + dmitry.fleytman@gmail.com + mst@redhat.com + mark.cave-ayland@ilande.co.uk + jslaby@suse.cz + marex@denx.de + proljc@gmail.com + marcandre.lureau@redhat.com + alistair@alistair23.me + paul.durrant@citrix.com + david@gibson.dropbear.id.au + xiaoguangrong.eric@gmail.com + huth@tuxfamily.org + jcd@tribudubois.net + pbonzini@redhat.com + " stefanb@linux.ibm.com\0" "\01:1\0" "b\0" "Preparation for collapsing the two byte swaps adjust_endianness and\n" @@ -1094,4 +1093,4 @@ "</body>\r\n" "</html>\r\n" -6bc7e733a0a66f275490d717373f74a8cd80cf66a85e9455f90303d5766ce6d9 +1db7b8bd2e5110fc726ccfa1eae5204318343ac904d9cd09248b035fd279004a
diff --git a/N2/1.1.hdr b/N2/1.1.hdr new file mode 100644 index 0000000..12686e4 --- /dev/null +++ b/N2/1.1.hdr @@ -0,0 +1,2 @@ +Content-Type: text/plain; charset="iso-8859-1" +Content-Transfer-Encoding: quoted-printable diff --git a/a/1.txt b/N2/1.1.txt similarity index 100% rename from a/1.txt rename to N2/1.1.txt diff --git a/a/2.bin b/N2/1.2.bin similarity index 100% rename from a/2.bin rename to N2/1.2.bin diff --git a/N2/1.2.hdr b/N2/1.2.hdr new file mode 100644 index 0000000..e54d0ae --- /dev/null +++ b/N2/1.2.hdr @@ -0,0 +1,2 @@ +Content-Type: text/html; charset="iso-8859-1" +Content-Transfer-Encoding: quoted-printable diff --git a/a/2.hdr b/N2/2.hdr index e54d0ae..5216513 100644 --- a/a/2.hdr +++ b/N2/2.hdr @@ -1,2 +1,4 @@ -Content-Type: text/html; charset="iso-8859-1" -Content-Transfer-Encoding: quoted-printable +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: base64 +Content-Disposition: inline diff --git a/N2/2.txt b/N2/2.txt new file mode 100644 index 0000000..d2ea9a6 --- /dev/null +++ b/N2/2.txt @@ -0,0 +1,4 @@ +_______________________________________________ +Xen-devel mailing list +Xen-devel@lists.xenproject.org +https://lists.xenproject.org/mailman/listinfo/xen-devel diff --git a/a/content_digest b/N2/content_digest index abb3d21..5ecdab5 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,96 +1,96 @@ "ref\043bc5e07ac614d0e8e740bf6007ff77b@tpw09926dag18e.domain1.systemhost.net\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v7 37/42] cputlb: Replace size and endian operands for MemOp\0" + "Subject\0[Xen-devel] [Qemu-devel] [PATCH v7 37/42] cputlb: Replace size and endian operands for MemOp\0" "Date\0Fri, 16 Aug 2019 07:38:24 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<rth@twiddle.net>" - <pbonzini@redhat.com> - <mst@redhat.com> - <imammedo@redhat.com> - <marcel.apfelbaum@gmail.com> - <xiaoguangrong.eric@gmail.com> - <alistair@alistair23.me> - <peter.maydell@linaro.org> - <b.galvani@gmail.com> - <clg@kaod.org> - <andrew@aj.id.au> - <joel@jms.id.au> - <i.mitsyanko@gmail.com> - <robh@kernel.org> - <peter.chubb@nicta.com.au> - <sundeep.lkml@gmail.com> - <jan.kiszka@web.de> - <balrogg@gmail.com> - <eric.auger@redhat.com> - <kraxel@redhat.com> - <michael@walle.cc> - <kwolf@redhat.com> - <mreitz@redhat.com> - <jsnow@redhat.com> - <keith.busch@intel.com> - <philmd@redhat.com> - <marcandre.lureau@redhat.com> - <Andrew.Baumann@microsoft.com> - <edgar.iglesias@gmail.com> - <antonynpavlov@gmail.com> - <chouteau@adacore.com> - <frederic.konrad@adacore.com> - <huth@tuxfamily.org> - <mark.cave-ayland@ilande.co.uk> - <hpoussin@reactos.org> - <arikalo@wavecomp.com> - <balaton@eik.bme.hu> - <gxt@mprc.pku.edu.cn> - <david@gibson.dropbear.id.au> - <deller@gmx.de> - <ehabkost@redhat.com> - <sstabellini@kernel.org> - <anthony.perard@citrix.com> - <paul.durrant@citrix.com> - <aurelien@aurel32.net> - <amarkovic@wavecomp.com> - <magnus.damm@gmail.com> - <berto@igalia.com> - <minyard@acm.org> - <pburton@wavecomp.com> - <jslaby@suse.cz> - <jcd@tribudubois.net> - <andrew.smirnov@gmail.com> - <green@moxielogic.com> - <jasowang@redhat.com> - <dmitry.fleytman@gmail.com> - <sw@weilnetz.de> - <jiri@resnulli.us> - <crwulff@gmail.com> - <marex@denx.de> - <lersek@redhat.com> - <proljc@gmail.com> - <shorne@gmail.com> - <yuval.shaia@oracle.com> - <palmer@sifive.com> - <sagark@eecs.berkeley.edu> - <kbastian@mail.uni-paderborn.de> - <walling@linux.ibm.com> - <cohuck@redhat.com> - <david@redhat.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <fam@euphon.net> - <hare@suse.com> - <atar4qemu@gmail.com> - <stefanb@linux.ibm.com> - <alex.williamson@redhat.com> - <jcmvbkbc@gmail.com> - <laurent@vivier.eu> - <claudio.fontana@suse.com> - <stefanha@redhat.com> - <qemu-arm@nongnu.org> - <qemu-block@nongnu.org> - <qemu-ppc@nongnu.org> - <xen-devel@lists.xenproject.org> - <qemu-riscv@nongnu.org> - " <qemu-s390x@nongnu.org>\0" - "\01:1\0" + "Cc\0frederic.konrad@adacore.com" + berto@igalia.com + qemu-block@nongnu.org + arikalo@wavecomp.com + pasic@linux.ibm.com + hpoussin@reactos.org + anthony.perard@citrix.com + xen-devel@lists.xenproject.org + lersek@redhat.com + jasowang@redhat.com + jiri@resnulli.us + ehabkost@redhat.com + b.galvani@gmail.com + eric.auger@redhat.com + alex.williamson@redhat.com + stefanha@redhat.com + jsnow@redhat.com + rth@twiddle.net + kwolf@redhat.com + andrew@aj.id.au + claudio.fontana@suse.com + crwulff@gmail.com + laurent@vivier.eu + sundeep.lkml@gmail.com + michael@walle.cc + qemu-ppc@nongnu.org + kbastian@mail.uni-paderborn.de + imammedo@redhat.com + fam@euphon.net + peter.maydell@linaro.org + david@redhat.com + palmer@sifive.com + balaton@eik.bme.hu + keith.busch@intel.com + jcmvbkbc@gmail.com + hare@suse.com + sstabellini@kernel.org + andrew.smirnov@gmail.com + deller@gmx.de + magnus.damm@gmail.com + marcel.apfelbaum@gmail.com + atar4qemu@gmail.com + minyard@acm.org + sw@weilnetz.de + yuval.shaia@oracle.com + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + jan.kiszka@web.de + clg@kaod.org + shorne@gmail.com + qemu-riscv@nongnu.org + i.mitsyanko@gmail.com + cohuck@redhat.com + philmd@redhat.com + amarkovic@wavecomp.com + peter.chubb@nicta.com.au + aurelien@aurel32.net + pburton@wavecomp.com + sagark@eecs.berkeley.edu + green@moxielogic.com + kraxel@redhat.com + edgar.iglesias@gmail.com + gxt@mprc.pku.edu.cn + robh@kernel.org + borntraeger@de.ibm.com + joel@jms.id.au + antonynpavlov@gmail.com + chouteau@adacore.com + balrogg@gmail.com + Andrew.Baumann@microsoft.com + mreitz@redhat.com + walling@linux.ibm.com + dmitry.fleytman@gmail.com + mst@redhat.com + mark.cave-ayland@ilande.co.uk + jslaby@suse.cz + marex@denx.de + proljc@gmail.com + marcandre.lureau@redhat.com + alistair@alistair23.me + paul.durrant@citrix.com + david@gibson.dropbear.id.au + xiaoguangrong.eric@gmail.com + huth@tuxfamily.org + jcd@tribudubois.net + pbonzini@redhat.com + " stefanb@linux.ibm.com\0" + "\02:1.1\0" "b\0" "Preparation for collapsing the two byte swaps adjust_endianness and\n" "handle_bswap into the former.\n" @@ -584,7 +584,7 @@ "1.8.3.1\n" "\n" ? - "\01:2\0" + "\02:1.2\0" "b\0" "<html>\r\n" "<head>\r\n" @@ -1093,5 +1093,11 @@ "</p>\r\n" "</body>\r\n" "</html>\r\n" + "\01:2\0" + "b\0" + "_______________________________________________\n" + "Xen-devel mailing list\n" + "Xen-devel@lists.xenproject.org\n" + https://lists.xenproject.org/mailman/listinfo/xen-devel -6bc7e733a0a66f275490d717373f74a8cd80cf66a85e9455f90303d5766ce6d9 +9900f3c7856c986379ab39d3612e6e1f5e762c602b67ce2530408f0a7eab7ae7
diff --git a/a/2.bin b/a/2.bin deleted file mode 100644 index a4bcd69..0000000 --- a/a/2.bin +++ /dev/null @@ -1,507 +0,0 @@ -<html> -<head> -<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> -<style type="text/css" style="display:none"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style> -</head> -<body dir="ltr" style="font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;"> -<p></p> -<div><span style="font-size: 12pt;">Preparation for collapsing the two byte swaps adjust_endianness and</span><br> -</div> -<div>handle_bswap into the former.</div> -<div><br> -</div> -<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div> -<div>---</div> -<div> accel/tcg/cputlb.c | 172 +++++++++++++++++++++++++--------------------------</div> -<div> include/exec/memop.h | 6 ++</div> -<div> memory.c | 11 +---</div> -<div> 3 files changed, 90 insertions(+), 99 deletions(-)</div> -<div><br> -</div> -<div>diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c</div> -<div>index 0aff6a3..8022c81 100644</div> -<div>--- a/accel/tcg/cputlb.c</div> -<div>+++ b/accel/tcg/cputlb.c</div> -<div>@@ -881,7 +881,7 @@ static void tlb_fill(CPUState *cpu, target_ulong addr, int size,</div> -<div> </div> -<div> static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> int mmu_idx, target_ulong addr, uintptr_t retaddr,</div> -<div>- MMUAccessType access_type, int size)</div> -<div>+ MMUAccessType access_type, MemOp op)</div> -<div> {</div> -<div> CPUState *cpu = env_cpu(env);</div> -<div> hwaddr mr_offset;</div> -<div>@@ -906,15 +906,13 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> qemu_mutex_lock_iothread();</div> -<div> locked = true;</div> -<div> }</div> -<div>- r = memory_region_dispatch_read(mr, mr_offset, &val,</div> -<div>- size_memop(size) | MO_TE,</div> -<div>- iotlbentry->attrs);</div> -<div>+ r = memory_region_dispatch_read(mr, mr_offset, &val, op, iotlbentry->attrs);</div> -<div> if (r != MEMTX_OK) {</div> -<div> hwaddr physaddr = mr_offset +</div> -<div> section->offset_within_address_space -</div> -<div> section->offset_within_region;</div> -<div> </div> -<div>- cpu_transaction_failed(cpu, physaddr, addr, size, access_type,</div> -<div>+ cpu_transaction_failed(cpu, physaddr, addr, memop_size(op), access_type,</div> -<div> mmu_idx, iotlbentry->attrs, r, retaddr);</div> -<div> }</div> -<div> if (locked) {</div> -<div>@@ -926,7 +924,7 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> </div> -<div> static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> int mmu_idx, uint64_t val, target_ulong addr,</div> -<div>- uintptr_t retaddr, int size)</div> -<div>+ uintptr_t retaddr, MemOp op)</div> -<div> {</div> -<div> CPUState *cpu = env_cpu(env);</div> -<div> hwaddr mr_offset;</div> -<div>@@ -948,16 +946,15 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div> -<div> qemu_mutex_lock_iothread();</div> -<div> locked = true;</div> -<div> }</div> -<div>- r = memory_region_dispatch_write(mr, mr_offset, val,</div> -<div>- size_memop(size) | MO_TE,</div> -<div>- iotlbentry->attrs);</div> -<div>+ r = memory_region_dispatch_write(mr, mr_offset, val, op, iotlbentry->attrs);</div> -<div> if (r != MEMTX_OK) {</div> -<div> hwaddr physaddr = mr_offset +</div> -<div> section->offset_within_address_space -</div> -<div> section->offset_within_region;</div> -<div> </div> -<div>- cpu_transaction_failed(cpu, physaddr, addr, size, MMU_DATA_STORE,</div> -<div>- mmu_idx, iotlbentry->attrs, r, retaddr);</div> -<div>+ cpu_transaction_failed(cpu, physaddr, addr, memop_size(op),</div> -<div>+ MMU_DATA_STORE, mmu_idx, iotlbentry->attrs, r,</div> -<div>+ retaddr);</div> -<div> }</div> -<div> if (locked) {</div> -<div> qemu_mutex_unlock_iothread();</div> -<div>@@ -1218,14 +1215,15 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,</div> -<div> * access type.</div> -<div> */</div> -<div> </div> -<div>-static inline uint64_t handle_bswap(uint64_t val, int size, bool big_endian)</div> -<div>+static inline uint64_t handle_bswap(uint64_t val, MemOp op)</div> -<div> {</div> -<div>- if ((big_endian && NEED_BE_BSWAP) || (!big_endian && NEED_LE_BSWAP)) {</div> -<div>- switch (size) {</div> -<div>- case 1: return val;</div> -<div>- case 2: return bswap16(val);</div> -<div>- case 4: return bswap32(val);</div> -<div>- case 8: return bswap64(val);</div> -<div>+ if ((memop_big_endian(op) && NEED_BE_BSWAP) ||</div> -<div>+ (!memop_big_endian(op) && NEED_LE_BSWAP)) {</div> -<div>+ switch (op & MO_SIZE) {</div> -<div>+ case MO_8: return val;</div> -<div>+ case MO_16: return bswap16(val);</div> -<div>+ case MO_32: return bswap32(val);</div> -<div>+ case MO_64: return bswap64(val);</div> -<div> default:</div> -<div> g_assert_not_reached();</div> -<div> }</div> -<div>@@ -1248,7 +1246,7 @@ typedef uint64_t FullLoadHelper(CPUArchState *env, target_ulong addr,</div> -<div> </div> -<div> static inline uint64_t __attribute__((always_inline))</div> -<div> load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div>- uintptr_t retaddr, size_t size, bool big_endian, bool code_read,</div> -<div>+ uintptr_t retaddr, MemOp op, bool code_read,</div> -<div> FullLoadHelper *full_load)</div> -<div> {</div> -<div> uintptr_t mmu_idx = get_mmuidx(oi);</div> -<div>@@ -1262,6 +1260,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div> -<div> void *haddr;</div> -<div> uint64_t res;</div> -<div>+ size_t size = memop_size(op);</div> -<div> </div> -<div> /* Handle CPU specific unaligned behaviour */</div> -<div> if (addr & ((1 << a_bits) - 1)) {</div> -<div>@@ -1307,9 +1306,10 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div> }</div> -<div> }</div> -<div> </div> -<div>+ /* FIXME: io_readx ignores MO_BSWAP. */</div> -<div> res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],</div> -<div>- mmu_idx, addr, retaddr, access_type, size);</div> -<div>- return handle_bswap(res, size, big_endian);</div> -<div>+ mmu_idx, addr, retaddr, access_type, op);</div> -<div>+ return handle_bswap(res, op);</div> -<div> }</div> -<div> </div> -<div> /* Handle slow unaligned access (it spans two pages or IO). */</div> -<div>@@ -1326,7 +1326,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div> r2 = full_load(env, addr2, oi, retaddr);</div> -<div> shift = (addr & (size - 1)) * 8;</div> -<div> </div> -<div>- if (big_endian) {</div> -<div>+ if (memop_big_endian(op)) {</div> -<div> /* Big-endian combine. */</div> -<div> res = (r1 << shift) | (r2 >> ((size * 8) - shift));</div> -<div> } else {</div> -<div>@@ -1338,30 +1338,27 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div> </div> -<div> do_aligned_access:</div> -<div> haddr = (void *)((uintptr_t)addr + entry->addend);</div> -<div>- switch (size) {</div> -<div>- case 1:</div> -<div>+ switch (op) {</div> -<div>+ case MO_UB:</div> -<div> res = ldub_p(haddr);</div> -<div> break;</div> -<div>- case 2:</div> -<div>- if (big_endian) {</div> -<div>- res = lduw_be_p(haddr);</div> -<div>- } else {</div> -<div>- res = lduw_le_p(haddr);</div> -<div>- }</div> -<div>+ case MO_BEUW:</div> -<div>+ res = lduw_be_p(haddr);</div> -<div> break;</div> -<div>- case 4:</div> -<div>- if (big_endian) {</div> -<div>- res = (uint32_t)ldl_be_p(haddr);</div> -<div>- } else {</div> -<div>- res = (uint32_t)ldl_le_p(haddr);</div> -<div>- }</div> -<div>+ case MO_LEUW:</div> -<div>+ res = lduw_le_p(haddr);</div> -<div> break;</div> -<div>- case 8:</div> -<div>- if (big_endian) {</div> -<div>- res = ldq_be_p(haddr);</div> -<div>- } else {</div> -<div>- res = ldq_le_p(haddr);</div> -<div>- }</div> -<div>+ case MO_BEUL:</div> -<div>+ res = (uint32_t)ldl_be_p(haddr);</div> -<div>+ break;</div> -<div>+ case MO_LEUL:</div> -<div>+ res = (uint32_t)ldl_le_p(haddr);</div> -<div>+ break;</div> -<div>+ case MO_BEQ:</div> -<div>+ res = ldq_be_p(haddr);</div> -<div>+ break;</div> -<div>+ case MO_LEQ:</div> -<div>+ res = ldq_le_p(haddr);</div> -<div> break;</div> -<div> default:</div> -<div> g_assert_not_reached();</div> -<div>@@ -1383,8 +1380,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div> -<div> static uint64_t full_ldub_mmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 1, false, false,</div> -<div>- full_ldub_mmu);</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_8, false, full_ldub_mmu);</div> -<div> }</div> -<div> </div> -<div> tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,</div> -<div>@@ -1396,7 +1392,7 @@ tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_le_lduw_mmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 2, false, false,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUW, false,</div> -<div> full_le_lduw_mmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1409,7 +1405,7 @@ tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_be_lduw_mmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 2, true, false,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUW, false,</div> -<div> full_be_lduw_mmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1422,7 +1418,7 @@ tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_le_ldul_mmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 4, false, false,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUL, false,</div> -<div> full_le_ldul_mmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1435,7 +1431,7 @@ tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_be_ldul_mmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 4, true, false,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUL, false,</div> -<div> full_be_ldul_mmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1448,14 +1444,14 @@ tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,</div> -<div> uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 8, false, false,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_LEQ, false,</div> -<div> helper_le_ldq_mmu);</div> -<div> }</div> -<div> </div> -<div> uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 8, true, false,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_BEQ, false,</div> -<div> helper_be_ldq_mmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1501,7 +1497,7 @@ tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,</div> -<div> </div> -<div> static inline void __attribute__((always_inline))</div> -<div> store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div>- TCGMemOpIdx oi, uintptr_t retaddr, size_t size, bool big_endian)</div> -<div>+ TCGMemOpIdx oi, uintptr_t retaddr, MemOp op)</div> -<div> {</div> -<div> uintptr_t mmu_idx = get_mmuidx(oi);</div> -<div> uintptr_t index = tlb_index(env, mmu_idx, addr);</div> -<div>@@ -1510,6 +1506,7 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> const size_t tlb_off = offsetof(CPUTLBEntry, addr_write);</div> -<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div> -<div> void *haddr;</div> -<div>+ size_t size = memop_size(op);</div> -<div> </div> -<div> /* Handle CPU specific unaligned behaviour */</div> -<div> if (addr & ((1 << a_bits) - 1)) {</div> -<div>@@ -1555,9 +1552,10 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> }</div> -<div> }</div> -<div> </div> -<div>+ /* FIXME: io_writex ignores MO_BSWAP. */</div> -<div> io_writex(env, &env_tlb(env)->d[mmu_idx].iotlb[index], mmu_idx,</div> -<div>- handle_bswap(val, size, big_endian),</div> -<div>- addr, retaddr, size);</div> -<div>+ handle_bswap(val, op),</div> -<div>+ addr, retaddr, op);</div> -<div> return;</div> -<div> }</div> -<div> </div> -<div>@@ -1593,7 +1591,7 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> */</div> -<div> for (i = 0; i < size; ++i) {</div> -<div> uint8_t val8;</div> -<div>- if (big_endian) {</div> -<div>+ if (memop_big_endian(op)) {</div> -<div> /* Big-endian extract. */</div> -<div> val8 = val >> (((size - 1) * 8) - (i * 8));</div> -<div> } else {</div> -<div>@@ -1607,30 +1605,27 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> </div> -<div> do_aligned_access:</div> -<div> haddr = (void *)((uintptr_t)addr + entry->addend);</div> -<div>- switch (size) {</div> -<div>- case 1:</div> -<div>+ switch (op) {</div> -<div>+ case MO_UB:</div> -<div> stb_p(haddr, val);</div> -<div> break;</div> -<div>- case 2:</div> -<div>- if (big_endian) {</div> -<div>- stw_be_p(haddr, val);</div> -<div>- } else {</div> -<div>- stw_le_p(haddr, val);</div> -<div>- }</div> -<div>+ case MO_BEUW:</div> -<div>+ stw_be_p(haddr, val);</div> -<div> break;</div> -<div>- case 4:</div> -<div>- if (big_endian) {</div> -<div>- stl_be_p(haddr, val);</div> -<div>- } else {</div> -<div>- stl_le_p(haddr, val);</div> -<div>- }</div> -<div>+ case MO_LEUW:</div> -<div>+ stw_le_p(haddr, val);</div> -<div> break;</div> -<div>- case 8:</div> -<div>- if (big_endian) {</div> -<div>- stq_be_p(haddr, val);</div> -<div>- } else {</div> -<div>- stq_le_p(haddr, val);</div> -<div>- }</div> -<div>+ case MO_BEUL:</div> -<div>+ stl_be_p(haddr, val);</div> -<div>+ break;</div> -<div>+ case MO_LEUL:</div> -<div>+ stl_le_p(haddr, val);</div> -<div>+ break;</div> -<div>+ case MO_BEQ:</div> -<div>+ stq_be_p(haddr, val);</div> -<div>+ break;</div> -<div>+ case MO_LEQ:</div> -<div>+ stq_le_p(haddr, val);</div> -<div> break;</div> -<div> default:</div> -<div> g_assert_not_reached();</div> -<div>@@ -1641,43 +1636,43 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- store_helper(env, addr, val, oi, retaddr, 1, false);</div> -<div>+ store_helper(env, addr, val, oi, retaddr, MO_8);</div> -<div> }</div> -<div> </div> -<div> void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- store_helper(env, addr, val, oi, retaddr, 2, false);</div> -<div>+ store_helper(env, addr, val, oi, retaddr, MO_LEUW);</div> -<div> }</div> -<div> </div> -<div> void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- store_helper(env, addr, val, oi, retaddr, 2, true);</div> -<div>+ store_helper(env, addr, val, oi, retaddr, MO_BEUW);</div> -<div> }</div> -<div> </div> -<div> void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- store_helper(env, addr, val, oi, retaddr, 4, false);</div> -<div>+ store_helper(env, addr, val, oi, retaddr, MO_LEUL);</div> -<div> }</div> -<div> </div> -<div> void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- store_helper(env, addr, val, oi, retaddr, 4, true);</div> -<div>+ store_helper(env, addr, val, oi, retaddr, MO_BEUL);</div> -<div> }</div> -<div> </div> -<div> void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- store_helper(env, addr, val, oi, retaddr, 8, false);</div> -<div>+ store_helper(env, addr, val, oi, retaddr, MO_LEQ);</div> -<div> }</div> -<div> </div> -<div> void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- store_helper(env, addr, val, oi, retaddr, 8, true);</div> -<div>+ store_helper(env, addr, val, oi, retaddr, MO_BEQ);</div> -<div> }</div> -<div> </div> -<div> /* First set of helpers allows passing in of OI and RETADDR. This makes</div> -<div>@@ -1742,8 +1737,7 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,</div> -<div> static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 1, false, true,</div> -<div>- full_ldub_cmmu);</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu);</div> -<div> }</div> -<div> </div> -<div> uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,</div> -<div>@@ -1755,7 +1749,7 @@ uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 2, false, true,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUW, true,</div> -<div> full_le_lduw_cmmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1768,7 +1762,7 @@ uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 2, true, true,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUW, true,</div> -<div> full_be_lduw_cmmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1781,7 +1775,7 @@ uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 4, false, true,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUL, true,</div> -<div> full_le_ldul_cmmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1794,7 +1788,7 @@ uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> static uint64_t full_be_ldul_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 4, true, true,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUL, true,</div> -<div> full_be_ldul_cmmu);</div> -<div> }</div> -<div> </div> -<div>@@ -1807,13 +1801,13 @@ uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 8, false, true,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_LEQ, true,</div> -<div> helper_le_ldq_cmmu);</div> -<div> }</div> -<div> </div> -<div> uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,</div> -<div> TCGMemOpIdx oi, uintptr_t retaddr)</div> -<div> {</div> -<div>- return load_helper(env, addr, oi, retaddr, 8, true, true,</div> -<div>+ return load_helper(env, addr, oi, retaddr, MO_BEQ, true,</div> -<div> helper_be_ldq_cmmu);</div> -<div> }</div> -<div>diff --git a/include/exec/memop.h b/include/exec/memop.h</div> -<div>index 0a610b7..529d07b 100644</div> -<div>--- a/include/exec/memop.h</div> -<div>+++ b/include/exec/memop.h</div> -<div>@@ -125,4 +125,10 @@ static inline MemOp size_memop(unsigned size)</div> -<div> return ctz32(size);</div> -<div> }</div> -<div> </div> -<div>+/* Big endianness from MemOp. */</div> -<div>+static inline bool memop_big_endian(MemOp op)</div> -<div>+{</div> -<div>+ return (op & MO_BSWAP) == MO_BE;</div> -<div>+}</div> -<div>+</div> -<div> #endif</div> -<div>diff --git a/memory.c b/memory.c</div> -<div>index 689390f..01fd29d 100644</div> -<div>--- a/memory.c</div> -<div>+++ b/memory.c</div> -<div>@@ -343,15 +343,6 @@ static void flatview_simplify(FlatView *view)</div> -<div> }</div> -<div> }</div> -<div> </div> -<div>-static bool memory_region_big_endian(MemoryRegion *mr)</div> -<div>-{</div> -<div>-#ifdef TARGET_WORDS_BIGENDIAN</div> -<div>- return mr->ops->endianness != MO_LE;</div> -<div>-#else</div> -<div>- return mr->ops->endianness == MO_BE;</div> -<div>-#endif</div> -<div>-}</div> -<div>-</div> -<div> static bool memory_region_wrong_endianness(MemoryRegion *mr)</div> -<div> {</div> -<div> #ifdef TARGET_WORDS_BIGENDIAN</div> -<div>@@ -564,7 +555,7 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,</div> -<div> /* FIXME: support unaligned access? */</div> -<div> access_size = MAX(MIN(size, access_size_max), access_size_min);</div> -<div> access_mask = MAKE_64BIT_MASK(0, access_size * 8);</div> -<div>- if (memory_region_big_endian(mr)) {</div> -<div>+ if (memop_big_endian(mr->ops->endianness)) {</div> -<div> for (i = 0; i < size; i += access_size) {</div> -<div> r |= access_fn(mr, addr + i, value, access_size,</div> -<div> (size - access_size - i) * 8, access_mask, attrs);</div> -<div>-- </div> -<div>1.8.3.1</div> -<div><br> -​<br> -</div> -<p><br> -</p> -</body> -</html> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index e54d0ae..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,2 +0,0 @@ -Content-Type: text/html; charset="iso-8859-1" -Content-Transfer-Encoding: quoted-printable diff --git a/a/content_digest b/N3/content_digest index abb3d21..849b5f3 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -1,96 +1,93 @@ "ref\043bc5e07ac614d0e8e740bf6007ff77b@tpw09926dag18e.domain1.systemhost.net\0" "From\0<tony.nguyen@bt.com>\0" - "Subject\0[Qemu-riscv] [Qemu-devel] [PATCH v7 37/42] cputlb: Replace size and endian operands for MemOp\0" + "Subject\0[Qemu-devel] [PATCH v7 37/42] cputlb: Replace size and endian operands for MemOp\0" "Date\0Fri, 16 Aug 2019 07:38:24 +0000\0" "To\0<qemu-devel@nongnu.org>\0" - "Cc\0<rth@twiddle.net>" - <pbonzini@redhat.com> - <mst@redhat.com> - <imammedo@redhat.com> - <marcel.apfelbaum@gmail.com> - <xiaoguangrong.eric@gmail.com> - <alistair@alistair23.me> - <peter.maydell@linaro.org> - <b.galvani@gmail.com> - <clg@kaod.org> - <andrew@aj.id.au> - <joel@jms.id.au> - <i.mitsyanko@gmail.com> - <robh@kernel.org> - <peter.chubb@nicta.com.au> - <sundeep.lkml@gmail.com> - <jan.kiszka@web.de> - <balrogg@gmail.com> - <eric.auger@redhat.com> - <kraxel@redhat.com> - <michael@walle.cc> - <kwolf@redhat.com> - <mreitz@redhat.com> - <jsnow@redhat.com> - <keith.busch@intel.com> - <philmd@redhat.com> - <marcandre.lureau@redhat.com> - <Andrew.Baumann@microsoft.com> - <edgar.iglesias@gmail.com> - <antonynpavlov@gmail.com> - <chouteau@adacore.com> - <frederic.konrad@adacore.com> - <huth@tuxfamily.org> - <mark.cave-ayland@ilande.co.uk> - <hpoussin@reactos.org> - <arikalo@wavecomp.com> - <balaton@eik.bme.hu> - <gxt@mprc.pku.edu.cn> - <david@gibson.dropbear.id.au> - <deller@gmx.de> - <ehabkost@redhat.com> - <sstabellini@kernel.org> - <anthony.perard@citrix.com> - <paul.durrant@citrix.com> - <aurelien@aurel32.net> - <amarkovic@wavecomp.com> - <magnus.damm@gmail.com> - <berto@igalia.com> - <minyard@acm.org> - <pburton@wavecomp.com> - <jslaby@suse.cz> - <jcd@tribudubois.net> - <andrew.smirnov@gmail.com> - <green@moxielogic.com> - <jasowang@redhat.com> - <dmitry.fleytman@gmail.com> - <sw@weilnetz.de> - <jiri@resnulli.us> - <crwulff@gmail.com> - <marex@denx.de> - <lersek@redhat.com> - <proljc@gmail.com> - <shorne@gmail.com> - <yuval.shaia@oracle.com> - <palmer@sifive.com> - <sagark@eecs.berkeley.edu> - <kbastian@mail.uni-paderborn.de> - <walling@linux.ibm.com> - <cohuck@redhat.com> - <david@redhat.com> - <pasic@linux.ibm.com> - <borntraeger@de.ibm.com> - <fam@euphon.net> - <hare@suse.com> - <atar4qemu@gmail.com> - <stefanb@linux.ibm.com> - <alex.williamson@redhat.com> - <jcmvbkbc@gmail.com> - <laurent@vivier.eu> - <claudio.fontana@suse.com> - <stefanha@redhat.com> - <qemu-arm@nongnu.org> - <qemu-block@nongnu.org> - <qemu-ppc@nongnu.org> - <xen-devel@lists.xenproject.org> - <qemu-riscv@nongnu.org> - " <qemu-s390x@nongnu.org>\0" - "\01:1\0" + "Cc\0frederic.konrad@adacore.com" + berto@igalia.com + qemu-block@nongnu.org + arikalo@wavecomp.com + pasic@linux.ibm.com + hpoussin@reactos.org + anthony.perard@citrix.com + xen-devel@lists.xenproject.org + lersek@redhat.com + jasowang@redhat.com + jiri@resnulli.us + ehabkost@redhat.com + b.galvani@gmail.com + eric.auger@redhat.com + alex.williamson@redhat.com + stefanha@redhat.com + jsnow@redhat.com + rth@twiddle.net + kwolf@redhat.com + andrew@aj.id.au + claudio.fontana@suse.com + crwulff@gmail.com + laurent@vivier.eu + sundeep.lkml@gmail.com + michael@walle.cc + qemu-ppc@nongnu.org + kbastian@mail.uni-paderborn.de + imammedo@redhat.com + fam@euphon.net + peter.maydell@linaro.org + david@redhat.com + palmer@sifive.com + keith.busch@intel.com + jcmvbkbc@gmail.com + hare@suse.com + sstabellini@kernel.org + andrew.smirnov@gmail.com + deller@gmx.de + magnus.damm@gmail.com + atar4qemu@gmail.com + minyard@acm.org + sw@weilnetz.de + yuval.shaia@oracle.com + qemu-s390x@nongnu.org + qemu-arm@nongnu.org + jan.kiszka@web.de + clg@kaod.org + shorne@gmail.com + qemu-riscv@nongnu.org + i.mitsyanko@gmail.com + cohuck@redhat.com + philmd@redhat.com + amarkovic@wavecomp.com + peter.chubb@nicta.com.au + aurelien@aurel32.net + pburton@wavecomp.com + sagark@eecs.berkeley.edu + green@moxielogic.com + kraxel@redhat.com + edgar.iglesias@gmail.com + gxt@mprc.pku.edu.cn + robh@kernel.org + borntraeger@de.ibm.com + joel@jms.id.au + antonynpavlov@gmail.com + chouteau@adacore.com + Andrew.Baumann@microsoft.com + mreitz@redhat.com + walling@linux.ibm.com + dmitry.fleytman@gmail.com + mst@redhat.com + mark.cave-ayland@ilande.co.uk + jslaby@suse.cz + marex@denx.de + proljc@gmail.com + marcandre.lureau@redhat.com + alistair@alistair23.me + paul.durrant@citrix.com + david@gibson.dropbear.id.au + xiaoguangrong.eric@gmail.com + huth@tuxfamily.org + jcd@tribudubois.net + pbonzini@redhat.com + " stefanb@linux.ibm.com\0" + "\00:1\0" "b\0" "Preparation for collapsing the two byte swaps adjust_endianness and\n" "handle_bswap into the former.\n" @@ -584,514 +581,5 @@ "1.8.3.1\n" "\n" ? - "\01:2\0" - "b\0" - "<html>\r\n" - "<head>\r\n" - "<meta http-equiv=\"Content-Type\" content=\"text/html; charset=iso-8859-1\">\r\n" - "<style type=\"text/css\" style=\"display:none\"><!-- P { margin-top: 0px; margin-bottom: 0px; } .EmailQuote { margin-left: 1pt; padding-left: 4pt; border-left-width: 2px; border-left-style: solid; border-left-color: rgb(128, 0, 0); }--></style>\r\n" - "</head>\r\n" - "<body dir=\"ltr\" style=\"font-size:12pt;color:#000000;background-color:#FFFFFF;font-family:Calibri,Arial,Helvetica,sans-serif;\">\r\n" - "<p></p>\r\n" - "<div><span style=\"font-size: 12pt;\">Preparation for collapsing the two byte swaps adjust_endianness and</span><br>\r\n" - "</div>\r\n" - "<div>handle_bswap into the former.</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>Signed-off-by: Tony Nguyen <tony.nguyen@bt.com></div>\r\n" - "<div>---</div>\r\n" - "<div> accel/tcg/cputlb.c | 172 +++++++++++++++++++++++++--------------------------</div>\r\n" - "<div> include/exec/memop.h | 6 ++</div>\r\n" - "<div> memory.c | 11 +---</div>\r\n" - "<div> 3 files changed, 90 insertions(+), 99 deletions(-)</div>\r\n" - "<div><br>\r\n" - "</div>\r\n" - "<div>diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c</div>\r\n" - "<div>index 0aff6a3..8022c81 100644</div>\r\n" - "<div>--- a/accel/tcg/cputlb.c</div>\r\n" - "<div>+++ b/accel/tcg/cputlb.c</div>\r\n" - "<div>@@ -881,7 +881,7 @@ static void tlb_fill(CPUState *cpu, target_ulong addr, int size,</div>\r\n" - "<div> </div>\r\n" - "<div> static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> int mmu_idx, target_ulong addr, uintptr_t retaddr,</div>\r\n" - "<div>- MMUAccessType access_type, int size)</div>\r\n" - "<div>+ MMUAccessType access_type, MemOp op)</div>\r\n" - "<div> {</div>\r\n" - "<div> CPUState *cpu = env_cpu(env);</div>\r\n" - "<div> hwaddr mr_offset;</div>\r\n" - "<div>@@ -906,15 +906,13 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> qemu_mutex_lock_iothread();</div>\r\n" - "<div> locked = true;</div>\r\n" - "<div> }</div>\r\n" - "<div>- r = memory_region_dispatch_read(mr, mr_offset, &val,</div>\r\n" - "<div>- size_memop(size) | MO_TE,</div>\r\n" - "<div>- iotlbentry->attrs);</div>\r\n" - "<div>+ r = memory_region_dispatch_read(mr, mr_offset, &val, op, iotlbentry->attrs);</div>\r\n" - "<div> if (r != MEMTX_OK) {</div>\r\n" - "<div> hwaddr physaddr = mr_offset +</div>\r\n" - "<div> section->offset_within_address_space -</div>\r\n" - "<div> section->offset_within_region;</div>\r\n" - "<div> </div>\r\n" - "<div>- cpu_transaction_failed(cpu, physaddr, addr, size, access_type,</div>\r\n" - "<div>+ cpu_transaction_failed(cpu, physaddr, addr, memop_size(op), access_type,</div>\r\n" - "<div> mmu_idx, iotlbentry->attrs, r, retaddr);</div>\r\n" - "<div> }</div>\r\n" - "<div> if (locked) {</div>\r\n" - "<div>@@ -926,7 +924,7 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> </div>\r\n" - "<div> static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> int mmu_idx, uint64_t val, target_ulong addr,</div>\r\n" - "<div>- uintptr_t retaddr, int size)</div>\r\n" - "<div>+ uintptr_t retaddr, MemOp op)</div>\r\n" - "<div> {</div>\r\n" - "<div> CPUState *cpu = env_cpu(env);</div>\r\n" - "<div> hwaddr mr_offset;</div>\r\n" - "<div>@@ -948,16 +946,15 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry,</div>\r\n" - "<div> qemu_mutex_lock_iothread();</div>\r\n" - "<div> locked = true;</div>\r\n" - "<div> }</div>\r\n" - "<div>- r = memory_region_dispatch_write(mr, mr_offset, val,</div>\r\n" - "<div>- size_memop(size) | MO_TE,</div>\r\n" - "<div>- iotlbentry->attrs);</div>\r\n" - "<div>+ r = memory_region_dispatch_write(mr, mr_offset, val, op, iotlbentry->attrs);</div>\r\n" - "<div> if (r != MEMTX_OK) {</div>\r\n" - "<div> hwaddr physaddr = mr_offset +</div>\r\n" - "<div> section->offset_within_address_space -</div>\r\n" - "<div> section->offset_within_region;</div>\r\n" - "<div> </div>\r\n" - "<div>- cpu_transaction_failed(cpu, physaddr, addr, size, MMU_DATA_STORE,</div>\r\n" - "<div>- mmu_idx, iotlbentry->attrs, r, retaddr);</div>\r\n" - "<div>+ cpu_transaction_failed(cpu, physaddr, addr, memop_size(op),</div>\r\n" - "<div>+ MMU_DATA_STORE, mmu_idx, iotlbentry->attrs, r,</div>\r\n" - "<div>+ retaddr);</div>\r\n" - "<div> }</div>\r\n" - "<div> if (locked) {</div>\r\n" - "<div> qemu_mutex_unlock_iothread();</div>\r\n" - "<div>@@ -1218,14 +1215,15 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> * access type.</div>\r\n" - "<div> */</div>\r\n" - "<div> </div>\r\n" - "<div>-static inline uint64_t handle_bswap(uint64_t val, int size, bool big_endian)</div>\r\n" - "<div>+static inline uint64_t handle_bswap(uint64_t val, MemOp op)</div>\r\n" - "<div> {</div>\r\n" - "<div>- if ((big_endian && NEED_BE_BSWAP) || (!big_endian && NEED_LE_BSWAP)) {</div>\r\n" - "<div>- switch (size) {</div>\r\n" - "<div>- case 1: return val;</div>\r\n" - "<div>- case 2: return bswap16(val);</div>\r\n" - "<div>- case 4: return bswap32(val);</div>\r\n" - "<div>- case 8: return bswap64(val);</div>\r\n" - "<div>+ if ((memop_big_endian(op) && NEED_BE_BSWAP) ||</div>\r\n" - "<div>+ (!memop_big_endian(op) && NEED_LE_BSWAP)) {</div>\r\n" - "<div>+ switch (op & MO_SIZE) {</div>\r\n" - "<div>+ case MO_8: return val;</div>\r\n" - "<div>+ case MO_16: return bswap16(val);</div>\r\n" - "<div>+ case MO_32: return bswap32(val);</div>\r\n" - "<div>+ case MO_64: return bswap64(val);</div>\r\n" - "<div> default:</div>\r\n" - "<div> g_assert_not_reached();</div>\r\n" - "<div> }</div>\r\n" - "<div>@@ -1248,7 +1246,7 @@ typedef uint64_t FullLoadHelper(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> </div>\r\n" - "<div> static inline uint64_t __attribute__((always_inline))</div>\r\n" - "<div> load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div>- uintptr_t retaddr, size_t size, bool big_endian, bool code_read,</div>\r\n" - "<div>+ uintptr_t retaddr, MemOp op, bool code_read,</div>\r\n" - "<div> FullLoadHelper *full_load)</div>\r\n" - "<div> {</div>\r\n" - "<div> uintptr_t mmu_idx = get_mmuidx(oi);</div>\r\n" - "<div>@@ -1262,6 +1260,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div>\r\n" - "<div> void *haddr;</div>\r\n" - "<div> uint64_t res;</div>\r\n" - "<div>+ size_t size = memop_size(op);</div>\r\n" - "<div> </div>\r\n" - "<div> /* Handle CPU specific unaligned behaviour */</div>\r\n" - "<div> if (addr & ((1 << a_bits) - 1)) {</div>\r\n" - "<div>@@ -1307,9 +1306,10 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>+ /* FIXME: io_readx ignores MO_BSWAP. */</div>\r\n" - "<div> res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],</div>\r\n" - "<div>- mmu_idx, addr, retaddr, access_type, size);</div>\r\n" - "<div>- return handle_bswap(res, size, big_endian);</div>\r\n" - "<div>+ mmu_idx, addr, retaddr, access_type, op);</div>\r\n" - "<div>+ return handle_bswap(res, op);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> /* Handle slow unaligned access (it spans two pages or IO). */</div>\r\n" - "<div>@@ -1326,7 +1326,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div> r2 = full_load(env, addr2, oi, retaddr);</div>\r\n" - "<div> shift = (addr & (size - 1)) * 8;</div>\r\n" - "<div> </div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>+ if (memop_big_endian(op)) {</div>\r\n" - "<div> /* Big-endian combine. */</div>\r\n" - "<div> res = (r1 << shift) | (r2 >> ((size * 8) - shift));</div>\r\n" - "<div> } else {</div>\r\n" - "<div>@@ -1338,30 +1338,27 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div> </div>\r\n" - "<div> do_aligned_access:</div>\r\n" - "<div> haddr = (void *)((uintptr_t)addr + entry->addend);</div>\r\n" - "<div>- switch (size) {</div>\r\n" - "<div>- case 1:</div>\r\n" - "<div>+ switch (op) {</div>\r\n" - "<div>+ case MO_UB:</div>\r\n" - "<div> res = ldub_p(haddr);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 2:</div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>- res = lduw_be_p(haddr);</div>\r\n" - "<div>- } else {</div>\r\n" - "<div>- res = lduw_le_p(haddr);</div>\r\n" - "<div>- }</div>\r\n" - "<div>+ case MO_BEUW:</div>\r\n" - "<div>+ res = lduw_be_p(haddr);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 4:</div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>- res = (uint32_t)ldl_be_p(haddr);</div>\r\n" - "<div>- } else {</div>\r\n" - "<div>- res = (uint32_t)ldl_le_p(haddr);</div>\r\n" - "<div>- }</div>\r\n" - "<div>+ case MO_LEUW:</div>\r\n" - "<div>+ res = lduw_le_p(haddr);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 8:</div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>- res = ldq_be_p(haddr);</div>\r\n" - "<div>- } else {</div>\r\n" - "<div>- res = ldq_le_p(haddr);</div>\r\n" - "<div>- }</div>\r\n" - "<div>+ case MO_BEUL:</div>\r\n" - "<div>+ res = (uint32_t)ldl_be_p(haddr);</div>\r\n" - "<div>+ break;</div>\r\n" - "<div>+ case MO_LEUL:</div>\r\n" - "<div>+ res = (uint32_t)ldl_le_p(haddr);</div>\r\n" - "<div>+ break;</div>\r\n" - "<div>+ case MO_BEQ:</div>\r\n" - "<div>+ res = ldq_be_p(haddr);</div>\r\n" - "<div>+ break;</div>\r\n" - "<div>+ case MO_LEQ:</div>\r\n" - "<div>+ res = ldq_le_p(haddr);</div>\r\n" - "<div> break;</div>\r\n" - "<div> default:</div>\r\n" - "<div> g_assert_not_reached();</div>\r\n" - "<div>@@ -1383,8 +1380,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,</div>\r\n" - "<div> static uint64_t full_ldub_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 1, false, false,</div>\r\n" - "<div>- full_ldub_mmu);</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_8, false, full_ldub_mmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div>@@ -1396,7 +1392,7 @@ tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_le_lduw_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 2, false, false,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUW, false,</div>\r\n" - "<div> full_le_lduw_mmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1409,7 +1405,7 @@ tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_be_lduw_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 2, true, false,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUW, false,</div>\r\n" - "<div> full_be_lduw_mmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1422,7 +1418,7 @@ tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_le_ldul_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 4, false, false,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUL, false,</div>\r\n" - "<div> full_le_ldul_mmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1435,7 +1431,7 @@ tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_be_ldul_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 4, true, false,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUL, false,</div>\r\n" - "<div> full_be_ldul_mmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1448,14 +1444,14 @@ tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 8, false, false,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_LEQ, false,</div>\r\n" - "<div> helper_le_ldq_mmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 8, true, false,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_BEQ, false,</div>\r\n" - "<div> helper_be_ldq_mmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1501,7 +1497,7 @@ tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> </div>\r\n" - "<div> static inline void __attribute__((always_inline))</div>\r\n" - "<div> store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div>- TCGMemOpIdx oi, uintptr_t retaddr, size_t size, bool big_endian)</div>\r\n" - "<div>+ TCGMemOpIdx oi, uintptr_t retaddr, MemOp op)</div>\r\n" - "<div> {</div>\r\n" - "<div> uintptr_t mmu_idx = get_mmuidx(oi);</div>\r\n" - "<div> uintptr_t index = tlb_index(env, mmu_idx, addr);</div>\r\n" - "<div>@@ -1510,6 +1506,7 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> const size_t tlb_off = offsetof(CPUTLBEntry, addr_write);</div>\r\n" - "<div> unsigned a_bits = get_alignment_bits(get_memop(oi));</div>\r\n" - "<div> void *haddr;</div>\r\n" - "<div>+ size_t size = memop_size(op);</div>\r\n" - "<div> </div>\r\n" - "<div> /* Handle CPU specific unaligned behaviour */</div>\r\n" - "<div> if (addr & ((1 << a_bits) - 1)) {</div>\r\n" - "<div>@@ -1555,9 +1552,10 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>+ /* FIXME: io_writex ignores MO_BSWAP. */</div>\r\n" - "<div> io_writex(env, &env_tlb(env)->d[mmu_idx].iotlb[index], mmu_idx,</div>\r\n" - "<div>- handle_bswap(val, size, big_endian),</div>\r\n" - "<div>- addr, retaddr, size);</div>\r\n" - "<div>+ handle_bswap(val, op),</div>\r\n" - "<div>+ addr, retaddr, op);</div>\r\n" - "<div> return;</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1593,7 +1591,7 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> */</div>\r\n" - "<div> for (i = 0; i < size; ++i) {</div>\r\n" - "<div> uint8_t val8;</div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>+ if (memop_big_endian(op)) {</div>\r\n" - "<div> /* Big-endian extract. */</div>\r\n" - "<div> val8 = val >> (((size - 1) * 8) - (i * 8));</div>\r\n" - "<div> } else {</div>\r\n" - "<div>@@ -1607,30 +1605,27 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> </div>\r\n" - "<div> do_aligned_access:</div>\r\n" - "<div> haddr = (void *)((uintptr_t)addr + entry->addend);</div>\r\n" - "<div>- switch (size) {</div>\r\n" - "<div>- case 1:</div>\r\n" - "<div>+ switch (op) {</div>\r\n" - "<div>+ case MO_UB:</div>\r\n" - "<div> stb_p(haddr, val);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 2:</div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>- stw_be_p(haddr, val);</div>\r\n" - "<div>- } else {</div>\r\n" - "<div>- stw_le_p(haddr, val);</div>\r\n" - "<div>- }</div>\r\n" - "<div>+ case MO_BEUW:</div>\r\n" - "<div>+ stw_be_p(haddr, val);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 4:</div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>- stl_be_p(haddr, val);</div>\r\n" - "<div>- } else {</div>\r\n" - "<div>- stl_le_p(haddr, val);</div>\r\n" - "<div>- }</div>\r\n" - "<div>+ case MO_LEUW:</div>\r\n" - "<div>+ stw_le_p(haddr, val);</div>\r\n" - "<div> break;</div>\r\n" - "<div>- case 8:</div>\r\n" - "<div>- if (big_endian) {</div>\r\n" - "<div>- stq_be_p(haddr, val);</div>\r\n" - "<div>- } else {</div>\r\n" - "<div>- stq_le_p(haddr, val);</div>\r\n" - "<div>- }</div>\r\n" - "<div>+ case MO_BEUL:</div>\r\n" - "<div>+ stl_be_p(haddr, val);</div>\r\n" - "<div>+ break;</div>\r\n" - "<div>+ case MO_LEUL:</div>\r\n" - "<div>+ stl_le_p(haddr, val);</div>\r\n" - "<div>+ break;</div>\r\n" - "<div>+ case MO_BEQ:</div>\r\n" - "<div>+ stq_be_p(haddr, val);</div>\r\n" - "<div>+ break;</div>\r\n" - "<div>+ case MO_LEQ:</div>\r\n" - "<div>+ stq_le_p(haddr, val);</div>\r\n" - "<div> break;</div>\r\n" - "<div> default:</div>\r\n" - "<div> g_assert_not_reached();</div>\r\n" - "<div>@@ -1641,43 +1636,43 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- store_helper(env, addr, val, oi, retaddr, 1, false);</div>\r\n" - "<div>+ store_helper(env, addr, val, oi, retaddr, MO_8);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- store_helper(env, addr, val, oi, retaddr, 2, false);</div>\r\n" - "<div>+ store_helper(env, addr, val, oi, retaddr, MO_LEUW);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- store_helper(env, addr, val, oi, retaddr, 2, true);</div>\r\n" - "<div>+ store_helper(env, addr, val, oi, retaddr, MO_BEUW);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- store_helper(env, addr, val, oi, retaddr, 4, false);</div>\r\n" - "<div>+ store_helper(env, addr, val, oi, retaddr, MO_LEUL);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- store_helper(env, addr, val, oi, retaddr, 4, true);</div>\r\n" - "<div>+ store_helper(env, addr, val, oi, retaddr, MO_BEUL);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- store_helper(env, addr, val, oi, retaddr, 8, false);</div>\r\n" - "<div>+ store_helper(env, addr, val, oi, retaddr, MO_LEQ);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- store_helper(env, addr, val, oi, retaddr, 8, true);</div>\r\n" - "<div>+ store_helper(env, addr, val, oi, retaddr, MO_BEQ);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> /* First set of helpers allows passing in of OI and RETADDR. This makes</div>\r\n" - "<div>@@ -1742,8 +1737,7 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,</div>\r\n" - "<div> static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 1, false, true,</div>\r\n" - "<div>- full_ldub_cmmu);</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div>@@ -1755,7 +1749,7 @@ uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 2, false, true,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUW, true,</div>\r\n" - "<div> full_le_lduw_cmmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1768,7 +1762,7 @@ uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 2, true, true,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUW, true,</div>\r\n" - "<div> full_be_lduw_cmmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1781,7 +1775,7 @@ uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 4, false, true,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_LEUL, true,</div>\r\n" - "<div> full_le_ldul_cmmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1794,7 +1788,7 @@ uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> static uint64_t full_be_ldul_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 4, true, true,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_BEUL, true,</div>\r\n" - "<div> full_be_ldul_cmmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>@@ -1807,13 +1801,13 @@ uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 8, false, true,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_LEQ, true,</div>\r\n" - "<div> helper_le_ldq_cmmu);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div> uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,</div>\r\n" - "<div> TCGMemOpIdx oi, uintptr_t retaddr)</div>\r\n" - "<div> {</div>\r\n" - "<div>- return load_helper(env, addr, oi, retaddr, 8, true, true,</div>\r\n" - "<div>+ return load_helper(env, addr, oi, retaddr, MO_BEQ, true,</div>\r\n" - "<div> helper_be_ldq_cmmu);</div>\r\n" - "<div> }</div>\r\n" - "<div>diff --git a/include/exec/memop.h b/include/exec/memop.h</div>\r\n" - "<div>index 0a610b7..529d07b 100644</div>\r\n" - "<div>--- a/include/exec/memop.h</div>\r\n" - "<div>+++ b/include/exec/memop.h</div>\r\n" - "<div>@@ -125,4 +125,10 @@ static inline MemOp size_memop(unsigned size)</div>\r\n" - "<div> return ctz32(size);</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>+/* Big endianness from MemOp. */</div>\r\n" - "<div>+static inline bool memop_big_endian(MemOp op)</div>\r\n" - "<div>+{</div>\r\n" - "<div>+ return (op & MO_BSWAP) == MO_BE;</div>\r\n" - "<div>+}</div>\r\n" - "<div>+</div>\r\n" - "<div> #endif</div>\r\n" - "<div>diff --git a/memory.c b/memory.c</div>\r\n" - "<div>index 689390f..01fd29d 100644</div>\r\n" - "<div>--- a/memory.c</div>\r\n" - "<div>+++ b/memory.c</div>\r\n" - "<div>@@ -343,15 +343,6 @@ static void flatview_simplify(FlatView *view)</div>\r\n" - "<div> }</div>\r\n" - "<div> }</div>\r\n" - "<div> </div>\r\n" - "<div>-static bool memory_region_big_endian(MemoryRegion *mr)</div>\r\n" - "<div>-{</div>\r\n" - "<div>-#ifdef TARGET_WORDS_BIGENDIAN</div>\r\n" - "<div>- return mr->ops->endianness != MO_LE;</div>\r\n" - "<div>-#else</div>\r\n" - "<div>- return mr->ops->endianness == MO_BE;</div>\r\n" - "<div>-#endif</div>\r\n" - "<div>-}</div>\r\n" - "<div>-</div>\r\n" - "<div> static bool memory_region_wrong_endianness(MemoryRegion *mr)</div>\r\n" - "<div> {</div>\r\n" - "<div> #ifdef TARGET_WORDS_BIGENDIAN</div>\r\n" - "<div>@@ -564,7 +555,7 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,</div>\r\n" - "<div> /* FIXME: support unaligned access? */</div>\r\n" - "<div> access_size = MAX(MIN(size, access_size_max), access_size_min);</div>\r\n" - "<div> access_mask = MAKE_64BIT_MASK(0, access_size * 8);</div>\r\n" - "<div>- if (memory_region_big_endian(mr)) {</div>\r\n" - "<div>+ if (memop_big_endian(mr->ops->endianness)) {</div>\r\n" - "<div> for (i = 0; i < size; i += access_size) {</div>\r\n" - "<div> r |= access_fn(mr, addr + i, value, access_size,</div>\r\n" - "<div> (size - access_size - i) * 8, access_mask, attrs);</div>\r\n" - "<div>-- </div>\r\n" - "<div>1.8.3.1</div>\r\n" - "<div><br>\r\n" - "​<br>\r\n" - "</div>\r\n" - "<p><br>\r\n" - "</p>\r\n" - "</body>\r\n" - "</html>\r\n" -6bc7e733a0a66f275490d717373f74a8cd80cf66a85e9455f90303d5766ce6d9 +c6cfd856c5c9531a0af630afca53ca8eeccffe5b2c506c4f6575969746bbb04d
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