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* FAILED: patch "[PATCH] riscv: Avoid interrupts being erroneously enabled in" failed to apply to 5.3-stable tree
@ 2019-10-08 17:27 gregkh
  2019-10-09  0:52 ` Sasha Levin
  0 siblings, 1 reply; 5+ messages in thread
From: gregkh @ 2019-10-08 17:27 UTC (permalink / raw)
  To: vincent.chen, david.abdurachmanov, palmer, paul.walmsley; +Cc: stable


The patch below does not apply to the 5.3-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From c82dd6d078a2bb29d41eda032bb96d05699a524d Mon Sep 17 00:00:00 2001
From: Vincent Chen <vincent.chen@sifive.com>
Date: Mon, 16 Sep 2019 16:47:41 +0800
Subject: [PATCH] riscv: Avoid interrupts being erroneously enabled in
 handle_exception()

When the handle_exception function addresses an exception, the interrupts
will be unconditionally enabled after finishing the context save. However,
It may erroneously enable the interrupts if the interrupts are disabled
before entering the handle_exception.

For example, one of the WARN_ON() condition is satisfied in the scheduling
where the interrupt is disabled and rq.lock is locked. The WARN_ON will
trigger a break exception and the handle_exception function will enable the
interrupts before entering do_trap_break function. During the procedure, if
a timer interrupt is pending, it will be taken when interrupts are enabled.
In this case, it may cause a deadlock problem if the rq.lock is locked
again in the timer ISR.

Hence, the handle_exception() can only enable interrupts when the state of
sstatus.SPIE is 1.

This patch is tested on HiFive Unleashed board.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
[paul.walmsley@sifive.com: updated to apply]
Fixes: bcae803a21317 ("RISC-V: Enable IRQ during exception handling")
Cc: David Abdurachmanov <david.abdurachmanov@sifive.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>

diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 74ccfd464071..da7aa88113c2 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -166,9 +166,13 @@ ENTRY(handle_exception)
 	move a0, sp /* pt_regs */
 	tail do_IRQ
 1:
-	/* Exceptions run with interrupts enabled */
+	/* Exceptions run with interrupts enabled or disabled
+	   depending on the state of sstatus.SR_SPIE */
+	andi t0, s1, SR_SPIE
+	beqz t0, 1f
 	csrs CSR_SSTATUS, SR_SIE
 
+1:
 	/* Handle syscalls */
 	li t0, EXC_SYSCALL
 	beq s4, t0, handle_syscall


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: FAILED: patch "[PATCH] riscv: Avoid interrupts being erroneously enabled in" failed to apply to 5.3-stable tree
  2019-10-08 17:27 FAILED: patch "[PATCH] riscv: Avoid interrupts being erroneously enabled in" failed to apply to 5.3-stable tree gregkh
@ 2019-10-09  0:52 ` Sasha Levin
  2019-10-09  1:00   ` Paul Walmsley
  0 siblings, 1 reply; 5+ messages in thread
From: Sasha Levin @ 2019-10-09  0:52 UTC (permalink / raw)
  To: gregkh; +Cc: vincent.chen, david.abdurachmanov, palmer, paul.walmsley, stable

On Tue, Oct 08, 2019 at 07:27:44PM +0200, gregkh@linuxfoundation.org wrote:
>
>The patch below does not apply to the 5.3-stable tree.
>If someone wants it applied there, or to any other stable or longterm
>tree, then please email the backport, including the original git commit
>id to <stable@vger.kernel.org>.
>
>thanks,
>
>greg k-h
>
>------------------ original commit in Linus's tree ------------------
>
>From c82dd6d078a2bb29d41eda032bb96d05699a524d Mon Sep 17 00:00:00 2001
>From: Vincent Chen <vincent.chen@sifive.com>
>Date: Mon, 16 Sep 2019 16:47:41 +0800
>Subject: [PATCH] riscv: Avoid interrupts being erroneously enabled in
> handle_exception()
>
>When the handle_exception function addresses an exception, the interrupts
>will be unconditionally enabled after finishing the context save. However,
>It may erroneously enable the interrupts if the interrupts are disabled
>before entering the handle_exception.
>
>For example, one of the WARN_ON() condition is satisfied in the scheduling
>where the interrupt is disabled and rq.lock is locked. The WARN_ON will
>trigger a break exception and the handle_exception function will enable the
>interrupts before entering do_trap_break function. During the procedure, if
>a timer interrupt is pending, it will be taken when interrupts are enabled.
>In this case, it may cause a deadlock problem if the rq.lock is locked
>again in the timer ISR.
>
>Hence, the handle_exception() can only enable interrupts when the state of
>sstatus.SPIE is 1.
>
>This patch is tested on HiFive Unleashed board.
>
>Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
>Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
>[paul.walmsley@sifive.com: updated to apply]
>Fixes: bcae803a21317 ("RISC-V: Enable IRQ during exception handling")
>Cc: David Abdurachmanov <david.abdurachmanov@sifive.com>
>Cc: stable@vger.kernel.org
>Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
>
>diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
>index 74ccfd464071..da7aa88113c2 100644
>--- a/arch/riscv/kernel/entry.S
>+++ b/arch/riscv/kernel/entry.S
>@@ -166,9 +166,13 @@ ENTRY(handle_exception)
> 	move a0, sp /* pt_regs */
> 	tail do_IRQ
> 1:
>-	/* Exceptions run with interrupts enabled */
>+	/* Exceptions run with interrupts enabled or disabled
>+	   depending on the state of sstatus.SR_SPIE */
>+	andi t0, s1, SR_SPIE
>+	beqz t0, 1f
> 	csrs CSR_SSTATUS, SR_SIE
>
>+1:

I might be missing something here, but wasn't the label "1" already
declared a few lines above?

--
Thanks,
Sasha

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: FAILED: patch "[PATCH] riscv: Avoid interrupts being erroneously enabled in" failed to apply to 5.3-stable tree
  2019-10-09  0:52 ` Sasha Levin
@ 2019-10-09  1:00   ` Paul Walmsley
  2019-10-09  1:23     ` Sasha Levin
  0 siblings, 1 reply; 5+ messages in thread
From: Paul Walmsley @ 2019-10-09  1:00 UTC (permalink / raw)
  To: Sasha Levin; +Cc: gregkh, vincent.chen, david.abdurachmanov, palmer, stable

On Tue, 8 Oct 2019, Sasha Levin wrote:

> I might be missing something here, but wasn't the label "1" already
> declared a few lines above?

See the "Local Labels" section of 

https://sourceware.org/binutils/docs-2.24/as/Symbol-Names.html#Symbol-Names


- Paul

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: FAILED: patch "[PATCH] riscv: Avoid interrupts being erroneously enabled in" failed to apply to 5.3-stable tree
  2019-10-09  1:00   ` Paul Walmsley
@ 2019-10-09  1:23     ` Sasha Levin
  2019-10-09  1:46       ` Paul Walmsley
  0 siblings, 1 reply; 5+ messages in thread
From: Sasha Levin @ 2019-10-09  1:23 UTC (permalink / raw)
  To: Paul Walmsley; +Cc: gregkh, vincent.chen, david.abdurachmanov, palmer, stable

On Tue, Oct 08, 2019 at 06:00:36PM -0700, Paul Walmsley wrote:
>On Tue, 8 Oct 2019, Sasha Levin wrote:
>
>> I might be missing something here, but wasn't the label "1" already
>> declared a few lines above?
>
>See the "Local Labels" section of
>
>https://sourceware.org/binutils/docs-2.24/as/Symbol-Names.html#Symbol-Names

Thanks!

I've fixed the patch to compensate for not having 4f3f90084673f ("riscv:
Using CSR numbers to access CSRs") and queued it for 5.4 and 4.19.

-- 
Thanks,
Sasha

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: FAILED: patch "[PATCH] riscv: Avoid interrupts being erroneously enabled in" failed to apply to 5.3-stable tree
  2019-10-09  1:23     ` Sasha Levin
@ 2019-10-09  1:46       ` Paul Walmsley
  0 siblings, 0 replies; 5+ messages in thread
From: Paul Walmsley @ 2019-10-09  1:46 UTC (permalink / raw)
  To: Sasha Levin; +Cc: gregkh, vincent.chen, david.abdurachmanov, palmer, stable

On Tue, 8 Oct 2019, Sasha Levin wrote:

> On Tue, Oct 08, 2019 at 06:00:36PM -0700, Paul Walmsley wrote:
> > On Tue, 8 Oct 2019, Sasha Levin wrote:
> > 
> > > I might be missing something here, but wasn't the label "1" already
> > > declared a few lines above?
> > 
> > See the "Local Labels" section of
> > 
> > https://sourceware.org/binutils/docs-2.24/as/Symbol-Names.html#Symbol-Names
> 
> Thanks!
> 
> I've fixed the patch to compensate for not having 4f3f90084673f ("riscv:
> Using CSR numbers to access CSRs") and queued it for 5.4 and 4.19.

Thanks Sasha!  You just saved me some time :-)

- Paul

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2019-10-09  1:46 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-10-08 17:27 FAILED: patch "[PATCH] riscv: Avoid interrupts being erroneously enabled in" failed to apply to 5.3-stable tree gregkh
2019-10-09  0:52 ` Sasha Levin
2019-10-09  1:00   ` Paul Walmsley
2019-10-09  1:23     ` Sasha Levin
2019-10-09  1:46       ` Paul Walmsley

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