From mboxrd@z Thu Jan 1 00:00:00 1970 From: CK Hu Subject: Re: [PATCH v5, 15/32] drm/mediatek: add commponent OVL_2L0 Date: Wed, 9 Oct 2019 17:17:51 +0800 Message-ID: <1570612671.7713.1.camel@mtksdaap41> References: <1567090254-15566-1-git-send-email-yongqiang.niu@mediatek.com> <1567090254-15566-16-git-send-email-yongqiang.niu@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1567090254-15566-16-git-send-email-yongqiang.niu@mediatek.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: yongqiang.niu@mediatek.com Cc: Mark Rutland , devicetree@vger.kernel.org, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org List-Id: linux-mediatek@lists.infradead.org SGksIFlvbmdxaWFuZzoKCk9uIFRodSwgMjAxOS0wOC0yOSBhdCAyMjo1MCArMDgwMCwgeW9uZ3Fp YW5nLm5pdUBtZWRpYXRlay5jb20gd3JvdGU6Cj4gRnJvbTogWW9uZ3FpYW5nIE5pdSA8eW9uZ3Fp YW5nLm5pdUBtZWRpYXRlay5jb20+Cj4gCj4gVGhpcyBwYXRjaCBhZGQgY29tbXBvbmVudCBPVkxf MkwwCj4gCgpBcHBsaWVkIHRvIG1lZGlhdGVrLWRybS1uZXh0LTUuNSBbMV0sIHRoYW5rcy4KClsx XQpodHRwczovL2dpdGh1Yi5jb20vY2todS1tZWRpYXRlay9saW51eC5naXQtdGFncy9jb21taXRz L21lZGlhdGVrLWRybS1uZXh0LTUuNQoKUmVnYXJkcywKQ0sKCj4gU2lnbmVkLW9mZi1ieTogWW9u Z3FpYW5nIE5pdSA8eW9uZ3FpYW5nLm5pdUBtZWRpYXRlay5jb20+Cj4gUmV2aWV3ZWQtYnk6IENL IEh1IDxjay5odUBtZWRpYXRlay5jb20+Cj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9tZWRpYXRl ay9tdGtfZHJtX2RkcF9jb21wLmMgfCAyICsrCj4gIGRyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9t dGtfZHJtX2RkcF9jb21wLmggfCAyICsrCj4gIDIgZmlsZXMgY2hhbmdlZCwgNCBpbnNlcnRpb25z KCspCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJtX2Rk cF9jb21wLmMgYi9kcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2RybV9kZHBfY29tcC5jCj4g aW5kZXggYjE4YmQ2Ni4uNDIwMGY4OSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vbWVk aWF0ZWsvbXRrX2RybV9kZHBfY29tcC5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL21lZGlhdGVr L210a19kcm1fZGRwX2NvbXAuYwo+IEBAIC0yMTksNiArMjE5LDcgQEAgc3RhdGljIHZvaWQgbXRr X2dhbW1hX3NldChzdHJ1Y3QgbXRrX2RkcF9jb21wICpjb21wLAo+ICAKPiAgc3RhdGljIGNvbnN0 IGNoYXIgKiBjb25zdCBtdGtfZGRwX2NvbXBfc3RlbVtNVEtfRERQX0NPTVBfVFlQRV9NQVhdID0g ewo+ICAJW01US19ESVNQX09WTF0gPSAib3ZsIiwKPiArCVtNVEtfRElTUF9PVkxfMkxdID0gIm92 bF8ybCIsCj4gIAlbTVRLX0RJU1BfUkRNQV0gPSAicmRtYSIsCj4gIAlbTVRLX0RJU1BfV0RNQV0g PSAid2RtYSIsCj4gIAlbTVRLX0RJU1BfQ09MT1JdID0gImNvbG9yIiwKPiBAQCAtMjU4LDYgKzI1 OSw3IEBAIHN0cnVjdCBtdGtfZGRwX2NvbXBfbWF0Y2ggewo+ICAJW0REUF9DT01QT05FTlRfT0Qx XQk9IHsgTVRLX0RJU1BfT0QsCTEsICZkZHBfb2QgfSwKPiAgCVtERFBfQ09NUE9ORU5UX09WTDBd CT0geyBNVEtfRElTUF9PVkwsCTAsIE5VTEwgfSwKPiAgCVtERFBfQ09NUE9ORU5UX09WTDFdCT0g eyBNVEtfRElTUF9PVkwsCTEsIE5VTEwgfSwKPiArCVtERFBfQ09NUE9ORU5UX09WTF8yTDBdCT0g eyBNVEtfRElTUF9PVkxfMkwsCTAsIE5VTEwgfSwKPiAgCVtERFBfQ09NUE9ORU5UX1BXTTBdCT0g eyBNVEtfRElTUF9QV00sCTAsIE5VTEwgfSwKPiAgCVtERFBfQ09NUE9ORU5UX1BXTTFdCT0geyBN VEtfRElTUF9QV00sCTEsIE5VTEwgfSwKPiAgCVtERFBfQ09NUE9ORU5UX1BXTTJdCT0geyBNVEtf RElTUF9QV00sCTIsIE5VTEwgfSwKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL21lZGlh dGVrL210a19kcm1fZGRwX2NvbXAuaCBiL2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHJt X2RkcF9jb21wLmgKPiBpbmRleCA4ZDIyMDIyNC4uOWNhZWMyZCAxMDA2NDQKPiAtLS0gYS9kcml2 ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2RybV9kZHBfY29tcC5oCj4gKysrIGIvZHJpdmVycy9n cHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwX2NvbXAuaAo+IEBAIC0xNyw2ICsxNyw3IEBACj4g IAo+ICBlbnVtIG10a19kZHBfY29tcF90eXBlIHsKPiAgCU1US19ESVNQX09WTCwKPiArCU1US19E SVNQX09WTF8yTCwKPiAgCU1US19ESVNQX1JETUEsCj4gIAlNVEtfRElTUF9XRE1BLAo+ICAJTVRL X0RJU1BfQ09MT1IsCj4gQEAgLTUwLDYgKzUxLDcgQEAgZW51bSBtdGtfZGRwX2NvbXBfaWQgewo+ ICAJRERQX0NPTVBPTkVOVF9PRDAsCj4gIAlERFBfQ09NUE9ORU5UX09EMSwKPiAgCUREUF9DT01Q T05FTlRfT1ZMMCwKPiArCUREUF9DT01QT05FTlRfT1ZMXzJMMCwKPiAgCUREUF9DT01QT05FTlRf T1ZMMSwKPiAgCUREUF9DT01QT05FTlRfUFdNMCwKPiAgCUREUF9DT01QT05FTlRfUFdNMSwKCgpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwg bWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWw= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A3B7C47404 for ; Wed, 9 Oct 2019 09:18:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A3282190F for ; Wed, 9 Oct 2019 09:18:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="RjxzIqxn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1A3282190F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SlNaA9N2/Cg5SBwaIm2ZaKyArAq+n7YyZh6xVqx04h4=; b=RjxzIqxnmh/smN uvSpCHLsFVdB59Q+lLqMvw43CyKh+22ZCjEpj/0Of/eSJy6SSXlaD6n9Ys54cPxzvwl/cO3yRRb5L CP/UTX2ERUwFIBVfQsLj9/k3wqcWatpfRIPUxs15vCxGi560U8YShdTT1GFNRfwr/XnhSi13dusLt Elo42jItZdOxWvkxlTCcP8Vhx3tuTCS1wpgKO4BEoomkV3YDFgi/Em6yp8uy8Kw7rHDKSKXl0OwOC 7gslUQFrETKoH2Ws0sbxHv1iIp6ijvKB871ChP7HCzFFfoph/BVUuRd3CCyN71P9sRJCE1OSaSOfO LG5RB4Nf7m+KWlE1yo7Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1iI86m-0004c6-TH; Wed, 09 Oct 2019 09:18:12 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.92.2 #3 (Red Hat Linux)) id 1iI86Z-0004SF-5D; Wed, 09 Oct 2019 09:18:00 +0000 X-UUID: 28ef2f243d9f4ea88505b21f76f5c05d-20191009 X-UUID: 28ef2f243d9f4ea88505b21f76f5c05d-20191009 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 22142393; Wed, 09 Oct 2019 01:17:55 -0800 Received: from MTKMBS31N2.mediatek.inc (172.27.4.87) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 9 Oct 2019 02:17:51 -0700 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 9 Oct 2019 17:17:48 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 9 Oct 2019 17:17:48 +0800 Message-ID: <1570612671.7713.1.camel@mtksdaap41> Subject: Re: [PATCH v5, 15/32] drm/mediatek: add commponent OVL_2L0 From: CK Hu To: Date: Wed, 9 Oct 2019 17:17:51 +0800 In-Reply-To: <1567090254-15566-16-git-send-email-yongqiang.niu@mediatek.com> References: <1567090254-15566-1-git-send-email-yongqiang.niu@mediatek.com> <1567090254-15566-16-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 681A688D04C331099D6C08507BCFD8CF80C3801578307909A3D5D16ED81D58D62000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191009_021759_201725_5481A0C3 X-CRM114-Status: GOOD ( 13.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Philipp Zabel , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-mediatek@lists.infradead.org, Daniel Vetter , Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Yongqiang: On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add commponent OVL_2L0 > Applied to mediatek-drm-next-5.5 [1], thanks. [1] https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-next-5.5 Regards, CK > Signed-off-by: Yongqiang Niu > Reviewed-by: CK Hu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > index b18bd66..4200f89 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > @@ -219,6 +219,7 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp, > > static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = { > [MTK_DISP_OVL] = "ovl", > + [MTK_DISP_OVL_2L] = "ovl_2l", > [MTK_DISP_RDMA] = "rdma", > [MTK_DISP_WDMA] = "wdma", > [MTK_DISP_COLOR] = "color", > @@ -258,6 +259,7 @@ struct mtk_ddp_comp_match { > [DDP_COMPONENT_OD1] = { MTK_DISP_OD, 1, &ddp_od }, > [DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, NULL }, > [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, NULL }, > + [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL }, > [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL }, > [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL }, > [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL }, > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > index 8d220224..9caec2d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > @@ -17,6 +17,7 @@ > > enum mtk_ddp_comp_type { > MTK_DISP_OVL, > + MTK_DISP_OVL_2L, > MTK_DISP_RDMA, > MTK_DISP_WDMA, > MTK_DISP_COLOR, > @@ -50,6 +51,7 @@ enum mtk_ddp_comp_id { > DDP_COMPONENT_OD0, > DDP_COMPONENT_OD1, > DDP_COMPONENT_OVL0, > + DDP_COMPONENT_OVL_2L0, > DDP_COMPONENT_OVL1, > DDP_COMPONENT_PWM0, > DDP_COMPONENT_PWM1, _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44E87C47404 for ; Wed, 9 Oct 2019 09:18:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 267F721848 for ; Wed, 9 Oct 2019 09:18:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730250AbfJIJSG (ORCPT ); Wed, 9 Oct 2019 05:18:06 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:29791 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726068AbfJIJSE (ORCPT ); Wed, 9 Oct 2019 05:18:04 -0400 X-UUID: 61f34e2b5982457c8d41060679298e92-20191009 X-UUID: 61f34e2b5982457c8d41060679298e92-20191009 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 546005503; Wed, 09 Oct 2019 17:17:51 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 9 Oct 2019 17:17:48 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 9 Oct 2019 17:17:48 +0800 Message-ID: <1570612671.7713.1.camel@mtksdaap41> Subject: Re: [PATCH v5, 15/32] drm/mediatek: add commponent OVL_2L0 From: CK Hu To: CC: Philipp Zabel , Rob Herring , Matthias Brugger , "David Airlie" , Daniel Vetter , Mark Rutland , , , , , Date: Wed, 9 Oct 2019 17:17:51 +0800 In-Reply-To: <1567090254-15566-16-git-send-email-yongqiang.niu@mediatek.com> References: <1567090254-15566-1-git-send-email-yongqiang.niu@mediatek.com> <1567090254-15566-16-git-send-email-yongqiang.niu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-SNTS-SMTP: 681A688D04C331099D6C08507BCFD8CF80C3801578307909A3D5D16ED81D58D62000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Yongqiang: On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add commponent OVL_2L0 > Applied to mediatek-drm-next-5.5 [1], thanks. [1] https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-next-5.5 Regards, CK > Signed-off-by: Yongqiang Niu > Reviewed-by: CK Hu > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > index b18bd66..4200f89 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > @@ -219,6 +219,7 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp, > > static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = { > [MTK_DISP_OVL] = "ovl", > + [MTK_DISP_OVL_2L] = "ovl_2l", > [MTK_DISP_RDMA] = "rdma", > [MTK_DISP_WDMA] = "wdma", > [MTK_DISP_COLOR] = "color", > @@ -258,6 +259,7 @@ struct mtk_ddp_comp_match { > [DDP_COMPONENT_OD1] = { MTK_DISP_OD, 1, &ddp_od }, > [DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, NULL }, > [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, NULL }, > + [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL }, > [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL }, > [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL }, > [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL }, > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > index 8d220224..9caec2d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > @@ -17,6 +17,7 @@ > > enum mtk_ddp_comp_type { > MTK_DISP_OVL, > + MTK_DISP_OVL_2L, > MTK_DISP_RDMA, > MTK_DISP_WDMA, > MTK_DISP_COLOR, > @@ -50,6 +51,7 @@ enum mtk_ddp_comp_id { > DDP_COMPONENT_OD0, > DDP_COMPONENT_OD1, > DDP_COMPONENT_OVL0, > + DDP_COMPONENT_OVL_2L0, > DDP_COMPONENT_OVL1, > DDP_COMPONENT_PWM0, > DDP_COMPONENT_PWM1,