From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDBA5C432C0 for ; Mon, 18 Nov 2019 07:28:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 93F382073A for ; Mon, 18 Nov 2019 07:28:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1574062091; bh=o08uSqxtFh9GssQAIJcWoDw7zw7CrCDrltUBd0XYNMc=; h=Subject:To:From:Date:List-ID:From; b=jzaQY4LdcTDjOBfSQZWRvtj2SYsGAhnbcIaHkSBS2RcEz7cMqXU1YlBd/swBwoNzb z4O0NS8ZukSLd4v0WyLJn+8ANy+kv9BHFmAsIhoBJAFmVoSQc29n7nvM7SLXUTNbfT 06B/yXXK3qs5IYkopHsb4Y0ogB98pLAf4SZVbtfo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726472AbfKRH2L (ORCPT ); Mon, 18 Nov 2019 02:28:11 -0500 Received: from mail.kernel.org ([198.145.29.99]:46392 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726465AbfKRH2K (ORCPT ); Mon, 18 Nov 2019 02:28:10 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EA3A720730; Mon, 18 Nov 2019 07:28:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1574062088; bh=o08uSqxtFh9GssQAIJcWoDw7zw7CrCDrltUBd0XYNMc=; h=Subject:To:From:Date:From; b=UyGtpV98qx6/+YcjKIouaQSKTsNSMgoQ4EJRdYpXizCZNOgX/u4etjRe5QrYtgIIK Jl6bROWfg3phPU6uj+DBPj+XecGULXUmtc07aqGwEaK5BQOYzT4VhhESa3VEDQmDve M30ESJcg+oTk/OWodLRsN4EmsOHrRQ4x5RNktXsc= Subject: patch "usb: dwc2: use a longer core rest timeout in dwc2_core_reset()" added to usb-testing To: dev@kresin.me, felipe.balbi@linux.intel.com, stable@vger.kernel.org From: Date: Mon, 18 Nov 2019 08:26:25 +0100 Message-ID: <157406198553126@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org This is a note to let you know that I've just added the patch titled usb: dwc2: use a longer core rest timeout in dwc2_core_reset() to my usb git tree which can be found at git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git in the usb-testing branch. The patch will show up in the next release of the linux-next tree (usually sometime within the next 24 hours during the week.) The patch will be merged to the usb-next branch sometime soon, after it passes testing, and the merge window is open. If you have any questions about this process, please let me know. >From 6689f0f4bb14e50917ba42eb9b41c25e0184970c Mon Sep 17 00:00:00 2001 From: Mathias Kresin Date: Sun, 7 Jul 2019 16:22:01 +0200 Subject: usb: dwc2: use a longer core rest timeout in dwc2_core_reset() Testing on different generations of Lantiq MIPS SoC based boards, showed that it takes up to 1500 us until the core reset bit is cleared. The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the same timeout to fix wrong hang detections and make the driver work for Lantiq MIPS SoCs. At least till kernel 4.14 the hanging reset only caused a warning but the driver was probed successful. With kernel 4.19 errors out with EBUSY. Cc: linux-stable # 4.19+ Signed-off-by: Mathias Kresin Signed-off-by: Felipe Balbi --- drivers/usb/dwc2/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index 8e41d70fd298..78a4925aa118 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -524,7 +524,7 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait) greset |= GRSTCTL_CSFTRST; dwc2_writel(hsotg, greset, GRSTCTL); - if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 50)) { + if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 10000)) { dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL GRSTCTL_CSFTRST\n", __func__); return -EBUSY; -- 2.24.0