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Fri, 10 Jan 2020 00:52:25 -0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jan 2020 00:52:23 -0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jan 2020 16:52:25 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 10 Jan 2020 16:50:50 +0800 Message-ID: <1578646330.18795.4.camel@mtksdaap41> Subject: Re: [PATCH v2 2/2] arm64: dts: mediatek: add mt8173 elm and hana board From: Yingjoe Chen To: Hsin-Yi Wang Date: Fri, 10 Jan 2020 16:52:10 +0800 In-Reply-To: <20200110073730.213789-3-hsinyi@chromium.org> References: <20200110073730.213789-1-hsinyi@chromium.org> <20200110073730.213789-3-hsinyi@chromium.org> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200110_005232_477260_562DD287 X-CRM114-Status: GOOD ( 17.18 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Nicolas Boichat , linux-kernel@vger.kernel.org, Matthias Brugger , Rob Herring , linux-mediatek@lists.infradead.org, Enric Balletbo i Serra , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Fri, 2020-01-10 at 15:37 +0800, Hsin-Yi Wang wrote: > Elm is Acer Chromebook R13. Hana is Lenovo Chromebook. Both uses mt8173 > SoC. > > Signed-off-by: Hsin-Yi Wang > --- > Changes in v2: > - remove downstream nodes and unused nodes > - use GPIO_ACTIVE_LOW for ps8640 gpios > - move trackpad to hana > --- > arch/arm64/boot/dts/mediatek/Makefile | 3 + > .../dts/mediatek/mt8173-elm-hana-rev7.dts | 27 + > .../boot/dts/mediatek/mt8173-elm-hana.dts | 16 + > .../boot/dts/mediatek/mt8173-elm-hana.dtsi | 60 + > arch/arm64/boot/dts/mediatek/mt8173-elm.dts | 15 + > arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1040 +++++++++++++++++ > 6 files changed, 1161 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 458bbc422a94..b45a45a565a1 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -6,5 +6,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts > new file mode 100644 > index 000000000000..a3616bc3d859 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts > @@ -0,0 +1,27 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright 2019 MediaTek Inc. > + */ > + > +/dts-v1/; > +#include "mt8173-elm-hana.dtsi" > + > +/ { > + model = "Mediatek Hana rev7 board"; > + compatible = "google,hana-rev7", "mediatek,mt8173"; > +}; > + > +&cpu_thermal { > + trips { > + cpu_crit: cpu_crit@0 { > + temperature = <100000>; > + type = "critical"; > + }; > + }; > +}; > + > +&gpio_keys { > + /delete-node/tablet_mode; > + /delete-node/volume_down; > + /delete-node/volume_up; > +}; > \ No newline at end of file nit: Please add a newline at end of file for all files in this patch. > diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts > new file mode 100644 > index 000000000000..8cbcc75192e3 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright 2016 MediaTek Inc. > + */ > + > +/dts-v1/; > +#include "mt8173-elm-hana.dtsi" > + > +/ { > + model = "Mediatek Hana rev0 board"; > + compatible = "google,hana-rev6", > + "google,hana-rev5", "google,hana-rev4", > + "google,hana-rev3", "google,hana-rev2", > + "google,hana-rev1", "google,hana-rev0", > + "google,hana", "mediatek,mt8173"; > +}; > \ No newline at end of file <...> > + > +&pwrap { > + pmic: mt6397 { > + compatible = "mediatek,mt6397"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&pio>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <2>; > + > + mt6397rtc: mt6397rtc { > + compatible = "mediatek,mt6397-rtc"; > + }; > + > + syscfg_pctl_pmic: syscfg_pctl_pmic@c000 { > + compatible = "mediatek,mt6397-pctl-pmic-syscfg", > + "syscon"; > + reg = <0 0x0000c000 0 0x0108>; > + }; > + > + pio6397: pinctrl@c000 { > + compatible = "mediatek,mt6397-pinctrl"; > + pins-are-numbered; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + mt6397clock: mt6397clock { > + compatible = "mediatek,mt6397-clk"; > + #clock-cells = <1>; > + }; > + > + mt6397regulator: mt6397regulator { > + compatible = "mediatek,mt6397-regulator"; > + > + mt6397_vpca15_reg: buck_vpca15 { > + regulator-compatible = "buck_vpca15"; > + regulator-name = "vpca15"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + regulator-allowed-modes = <0 1>; > + }; > + > + mt6397_vpca7_reg: buck_vpca7 { > + regulator-compatible = "buck_vpca7"; > + regulator-name = "vpca7"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-enable-ramp-delay = <115>; > + regulator-always-on; > + }; > + > + mt6397_vsramca15_reg: buck_vsramca15 { > + regulator-compatible = "buck_vsramca15"; > + regulator-name = "vsramca15"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vsramca7_reg: buck_vsramca7 { > + regulator-compatible = "buck_vsramca7"; > + regulator-name = "vsramca7"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vcore_reg: buck_vcore { > + regulator-compatible = "buck_vcore"; > + regulator-name = "vcore"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vgpu_reg: buck_vgpu { > + regulator-compatible = "buck_vgpu"; > + regulator-name = "vgpu"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-enable-ramp-delay = <115>; > + }; > + > + mt6397_vdrm_reg: buck_vdrm { > + regulator-compatible = "buck_vdrm"; > + regulator-name = "vdrm"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1400000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vio18_reg: buck_vio18 { > + regulator-compatible = "buck_vio18"; > + regulator-name = "vio18"; > + regulator-min-microvolt = <1620000>; > + regulator-max-microvolt = <1980000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vtcxo_reg: ldo_vtcxo { > + regulator-compatible = "ldo_vtcxo"; > + regulator-name = "vtcxo"; > + regulator-always-on; > + }; > + > + mt6397_va28_reg: ldo_va28 { > + regulator-compatible = "ldo_va28"; > + regulator-name = "va28"; > + }; > + > + mt6397_vcama_reg: ldo_vcama { > + regulator-compatible = "ldo_vcama"; > + regulator-name = "vcama"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vio28_reg: ldo_vio28 { > + regulator-compatible = "ldo_vio28"; > + regulator-name = "vio28"; > + regulator-always-on; > + }; > + > + mt6397_vusb_reg: ldo_vusb { > + regulator-compatible = "ldo_vusb"; > + regulator-name = "vusb"; > + }; > + > + mt6397_vmc_reg: ldo_vmc { > + regulator-compatible = "ldo_vmc"; > + regulator-name = "vmc"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vmch_reg: ldo_vmch { > + regulator-compatible = "ldo_vmch"; > + regulator-name = "vmch"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vemc_3v3_reg: ldo_vemc3v3 { > + regulator-compatible = "ldo_vemc3v3"; > + regulator-name = "vemc_3v3"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp1_reg: ldo_vgp1 { > + regulator-compatible = "ldo_vgp1"; > + regulator-name = "vcamd"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-enable-ramp-delay = <240>; > + }; > + > + mt6397_vgp2_reg: ldo_vgp2 { > + regulator-compatible = "ldo_vgp2"; > + regulator-name = "vcamio"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp3_reg: ldo_vgp3 { > + regulator-compatible = "ldo_vgp3"; > + regulator-name = "vcamaf"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp4_reg: ldo_vgp4 { > + regulator-compatible = "ldo_vgp4"; > + regulator-name = "vgp4"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp5_reg: ldo_vgp5 { > + regulator-compatible = "ldo_vgp5"; > + regulator-name = "vgp5"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <3000000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp6_reg: ldo_vgp6 { > + regulator-compatible = "ldo_vgp6"; > + regulator-name = "vgp6"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + regulator-always-on; > + }; > + > + mt6397_vibr_reg: ldo_vibr { > + regulator-compatible = "ldo_vibr"; > + regulator-name = "vibr"; > + regulator-min-microvolt = <1300000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + }; > + }; > +}; > + > +&spi { > + pinctrl-names = "default"; > + pinctrl-0 = <&spi_pins_a>; > + mediatek,pad-select = <1>; > + status = "okay"; > + /* clients */ > + cros_ec: ec@0 { > + compatible = "google,cros-ec-spi"; > + reg = <0x0>; > + spi-max-frequency = <12000000>; > + interrupt-parent = <&pio>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + google,cros-ec-spi-msg-delay = <500>; > + > + i2c_tunnel: i2c-tunnel@0 { > + compatible = "google,cros-ec-i2c-tunnel"; > + google,remote-bus = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + battery: sbs-battery@b { > + compatible = "sbs,sbs-battery"; > + reg = <0xb>; > + sbs,i2c-retry-count = <2>; > + sbs,poll-retry-count = <1>; > + }; > + }; > + }; > +}; > + > +&thermal { > + bank0-supply = <&mt6397_vpca15_reg>; > + bank1-supply = <&da9211_vcpu_reg>; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&ssusb { sorting according to name, please put this before thermal. Joe.C _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06C32C33CA2 for ; Fri, 10 Jan 2020 08:52:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C67DF2077C for ; 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bh=y/OSJpRfsXPqxj4MvMlH1zRHUOGo+E0kY4E8nZfJ6qo=; b=kXx2Ru1YN0sUN/YySq3X+kpat7OrFYzLllQH+6wgzmzH0V7MKjL6r8WgOU75o/0gr2U6AXIFoAtqNG4YjWajT/LFq1puMIwenDGytSMk4stioH7UINIit8LlvwUalVjR855XK7NzmTa4kNEx338mft4i07CWbRBzyKSPtNK3DpM=; X-UUID: e827c589892c432a9286efcc8396da2d-20200110 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 441199512; Fri, 10 Jan 2020 00:52:25 -0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jan 2020 00:52:23 -0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jan 2020 16:52:25 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 10 Jan 2020 16:50:50 +0800 Message-ID: <1578646330.18795.4.camel@mtksdaap41> Subject: Re: [PATCH v2 2/2] arm64: dts: mediatek: add mt8173 elm and hana board From: Yingjoe Chen To: Hsin-Yi Wang Date: Fri, 10 Jan 2020 16:52:10 +0800 In-Reply-To: <20200110073730.213789-3-hsinyi@chromium.org> References: <20200110073730.213789-1-hsinyi@chromium.org> <20200110073730.213789-3-hsinyi@chromium.org> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200110_005232_477260_562DD287 X-CRM114-Status: GOOD ( 17.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Nicolas Boichat , linux-kernel@vger.kernel.org, Matthias Brugger , Rob Herring , linux-mediatek@lists.infradead.org, Enric Balletbo i Serra , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 2020-01-10 at 15:37 +0800, Hsin-Yi Wang wrote: > Elm is Acer Chromebook R13. Hana is Lenovo Chromebook. Both uses mt8173 > SoC. > > Signed-off-by: Hsin-Yi Wang > --- > Changes in v2: > - remove downstream nodes and unused nodes > - use GPIO_ACTIVE_LOW for ps8640 gpios > - move trackpad to hana > --- > arch/arm64/boot/dts/mediatek/Makefile | 3 + > .../dts/mediatek/mt8173-elm-hana-rev7.dts | 27 + > .../boot/dts/mediatek/mt8173-elm-hana.dts | 16 + > .../boot/dts/mediatek/mt8173-elm-hana.dtsi | 60 + > arch/arm64/boot/dts/mediatek/mt8173-elm.dts | 15 + > arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1040 +++++++++++++++++ > 6 files changed, 1161 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 458bbc422a94..b45a45a565a1 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -6,5 +6,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts > new file mode 100644 > index 000000000000..a3616bc3d859 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts > @@ -0,0 +1,27 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright 2019 MediaTek Inc. > + */ > + > +/dts-v1/; > +#include "mt8173-elm-hana.dtsi" > + > +/ { > + model = "Mediatek Hana rev7 board"; > + compatible = "google,hana-rev7", "mediatek,mt8173"; > +}; > + > +&cpu_thermal { > + trips { > + cpu_crit: cpu_crit@0 { > + temperature = <100000>; > + type = "critical"; > + }; > + }; > +}; > + > +&gpio_keys { > + /delete-node/tablet_mode; > + /delete-node/volume_down; > + /delete-node/volume_up; > +}; > \ No newline at end of file nit: Please add a newline at end of file for all files in this patch. > diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts > new file mode 100644 > index 000000000000..8cbcc75192e3 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright 2016 MediaTek Inc. > + */ > + > +/dts-v1/; > +#include "mt8173-elm-hana.dtsi" > + > +/ { > + model = "Mediatek Hana rev0 board"; > + compatible = "google,hana-rev6", > + "google,hana-rev5", "google,hana-rev4", > + "google,hana-rev3", "google,hana-rev2", > + "google,hana-rev1", "google,hana-rev0", > + "google,hana", "mediatek,mt8173"; > +}; > \ No newline at end of file <...> > + > +&pwrap { > + pmic: mt6397 { > + compatible = "mediatek,mt6397"; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&pio>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <2>; > + > + mt6397rtc: mt6397rtc { > + compatible = "mediatek,mt6397-rtc"; > + }; > + > + syscfg_pctl_pmic: syscfg_pctl_pmic@c000 { > + compatible = "mediatek,mt6397-pctl-pmic-syscfg", > + "syscon"; > + reg = <0 0x0000c000 0 0x0108>; > + }; > + > + pio6397: pinctrl@c000 { > + compatible = "mediatek,mt6397-pinctrl"; > + pins-are-numbered; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + mt6397clock: mt6397clock { > + compatible = "mediatek,mt6397-clk"; > + #clock-cells = <1>; > + }; > + > + mt6397regulator: mt6397regulator { > + compatible = "mediatek,mt6397-regulator"; > + > + mt6397_vpca15_reg: buck_vpca15 { > + regulator-compatible = "buck_vpca15"; > + regulator-name = "vpca15"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + regulator-allowed-modes = <0 1>; > + }; > + > + mt6397_vpca7_reg: buck_vpca7 { > + regulator-compatible = "buck_vpca7"; > + regulator-name = "vpca7"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-enable-ramp-delay = <115>; > + regulator-always-on; > + }; > + > + mt6397_vsramca15_reg: buck_vsramca15 { > + regulator-compatible = "buck_vsramca15"; > + regulator-name = "vsramca15"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vsramca7_reg: buck_vsramca7 { > + regulator-compatible = "buck_vsramca7"; > + regulator-name = "vsramca7"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vcore_reg: buck_vcore { > + regulator-compatible = "buck_vcore"; > + regulator-name = "vcore"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vgpu_reg: buck_vgpu { > + regulator-compatible = "buck_vgpu"; > + regulator-name = "vgpu"; > + regulator-min-microvolt = < 700000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <12500>; > + regulator-enable-ramp-delay = <115>; > + }; > + > + mt6397_vdrm_reg: buck_vdrm { > + regulator-compatible = "buck_vdrm"; > + regulator-name = "vdrm"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1400000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vio18_reg: buck_vio18 { > + regulator-compatible = "buck_vio18"; > + regulator-name = "vio18"; > + regulator-min-microvolt = <1620000>; > + regulator-max-microvolt = <1980000>; > + regulator-ramp-delay = <12500>; > + regulator-always-on; > + }; > + > + mt6397_vtcxo_reg: ldo_vtcxo { > + regulator-compatible = "ldo_vtcxo"; > + regulator-name = "vtcxo"; > + regulator-always-on; > + }; > + > + mt6397_va28_reg: ldo_va28 { > + regulator-compatible = "ldo_va28"; > + regulator-name = "va28"; > + }; > + > + mt6397_vcama_reg: ldo_vcama { > + regulator-compatible = "ldo_vcama"; > + regulator-name = "vcama"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vio28_reg: ldo_vio28 { > + regulator-compatible = "ldo_vio28"; > + regulator-name = "vio28"; > + regulator-always-on; > + }; > + > + mt6397_vusb_reg: ldo_vusb { > + regulator-compatible = "ldo_vusb"; > + regulator-name = "vusb"; > + }; > + > + mt6397_vmc_reg: ldo_vmc { > + regulator-compatible = "ldo_vmc"; > + regulator-name = "vmc"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vmch_reg: ldo_vmch { > + regulator-compatible = "ldo_vmch"; > + regulator-name = "vmch"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vemc_3v3_reg: ldo_vemc3v3 { > + regulator-compatible = "ldo_vemc3v3"; > + regulator-name = "vemc_3v3"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp1_reg: ldo_vgp1 { > + regulator-compatible = "ldo_vgp1"; > + regulator-name = "vcamd"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-enable-ramp-delay = <240>; > + }; > + > + mt6397_vgp2_reg: ldo_vgp2 { > + regulator-compatible = "ldo_vgp2"; > + regulator-name = "vcamio"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp3_reg: ldo_vgp3 { > + regulator-compatible = "ldo_vgp3"; > + regulator-name = "vcamaf"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp4_reg: ldo_vgp4 { > + regulator-compatible = "ldo_vgp4"; > + regulator-name = "vgp4"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp5_reg: ldo_vgp5 { > + regulator-compatible = "ldo_vgp5"; > + regulator-name = "vgp5"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <3000000>; > + regulator-enable-ramp-delay = <218>; > + }; > + > + mt6397_vgp6_reg: ldo_vgp6 { > + regulator-compatible = "ldo_vgp6"; > + regulator-name = "vgp6"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + regulator-always-on; > + }; > + > + mt6397_vibr_reg: ldo_vibr { > + regulator-compatible = "ldo_vibr"; > + regulator-name = "vibr"; > + regulator-min-microvolt = <1300000>; > + regulator-max-microvolt = <3300000>; > + regulator-enable-ramp-delay = <218>; > + }; > + }; > + }; > +}; > + > +&spi { > + pinctrl-names = "default"; > + pinctrl-0 = <&spi_pins_a>; > + mediatek,pad-select = <1>; > + status = "okay"; > + /* clients */ > + cros_ec: ec@0 { > + compatible = "google,cros-ec-spi"; > + reg = <0x0>; > + spi-max-frequency = <12000000>; > + interrupt-parent = <&pio>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + google,cros-ec-spi-msg-delay = <500>; > + > + i2c_tunnel: i2c-tunnel@0 { > + compatible = "google,cros-ec-i2c-tunnel"; > + google,remote-bus = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + battery: sbs-battery@b { > + compatible = "sbs,sbs-battery"; > + reg = <0xb>; > + sbs,i2c-retry-count = <2>; > + sbs,poll-retry-count = <1>; > + }; > + }; > + }; > +}; > + > +&thermal { > + bank0-supply = <&mt6397_vpca15_reg>; > + bank1-supply = <&da9211_vcpu_reg>; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&ssusb { sorting according to name, please put this before thermal. Joe.C _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37DD4C33CA2 for ; Fri, 10 Jan 2020 08:52:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EB1AD2072A for ; Fri, 10 Jan 2020 08:52:20 +0000 (UTC) Authentication-Results: mail.kernel.org; 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[(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1158715086; Fri, 10 Jan 2020 16:52:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jan 2020 16:52:25 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 10 Jan 2020 16:50:50 +0800 Message-ID: <1578646330.18795.4.camel@mtksdaap41> Subject: Re: [PATCH v2 2/2] arm64: dts: mediatek: add mt8173 elm and hana board From: Yingjoe Chen To: Hsin-Yi Wang CC: , Mark Rutland , , Nicolas Boichat , , "Enric Balletbo i Serra" , Rob Herring , , Matthias Brugger Date: Fri, 10 Jan 2020 16:52:10 +0800 In-Reply-To: <20200110073730.213789-3-hsinyi@chromium.org> References: <20200110073730.213789-1-hsinyi@chromium.org> <20200110073730.213789-3-hsinyi@chromium.org> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org T24gRnJpLCAyMDIwLTAxLTEwIGF0IDE1OjM3ICswODAwLCBIc2luLVlpIFdhbmcgd3JvdGU6DQo+ IEVsbSBpcyBBY2VyIENocm9tZWJvb2sgUjEzLiBIYW5hIGlzIExlbm92byBDaHJvbWVib29rLiBC b3RoIHVzZXMgbXQ4MTczDQo+IFNvQy4NCj4gDQo+IFNpZ25lZC1vZmYtYnk6IEhzaW4tWWkgV2Fu ZyA8aHNpbnlpQGNocm9taXVtLm9yZz4NCj4gLS0tDQo+IENoYW5nZXMgaW4gdjI6DQo+IC0gcmVt b3ZlIGRvd25zdHJlYW0gbm9kZXMgYW5kIHVudXNlZCBub2Rlcw0KPiAtIHVzZSBHUElPX0FDVElW RV9MT1cgZm9yIHBzODY0MCBncGlvcw0KPiAtIG1vdmUgdHJhY2twYWQgdG8gaGFuYQ0KPiAtLS0N Cj4gIGFyY2gvYXJtNjQvYm9vdC9kdHMvbWVkaWF0ZWsvTWFrZWZpbGUgICAgICAgICB8ICAgIDMg Kw0KPiAgLi4uL2R0cy9tZWRpYXRlay9tdDgxNzMtZWxtLWhhbmEtcmV2Ny5kdHMgICAgIHwgICAy NyArDQo+ICAuLi4vYm9vdC9kdHMvbWVkaWF0ZWsvbXQ4MTczLWVsbS1oYW5hLmR0cyAgICAgfCAg IDE2ICsNCj4gIC4uLi9ib290L2R0cy9tZWRpYXRlay9tdDgxNzMtZWxtLWhhbmEuZHRzaSAgICB8 ICAgNjAgKw0KPiAgYXJjaC9hcm02NC9ib290L2R0cy9tZWRpYXRlay9tdDgxNzMtZWxtLmR0cyAg IHwgICAxNSArDQo+ICBhcmNoL2FybTY0L2Jvb3QvZHRzL21lZGlhdGVrL210ODE3My1lbG0uZHRz aSAgfCAxMDQwICsrKysrKysrKysrKysrKysrDQo+ICA2IGZpbGVzIGNoYW5nZWQsIDExNjEgaW5z ZXJ0aW9ucygrKQ0KPiAgY3JlYXRlIG1vZGUgMTAwNjQ0IGFyY2gvYXJtNjQvYm9vdC9kdHMvbWVk aWF0ZWsvbXQ4MTczLWVsbS1oYW5hLXJldjcuZHRzDQo+ICBjcmVhdGUgbW9kZSAxMDA2NDQgYXJj aC9hcm02NC9ib290L2R0cy9tZWRpYXRlay9tdDgxNzMtZWxtLWhhbmEuZHRzDQo+ICBjcmVhdGUg bW9kZSAxMDA2NDQgYXJjaC9hcm02NC9ib290L2R0cy9tZWRpYXRlay9tdDgxNzMtZWxtLWhhbmEu ZHRzaQ0KPiAgY3JlYXRlIG1vZGUgMTAwNjQ0IGFyY2gvYXJtNjQvYm9vdC9kdHMvbWVkaWF0ZWsv bXQ4MTczLWVsbS5kdHMNCj4gIGNyZWF0ZSBtb2RlIDEwMDY0NCBhcmNoL2FybTY0L2Jvb3QvZHRz L21lZGlhdGVrL210ODE3My1lbG0uZHRzaQ0KPiANCj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQv Ym9vdC9kdHMvbWVkaWF0ZWsvTWFrZWZpbGUgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL21lZGlhdGVr L01ha2VmaWxlDQo+IGluZGV4IDQ1OGJiYzQyMmE5NC4uYjQ1YTQ1YTU2NWExIDEwMDY0NA0KPiAt LS0gYS9hcmNoL2FybTY0L2Jvb3QvZHRzL21lZGlhdGVrL01ha2VmaWxlDQo+ICsrKyBiL2FyY2gv YXJtNjQvYm9vdC9kdHMvbWVkaWF0ZWsvTWFrZWZpbGUNCj4gQEAgLTYsNSArNiw4IEBAIGR0Yi0k KENPTkZJR19BUkNIX01FRElBVEVLKSArPSBtdDY3OTctZXZiLmR0Yg0KPiAgZHRiLSQoQ09ORklH X0FSQ0hfTUVESUFURUspICs9IG10Njc5Ny14MjAtZGV2LmR0Yg0KPiAgZHRiLSQoQ09ORklHX0FS Q0hfTUVESUFURUspICs9IG10NzYyMi1yZmIxLmR0Yg0KPiAgZHRiLSQoQ09ORklHX0FSQ0hfTUVE SUFURUspICs9IG10NzYyMi1iYW5hbmFwaS1icGktcjY0LmR0Yg0KPiArZHRiLSQoQ09ORklHX0FS Q0hfTUVESUFURUspICs9IG10ODE3My1lbG0uZHRiDQo+ICtkdGItJChDT05GSUdfQVJDSF9NRURJ QVRFSykgKz0gbXQ4MTczLWVsbS1oYW5hLmR0Yg0KPiArZHRiLSQoQ09ORklHX0FSQ0hfTUVESUFU RUspICs9IG10ODE3My1lbG0taGFuYS1yZXY3LmR0Yg0KPiAgZHRiLSQoQ09ORklHX0FSQ0hfTUVE SUFURUspICs9IG10ODE3My1ldmIuZHRiDQo+ICBkdGItJChDT05GSUdfQVJDSF9NRURJQVRFSykg Kz0gbXQ4MTgzLWV2Yi5kdGINCj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQvYm9vdC9kdHMvbWVk aWF0ZWsvbXQ4MTczLWVsbS1oYW5hLXJldjcuZHRzIGIvYXJjaC9hcm02NC9ib290L2R0cy9tZWRp YXRlay9tdDgxNzMtZWxtLWhhbmEtcmV2Ny5kdHMNCj4gbmV3IGZpbGUgbW9kZSAxMDA2NDQNCj4g aW5kZXggMDAwMDAwMDAwMDAwLi5hMzYxNmJjM2Q4NTkNCj4gLS0tIC9kZXYvbnVsbA0KPiArKysg Yi9hcmNoL2FybTY0L2Jvb3QvZHRzL21lZGlhdGVrL210ODE3My1lbG0taGFuYS1yZXY3LmR0cw0K PiBAQCAtMCwwICsxLDI3IEBADQo+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIu MC1vbmx5DQo+ICsvKg0KPiArICogQ29weXJpZ2h0IDIwMTkgTWVkaWFUZWsgSW5jLg0KPiArICov DQo+ICsNCj4gKy9kdHMtdjEvOw0KPiArI2luY2x1ZGUgIm10ODE3My1lbG0taGFuYS5kdHNpIg0K PiArDQo+ICsvIHsNCj4gKwltb2RlbCA9ICJNZWRpYXRlayBIYW5hIHJldjcgYm9hcmQiOw0KPiAr CWNvbXBhdGlibGUgPSAiZ29vZ2xlLGhhbmEtcmV2NyIsICJtZWRpYXRlayxtdDgxNzMiOw0KPiAr fTsNCj4gKw0KPiArJmNwdV90aGVybWFsIHsNCj4gKwl0cmlwcyB7DQo+ICsJCWNwdV9jcml0OiBj cHVfY3JpdEAwIHsNCj4gKwkJCXRlbXBlcmF0dXJlID0gPDEwMDAwMD47DQo+ICsJCQl0eXBlID0g ImNyaXRpY2FsIjsNCj4gKwkJfTsNCj4gKwl9Ow0KPiArfTsNCj4gKw0KPiArJmdwaW9fa2V5cyB7 DQo+ICsJL2RlbGV0ZS1ub2RlL3RhYmxldF9tb2RlOw0KPiArCS9kZWxldGUtbm9kZS92b2x1bWVf ZG93bjsNCj4gKwkvZGVsZXRlLW5vZGUvdm9sdW1lX3VwOw0KPiArfTsNCj4gXCBObyBuZXdsaW5l IGF0IGVuZCBvZiBmaWxlDQoNCm5pdDogUGxlYXNlIGFkZCBhIG5ld2xpbmUgYXQgZW5kIG9mIGZp bGUgZm9yIGFsbCBmaWxlcyBpbiB0aGlzIHBhdGNoLg0KDQo+IGRpZmYgLS1naXQgYS9hcmNoL2Fy bTY0L2Jvb3QvZHRzL21lZGlhdGVrL210ODE3My1lbG0taGFuYS5kdHMgYi9hcmNoL2FybTY0L2Jv b3QvZHRzL21lZGlhdGVrL210ODE3My1lbG0taGFuYS5kdHMNCj4gbmV3IGZpbGUgbW9kZSAxMDA2 NDQNCj4gaW5kZXggMDAwMDAwMDAwMDAwLi44Y2JjYzc1MTkyZTMNCj4gLS0tIC9kZXYvbnVsbA0K PiArKysgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL21lZGlhdGVrL210ODE3My1lbG0taGFuYS5kdHMN Cj4gQEAgLTAsMCArMSwxNiBAQA0KPiArLy8gU1BEWC1MaWNlbnNlLUlkZW50aWZpZXI6IEdQTC0y LjAtb25seQ0KPiArLyoNCj4gKyAqIENvcHlyaWdodCAyMDE2IE1lZGlhVGVrIEluYy4NCj4gKyAq Lw0KPiArDQo+ICsvZHRzLXYxLzsNCj4gKyNpbmNsdWRlICJtdDgxNzMtZWxtLWhhbmEuZHRzaSIN Cj4gKw0KPiArLyB7DQo+ICsJbW9kZWwgPSAiTWVkaWF0ZWsgSGFuYSByZXYwIGJvYXJkIjsNCj4g Kwljb21wYXRpYmxlID0gImdvb2dsZSxoYW5hLXJldjYiLA0KPiArCQkJImdvb2dsZSxoYW5hLXJl djUiLCAiZ29vZ2xlLGhhbmEtcmV2NCIsDQo+ICsJCQkiZ29vZ2xlLGhhbmEtcmV2MyIsICJnb29n bGUsaGFuYS1yZXYyIiwNCj4gKwkJCSJnb29nbGUsaGFuYS1yZXYxIiwgImdvb2dsZSxoYW5hLXJl djAiLA0KPiArCQkJImdvb2dsZSxoYW5hIiwgIm1lZGlhdGVrLG10ODE3MyI7DQo+ICt9Ow0KPiBc IE5vIG5ld2xpbmUgYXQgZW5kIG9mIGZpbGUNCg0KPC4uLj4NCg0KPiArDQo+ICsmcHdyYXAgew0K PiArCXBtaWM6IG10NjM5NyB7DQo+ICsJCWNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQ2Mzk3IjsN Cj4gKwkJI2FkZHJlc3MtY2VsbHMgPSA8MT47DQo+ICsJCSNzaXplLWNlbGxzID0gPDE+Ow0KPiAr CQlpbnRlcnJ1cHQtcGFyZW50ID0gPCZwaW8+Ow0KPiArCQlpbnRlcnJ1cHRzID0gPDExIElSUV9U WVBFX0xFVkVMX0hJR0g+Ow0KPiArCQlpbnRlcnJ1cHQtY29udHJvbGxlcjsNCj4gKwkJI2ludGVy cnVwdC1jZWxscyA9IDwyPjsNCj4gKw0KPiArCQltdDYzOTdydGM6IG10NjM5N3J0YyB7DQo+ICsJ CQljb21wYXRpYmxlID0gIm1lZGlhdGVrLG10NjM5Ny1ydGMiOw0KPiArCQl9Ow0KPiArDQo+ICsJ CXN5c2NmZ19wY3RsX3BtaWM6IHN5c2NmZ19wY3RsX3BtaWNAYzAwMCB7DQo+ICsJCQljb21wYXRp YmxlID0gIm1lZGlhdGVrLG10NjM5Ny1wY3RsLXBtaWMtc3lzY2ZnIiwNCj4gKwkJCQkgICAgICJz eXNjb24iOw0KPiArCQkJcmVnID0gPDAgMHgwMDAwYzAwMCAwIDB4MDEwOD47DQo+ICsJCX07DQo+ ICsNCj4gKwkJcGlvNjM5NzogcGluY3RybEBjMDAwIHsNCj4gKwkJCWNvbXBhdGlibGUgPSAibWVk aWF0ZWssbXQ2Mzk3LXBpbmN0cmwiOw0KPiArCQkJcGlucy1hcmUtbnVtYmVyZWQ7DQo+ICsJCQln cGlvLWNvbnRyb2xsZXI7DQo+ICsJCQkjZ3Bpby1jZWxscyA9IDwyPjsNCj4gKwkJfTsNCj4gKw0K PiArCQltdDYzOTdjbG9jazogbXQ2Mzk3Y2xvY2sgew0KPiArCQkJY29tcGF0aWJsZSA9ICJtZWRp YXRlayxtdDYzOTctY2xrIjsNCj4gKwkJCSNjbG9jay1jZWxscyA9IDwxPjsNCj4gKwkJfTsNCj4g Kw0KPiArCQltdDYzOTdyZWd1bGF0b3I6IG10NjM5N3JlZ3VsYXRvciB7DQo+ICsJCQljb21wYXRp YmxlID0gIm1lZGlhdGVrLG10NjM5Ny1yZWd1bGF0b3IiOw0KPiArDQo+ICsJCQltdDYzOTdfdnBj YTE1X3JlZzogYnVja192cGNhMTUgew0KPiArCQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImJ1 Y2tfdnBjYTE1IjsNCj4gKwkJCQlyZWd1bGF0b3ItbmFtZSA9ICJ2cGNhMTUiOw0KPiArCQkJCXJl Z3VsYXRvci1taW4tbWljcm92b2x0ID0gPCA3MDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1tYXgt bWljcm92b2x0ID0gPDEzNTAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1yYW1wLWRlbGF5ID0gPDEy NTAwPjsNCj4gKwkJCQlyZWd1bGF0b3ItYWx3YXlzLW9uOw0KPiArCQkJCXJlZ3VsYXRvci1hbGxv d2VkLW1vZGVzID0gPDAgMT47DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdfdnBjYTdfcmVn OiBidWNrX3ZwY2E3IHsNCj4gKwkJCQlyZWd1bGF0b3ItY29tcGF0aWJsZSA9ICJidWNrX3ZwY2E3 IjsNCj4gKwkJCQlyZWd1bGF0b3ItbmFtZSA9ICJ2cGNhNyI7DQo+ICsJCQkJcmVndWxhdG9yLW1p bi1taWNyb3ZvbHQgPSA8IDcwMDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLW1heC1taWNyb3ZvbHQg PSA8MTM1MDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLXJhbXAtZGVsYXkgPSA8MTI1MDA+Ow0KPiAr CQkJCXJlZ3VsYXRvci1lbmFibGUtcmFtcC1kZWxheSA9IDwxMTU+Ow0KPiArCQkJCXJlZ3VsYXRv ci1hbHdheXMtb247DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdfdnNyYW1jYTE1X3JlZzog YnVja192c3JhbWNhMTUgew0KPiArCQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImJ1Y2tfdnNy YW1jYTE1IjsNCj4gKwkJCQlyZWd1bGF0b3ItbmFtZSA9ICJ2c3JhbWNhMTUiOw0KPiArCQkJCXJl Z3VsYXRvci1taW4tbWljcm92b2x0ID0gPCA3MDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1tYXgt bWljcm92b2x0ID0gPDEzNTAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1yYW1wLWRlbGF5ID0gPDEy NTAwPjsNCj4gKwkJCQlyZWd1bGF0b3ItYWx3YXlzLW9uOw0KPiArCQkJfTsNCj4gKw0KPiArCQkJ bXQ2Mzk3X3ZzcmFtY2E3X3JlZzogYnVja192c3JhbWNhNyB7DQo+ICsJCQkJcmVndWxhdG9yLWNv bXBhdGlibGUgPSAiYnVja192c3JhbWNhNyI7DQo+ICsJCQkJcmVndWxhdG9yLW5hbWUgPSAidnNy YW1jYTciOw0KPiArCQkJCXJlZ3VsYXRvci1taW4tbWljcm92b2x0ID0gPCA3MDAwMDA+Ow0KPiAr CQkJCXJlZ3VsYXRvci1tYXgtbWljcm92b2x0ID0gPDEzNTAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRv ci1yYW1wLWRlbGF5ID0gPDEyNTAwPjsNCj4gKwkJCQlyZWd1bGF0b3ItYWx3YXlzLW9uOw0KPiAr CQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3Zjb3JlX3JlZzogYnVja192Y29yZSB7DQo+ICsJCQkJ cmVndWxhdG9yLWNvbXBhdGlibGUgPSAiYnVja192Y29yZSI7DQo+ICsJCQkJcmVndWxhdG9yLW5h bWUgPSAidmNvcmUiOw0KPiArCQkJCXJlZ3VsYXRvci1taW4tbWljcm92b2x0ID0gPCA3MDAwMDA+ Ow0KPiArCQkJCXJlZ3VsYXRvci1tYXgtbWljcm92b2x0ID0gPDEzNTAwMDA+Ow0KPiArCQkJCXJl Z3VsYXRvci1yYW1wLWRlbGF5ID0gPDEyNTAwPjsNCj4gKwkJCQlyZWd1bGF0b3ItYWx3YXlzLW9u Ow0KPiArCQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3ZncHVfcmVnOiBidWNrX3ZncHUgew0KPiAr CQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImJ1Y2tfdmdwdSI7DQo+ICsJCQkJcmVndWxhdG9y LW5hbWUgPSAidmdwdSI7DQo+ICsJCQkJcmVndWxhdG9yLW1pbi1taWNyb3ZvbHQgPSA8IDcwMDAw MD47DQo+ICsJCQkJcmVndWxhdG9yLW1heC1taWNyb3ZvbHQgPSA8MTM1MDAwMD47DQo+ICsJCQkJ cmVndWxhdG9yLXJhbXAtZGVsYXkgPSA8MTI1MDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1lbmFibGUt cmFtcC1kZWxheSA9IDwxMTU+Ow0KPiArCQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3Zkcm1fcmVn OiBidWNrX3Zkcm0gew0KPiArCQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImJ1Y2tfdmRybSI7 DQo+ICsJCQkJcmVndWxhdG9yLW5hbWUgPSAidmRybSI7DQo+ICsJCQkJcmVndWxhdG9yLW1pbi1t aWNyb3ZvbHQgPSA8MTIwMDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLW1heC1taWNyb3ZvbHQgPSA8 MTQwMDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLXJhbXAtZGVsYXkgPSA8MTI1MDA+Ow0KPiArCQkJ CXJlZ3VsYXRvci1hbHdheXMtb247DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdfdmlvMThf cmVnOiBidWNrX3ZpbzE4IHsNCj4gKwkJCQlyZWd1bGF0b3ItY29tcGF0aWJsZSA9ICJidWNrX3Zp bzE4IjsNCj4gKwkJCQlyZWd1bGF0b3ItbmFtZSA9ICJ2aW8xOCI7DQo+ICsJCQkJcmVndWxhdG9y LW1pbi1taWNyb3ZvbHQgPSA8MTYyMDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLW1heC1taWNyb3Zv bHQgPSA8MTk4MDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLXJhbXAtZGVsYXkgPSA8MTI1MDA+Ow0K PiArCQkJCXJlZ3VsYXRvci1hbHdheXMtb247DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdf dnRjeG9fcmVnOiBsZG9fdnRjeG8gew0KPiArCQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImxk b192dGN4byI7DQo+ICsJCQkJcmVndWxhdG9yLW5hbWUgPSAidnRjeG8iOw0KPiArCQkJCXJlZ3Vs YXRvci1hbHdheXMtb247DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdfdmEyOF9yZWc6IGxk b192YTI4IHsNCj4gKwkJCQlyZWd1bGF0b3ItY29tcGF0aWJsZSA9ICJsZG9fdmEyOCI7DQo+ICsJ CQkJcmVndWxhdG9yLW5hbWUgPSAidmEyOCI7DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdf dmNhbWFfcmVnOiBsZG9fdmNhbWEgew0KPiArCQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImxk b192Y2FtYSI7DQo+ICsJCQkJcmVndWxhdG9yLW5hbWUgPSAidmNhbWEiOw0KPiArCQkJCXJlZ3Vs YXRvci1taW4tbWljcm92b2x0ID0gPDE4MDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1tYXgtbWlj cm92b2x0ID0gPDE4MDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1lbmFibGUtcmFtcC1kZWxheSA9 IDwyMTg+Ow0KPiArCQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3ZpbzI4X3JlZzogbGRvX3ZpbzI4 IHsNCj4gKwkJCQlyZWd1bGF0b3ItY29tcGF0aWJsZSA9ICJsZG9fdmlvMjgiOw0KPiArCQkJCXJl Z3VsYXRvci1uYW1lID0gInZpbzI4IjsNCj4gKwkJCQlyZWd1bGF0b3ItYWx3YXlzLW9uOw0KPiAr CQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3Z1c2JfcmVnOiBsZG9fdnVzYiB7DQo+ICsJCQkJcmVn dWxhdG9yLWNvbXBhdGlibGUgPSAibGRvX3Z1c2IiOw0KPiArCQkJCXJlZ3VsYXRvci1uYW1lID0g InZ1c2IiOw0KPiArCQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3ZtY19yZWc6IGxkb192bWMgew0K PiArCQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImxkb192bWMiOw0KPiArCQkJCXJlZ3VsYXRv ci1uYW1lID0gInZtYyI7DQo+ICsJCQkJcmVndWxhdG9yLW1pbi1taWNyb3ZvbHQgPSA8MTgwMDAw MD47DQo+ICsJCQkJcmVndWxhdG9yLW1heC1taWNyb3ZvbHQgPSA8MzMwMDAwMD47DQo+ICsJCQkJ cmVndWxhdG9yLWVuYWJsZS1yYW1wLWRlbGF5ID0gPDIxOD47DQo+ICsJCQl9Ow0KPiArDQo+ICsJ CQltdDYzOTdfdm1jaF9yZWc6IGxkb192bWNoIHsNCj4gKwkJCQlyZWd1bGF0b3ItY29tcGF0aWJs ZSA9ICJsZG9fdm1jaCI7DQo+ICsJCQkJcmVndWxhdG9yLW5hbWUgPSAidm1jaCI7DQo+ICsJCQkJ cmVndWxhdG9yLW1pbi1taWNyb3ZvbHQgPSA8MzAwMDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLW1h eC1taWNyb3ZvbHQgPSA8MzMwMDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLWVuYWJsZS1yYW1wLWRl bGF5ID0gPDIxOD47DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdfdmVtY18zdjNfcmVnOiBs ZG9fdmVtYzN2MyB7DQo+ICsJCQkJcmVndWxhdG9yLWNvbXBhdGlibGUgPSAibGRvX3ZlbWMzdjMi Ow0KPiArCQkJCXJlZ3VsYXRvci1uYW1lID0gInZlbWNfM3YzIjsNCj4gKwkJCQlyZWd1bGF0b3It bWluLW1pY3Jvdm9sdCA9IDwzMDAwMDAwPjsNCj4gKwkJCQlyZWd1bGF0b3ItbWF4LW1pY3Jvdm9s dCA9IDwzMzAwMDAwPjsNCj4gKwkJCQlyZWd1bGF0b3ItZW5hYmxlLXJhbXAtZGVsYXkgPSA8MjE4 PjsNCj4gKwkJCX07DQo+ICsNCj4gKwkJCW10NjM5N192Z3AxX3JlZzogbGRvX3ZncDEgew0KPiAr CQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImxkb192Z3AxIjsNCj4gKwkJCQlyZWd1bGF0b3It bmFtZSA9ICJ2Y2FtZCI7DQo+ICsJCQkJcmVndWxhdG9yLW1pbi1taWNyb3ZvbHQgPSA8MTgwMDAw MD47DQo+ICsJCQkJcmVndWxhdG9yLW1heC1taWNyb3ZvbHQgPSA8MTgwMDAwMD47DQo+ICsJCQkJ cmVndWxhdG9yLWVuYWJsZS1yYW1wLWRlbGF5ID0gPDI0MD47DQo+ICsJCQl9Ow0KPiArDQo+ICsJ CQltdDYzOTdfdmdwMl9yZWc6IGxkb192Z3AyIHsNCj4gKwkJCQlyZWd1bGF0b3ItY29tcGF0aWJs ZSA9ICJsZG9fdmdwMiI7DQo+ICsJCQkJcmVndWxhdG9yLW5hbWUgPSAidmNhbWlvIjsNCj4gKwkJ CQlyZWd1bGF0b3ItbWluLW1pY3Jvdm9sdCA9IDwzMzAwMDAwPjsNCj4gKwkJCQlyZWd1bGF0b3It bWF4LW1pY3Jvdm9sdCA9IDwzMzAwMDAwPjsNCj4gKwkJCQlyZWd1bGF0b3ItZW5hYmxlLXJhbXAt ZGVsYXkgPSA8MjE4PjsNCj4gKwkJCX07DQo+ICsNCj4gKwkJCW10NjM5N192Z3AzX3JlZzogbGRv X3ZncDMgew0KPiArCQkJCXJlZ3VsYXRvci1jb21wYXRpYmxlID0gImxkb192Z3AzIjsNCj4gKwkJ CQlyZWd1bGF0b3ItbmFtZSA9ICJ2Y2FtYWYiOw0KPiArCQkJCXJlZ3VsYXRvci1taW4tbWljcm92 b2x0ID0gPDE4MDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1tYXgtbWljcm92b2x0ID0gPDE4MDAw MDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1lbmFibGUtcmFtcC1kZWxheSA9IDwyMTg+Ow0KPiArCQkJ fTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3ZncDRfcmVnOiBsZG9fdmdwNCB7DQo+ICsJCQkJcmVndWxh dG9yLWNvbXBhdGlibGUgPSAibGRvX3ZncDQiOw0KPiArCQkJCXJlZ3VsYXRvci1uYW1lID0gInZn cDQiOw0KPiArCQkJCXJlZ3VsYXRvci1taW4tbWljcm92b2x0ID0gPDEyMDAwMDA+Ow0KPiArCQkJ CXJlZ3VsYXRvci1tYXgtbWljcm92b2x0ID0gPDMzMDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1l bmFibGUtcmFtcC1kZWxheSA9IDwyMTg+Ow0KPiArCQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3Zn cDVfcmVnOiBsZG9fdmdwNSB7DQo+ICsJCQkJcmVndWxhdG9yLWNvbXBhdGlibGUgPSAibGRvX3Zn cDUiOw0KPiArCQkJCXJlZ3VsYXRvci1uYW1lID0gInZncDUiOw0KPiArCQkJCXJlZ3VsYXRvci1t aW4tbWljcm92b2x0ID0gPDEyMDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1tYXgtbWljcm92b2x0 ID0gPDMwMDAwMDA+Ow0KPiArCQkJCXJlZ3VsYXRvci1lbmFibGUtcmFtcC1kZWxheSA9IDwyMTg+ Ow0KPiArCQkJfTsNCj4gKw0KPiArCQkJbXQ2Mzk3X3ZncDZfcmVnOiBsZG9fdmdwNiB7DQo+ICsJ CQkJcmVndWxhdG9yLWNvbXBhdGlibGUgPSAibGRvX3ZncDYiOw0KPiArCQkJCXJlZ3VsYXRvci1u YW1lID0gInZncDYiOw0KPiArCQkJCXJlZ3VsYXRvci1taW4tbWljcm92b2x0ID0gPDMzMDAwMDA+ Ow0KPiArCQkJCXJlZ3VsYXRvci1tYXgtbWljcm92b2x0ID0gPDMzMDAwMDA+Ow0KPiArCQkJCXJl Z3VsYXRvci1lbmFibGUtcmFtcC1kZWxheSA9IDwyMTg+Ow0KPiArCQkJCXJlZ3VsYXRvci1hbHdh eXMtb247DQo+ICsJCQl9Ow0KPiArDQo+ICsJCQltdDYzOTdfdmlicl9yZWc6IGxkb192aWJyIHsN Cj4gKwkJCQlyZWd1bGF0b3ItY29tcGF0aWJsZSA9ICJsZG9fdmliciI7DQo+ICsJCQkJcmVndWxh dG9yLW5hbWUgPSAidmliciI7DQo+ICsJCQkJcmVndWxhdG9yLW1pbi1taWNyb3ZvbHQgPSA8MTMw MDAwMD47DQo+ICsJCQkJcmVndWxhdG9yLW1heC1taWNyb3ZvbHQgPSA8MzMwMDAwMD47DQo+ICsJ CQkJcmVndWxhdG9yLWVuYWJsZS1yYW1wLWRlbGF5ID0gPDIxOD47DQo+ICsJCQl9Ow0KPiArCQl9 Ow0KPiArCX07DQo+ICt9Ow0KPiArDQo+ICsmc3BpIHsNCj4gKwlwaW5jdHJsLW5hbWVzID0gImRl ZmF1bHQiOw0KPiArCXBpbmN0cmwtMCA9IDwmc3BpX3BpbnNfYT47DQo+ICsJbWVkaWF0ZWsscGFk LXNlbGVjdCA9IDwxPjsNCj4gKwlzdGF0dXMgPSAib2theSI7DQo+ICsJLyogY2xpZW50cyAqLw0K PiArCWNyb3NfZWM6IGVjQDAgew0KPiArCQljb21wYXRpYmxlID0gImdvb2dsZSxjcm9zLWVjLXNw aSI7DQo+ICsJCXJlZyA9IDwweDA+Ow0KPiArCQlzcGktbWF4LWZyZXF1ZW5jeSA9IDwxMjAwMDAw MD47DQo+ICsJCWludGVycnVwdC1wYXJlbnQgPSA8JnBpbz47DQo+ICsJCWludGVycnVwdHMgPSA8 MCBJUlFfVFlQRV9MRVZFTF9MT1c+Ow0KPiArCQlnb29nbGUsY3Jvcy1lYy1zcGktbXNnLWRlbGF5 ID0gPDUwMD47DQo+ICsNCj4gKwkJaTJjX3R1bm5lbDogaTJjLXR1bm5lbEAwIHsNCj4gKwkJCWNv bXBhdGlibGUgPSAiZ29vZ2xlLGNyb3MtZWMtaTJjLXR1bm5lbCI7DQo+ICsJCQlnb29nbGUscmVt b3RlLWJ1cyA9IDwwPjsNCj4gKwkJCSNhZGRyZXNzLWNlbGxzID0gPDE+Ow0KPiArCQkJI3NpemUt Y2VsbHMgPSA8MD47DQo+ICsNCj4gKwkJCWJhdHRlcnk6IHNicy1iYXR0ZXJ5QGIgew0KPiArCQkJ CWNvbXBhdGlibGUgPSAic2JzLHNicy1iYXR0ZXJ5IjsNCj4gKwkJCQlyZWcgPSA8MHhiPjsNCj4g KwkJCQlzYnMsaTJjLXJldHJ5LWNvdW50ID0gPDI+Ow0KPiArCQkJCXNicyxwb2xsLXJldHJ5LWNv dW50ID0gPDE+Ow0KPiArCQkJfTsNCj4gKwkJfTsNCj4gKwl9Ow0KPiArfTsNCj4gKw0KPiArJnRo ZXJtYWwgew0KPiArCWJhbmswLXN1cHBseSA9IDwmbXQ2Mzk3X3ZwY2ExNV9yZWc+Ow0KPiArCWJh bmsxLXN1cHBseSA9IDwmZGE5MjExX3ZjcHVfcmVnPjsNCj4gK307DQo+ICsNCj4gKyZ1YXJ0MCB7 DQo+ICsJc3RhdHVzID0gIm9rYXkiOw0KPiArfTsNCj4gKw0KPiArJnNzdXNiIHsNCg0Kc29ydGlu ZyBhY2NvcmRpbmcgdG8gbmFtZSwgcGxlYXNlIHB1dCB0aGlzIGJlZm9yZSB0aGVybWFsLg0KDQpK b2UuQw0KDQo=