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X-UUID: f8e1e20328ee411c9abcf9805541c58c-20200225 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 119154821; Tue, 25 Feb 2020 15:26:58 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 25 Feb 2020 15:26:04 +0800 Received: from [10.15.20.246] (10.15.20.246) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 25 Feb 2020 15:27:08 +0800 Message-ID: <1582615551.28426.5.camel@mbjsdccf07> Subject: Re: [RESEND,PATCH 03/13] iommu/mediatek: Add mtk_iommu_pgtable structure From: chao hao To: Yong Wu Date: Tue, 25 Feb 2020 15:25:51 +0800 In-Reply-To: <1581769046.32039.27.camel@mhfsdcap03> References: <20191104115238.2394-1-chao.hao@mediatek.com> <20191104115238.2394-4-chao.hao@mediatek.com> <1576498396.28043.78.camel@mhfsdcap03> <1577785148.30177.5.camel@mbjsdccf07> <1581769046.32039.27.camel@mhfsdcap03> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Cc: Anan Sun =?UTF-8?Q?=28=E5=AD=99=E5=AE=89=E5=AE=89=29?= , "devicetree@vger.kernel.org" , Cui Zhang =?UTF-8?Q?=28=E5=BC=A0=E7=BF=A0=29?= , Jun Yan =?UTF-8?Q?=28=E9=A2=9C=E5=86=9B=29?= , wsd_upstream , youlin.pei@mediatek.com, "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , Rob Herring , "linux-mediatek@lists.infradead.org" , Miles Chen =?UTF-8?Q?=28=E9=99=B3=E6=B0=91=E6=A8=BA=29?= , Matthias Brugger , "linux-arm-kernel@lists.infradead.org" , fy.yang@mediatek.com X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Sat, 2020-02-15 at 20:17 +0800, Yong Wu wrote: > On Tue, 2019-12-31 at 17:39 +0800, chao hao wrote: > > On Mon, 2019-12-16 at 20:13 +0800, Yong Wu wrote: > > > On Mon, 2019-11-04 at 19:52 +0800, Chao Hao wrote: > > > > Start with this patch, we will change the SW architecture > > > > to support multiple domains. SW architecture will has a big change, > > > > so we need to modify a little bit by more than one patch. > > > > The new SW overall architecture is as below: > > > > > > > > iommu0 iommu1 > > > > | | > > > > ----------- > > > > | > > > > mtk_iommu_pgtable > > > > | > > > > ------------------------------------------ > > > > | | | > > > > mtk_iommu_domain1 mtk_iommu_domain2 mtk_iommu_domain3 > > > > | | | > > > > iommu_group1 iommu_group2 iommu_group3 > > > > | | | > > > > iommu_domain1 iommu_domain2 iommu_domain3 > > > > | | | > > > > iova region1(normal) iova region2(CCU) iova region3(VPU) > > > > > > > > For current structure, no matter how many iommus there are, > > > > they use the same page table to simplify the usage of module. > > > > In order to make the software architecture more explicit, this > > > > patch will create a global mtk_iommu_pgtable structure to describe > > > > page table and all the iommus use it. > > > > > > Thanks for the hard work of this file. Actually this patch and the later > > > ones confuse me. Why do you make this flow change? > > > for making the code "more explicit" or for adding multi-domain support > > > in 13/13. > > > > > > IMHO, the change is unnecessary. > > > a) For me, this change has no improvement. currently we use a global > > > mtk_iommu_get_m4u_data to get the M4U data. I will be very glad if you > > > could get rid of it. But in this patchset, You use a another global > > > mtk_iommu_pgtable to instead. For me. It has no improvement. > > > > Thanks for you advice! > > > > For current SW arch, all the IOMMU HW use the same page table, we can > > use a global mtk_iommu_pgtable to discribe the information of page table > > What's your plan if the 4GB iova range is not enough for us in future? > Do you plan to add a new global mtk_iommu_pgtable again? > if the 4GB iova range is not enough, we only need to modify mtk_domain_data structure: min_iova and max_iova, Compare with current SW arch: dom->domain.geometry.aperture_start = 0; dom->domain.geometry.aperture_end = DMA_BIT_MASK(32); ==> dom->domain.geometry.aperture_start = pgtable->dom_region->min_iova; dom->domain.geometry.aperture_end = pgtable->dom_region->max_iova; struct mtk_domain_data { dma_addr_t min_iova; dma_addr_t max_iova; }; > > and all the IOMMU attach it, I think that it is more clear and > > unambiguous. For beginners, it maybe more easily explicable? > > I still don't get the necessity of this change. it is only for making > code clear from your point for view, right? > > This code has been reviewed for many years, I don't know why you think > it is ambiguous. it is clear for me at lease. and I will complain that > you add a new global variable in this change. > > > > > > > b) This patchset break the original flow. device_group give you a > > > software chance for initializing, then you move pagetable allocating > > > code into it. But it isn't device_group job. > > > > > > > As is shown above diagram, mtk_iommu_pgtable includes iommu_group and > > iommu_domain,so we need to allocate mtk_iommu_pgtable and initialize it > > in device_group firstly,and then execute the original flow, it only > > changes place for creating mtk_iommu_pgtable and don't break original > > device_group flow. > > I understand you have to do this change after you adjust the structure. > I mean that it may be not proper since allocating pagetable should not > be done in device_group logically. From here, Could we get this change > looks not good?. > gentle ping ... > > > I can not decide if your flow is right. But if you only want to add > > > support multi-domain, I guess you could extend the current "m4u_group" > > > to a array "m4u_group[N]". It may be more simple. To make mt6779 > > > progress easily, I suggest you can use this way to support multi-domain > > > firstly. Then you could send this new mtk_iommu_pgtable patchset for the > > > code "more explicit" if you insist. > > Could you help try this way if it could meet your requirement? Then > let's compare which one is better. > > > BTW, your patches(including v2) cause hangup as below since > "data->m4u_dom" was uninitialized. > > > Unable to handle kernel NULL pointer dereference at virtual address > 0000000000000010 > ... > pc : mtk_iommu_tlb_flush_page_nosync+0x38/0xb8 > lr : __arm_v7s_unmap+0x174/0x598 > ... > Call trace: > mtk_iommu_tlb_flush_page_nosync+0x38/0xb8 > __arm_v7s_unmap+0x174/0x598 > arm_v7s_unmap+0x30/0x48 > mtk_iommu_unmap+0x20/0x28 > __iommu_unmap+0xa4/0xf8 > iommu_unmap+0x44/0x90 > yes, you are right. I will modify it in next version, thanks > > > > > > > The diagram is as below: > > > > > > > > mtk_iommu_data1(MM) mtk_iommu_data2(APU) > > > > | | > > > > | | > > > > ------mtk_iommu_pgtable----- > > > > > > > > We need to create global mtk_iommu_pgtable to include all the iova > > > > regions firstly and special iova regions by divided based on it, > > > > so the information of pgtable needs to be created in device_group. > > > > > > > > Signed-off-by: Chao Hao > > > > --- > > > > drivers/iommu/mtk_iommu.c | 84 +++++++++++++++++++++++++++++++++++++++ > > > > drivers/iommu/mtk_iommu.h | 1 + > > > > 2 files changed, 85 insertions(+) > > > > > > > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > > > > index f2847e661137..fcbde6b0f58d 100644 > > > > --- a/drivers/iommu/mtk_iommu.c > > > > +++ b/drivers/iommu/mtk_iommu.c > > > > @@ -123,6 +123,12 @@ struct mtk_iommu_domain { > > > > struct iommu_domain domain; > > > > }; > > > > > > > > +struct mtk_iommu_pgtable { > > > > + struct io_pgtable_cfg cfg; > > > > + struct io_pgtable_ops *iop; > > > > +}; > > > > + > > > > +static struct mtk_iommu_pgtable *share_pgtable; > > > > static const struct iommu_ops mtk_iommu_ops; > > > > > > > > /* > > > > @@ -170,6 +176,11 @@ static struct mtk_iommu_data *mtk_iommu_get_m4u_data(void) > > > > return NULL; > > > > } > > > > > > > > +static struct mtk_iommu_pgtable *mtk_iommu_get_pgtable(void) > > > > +{ > > > > + return share_pgtable; > > > > +} > > > > + > > > > static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom) > > > > { > > > > return container_of(dom, struct mtk_iommu_domain, domain); > > > > @@ -322,6 +333,13 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom) > > > > { > > > > struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); > > > > > > > > + if (data->pgtable) { > > > > + dom->cfg = data->pgtable->cfg; > > > > + dom->iop = data->pgtable->iop; > > > > + dom->domain.pgsize_bitmap = data->pgtable->cfg.pgsize_bitmap; > > > > + return 0; > > > > + } > > > > + > > > > dom->cfg = (struct io_pgtable_cfg) { > > > > .quirks = IO_PGTABLE_QUIRK_ARM_NS | > > > > IO_PGTABLE_QUIRK_NO_PERMS | > > > > @@ -345,6 +363,61 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom) > > > > return 0; > > > > } > > > > > > > > +static struct mtk_iommu_pgtable *create_pgtable(struct mtk_iommu_data *data) > > > > +{ > > > > + struct mtk_iommu_pgtable *pgtable; > > > > + > > > > + pgtable = kzalloc(sizeof(*pgtable), GFP_KERNEL); > > > > + if (!pgtable) > > > > + return ERR_PTR(-ENOMEM); > > > > + > > > > + pgtable->cfg = (struct io_pgtable_cfg) { > > > > + .quirks = IO_PGTABLE_QUIRK_ARM_NS | > > > > + IO_PGTABLE_QUIRK_NO_PERMS | > > > > + IO_PGTABLE_QUIRK_TLBI_ON_MAP | > > > > + IO_PGTABLE_QUIRK_ARM_MTK_EXT, > > > > + .pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap, > > > > + .ias = 32, > > > > + .oas = 34, > > > > + .tlb = &mtk_iommu_flush_ops, > > > > + .iommu_dev = data->dev, > > > > + }; > > > > + > > > > + pgtable->iop = alloc_io_pgtable_ops(ARM_V7S, &pgtable->cfg, data); > > > > + if (!pgtable->iop) { > > > > + dev_err(data->dev, "Failed to alloc io pgtable\n"); > > > > + return ERR_PTR(-EINVAL); > > > > + } > > > > + > > > > + dev_info(data->dev, "%s create pgtable done\n", __func__); > > > > + > > > > + return pgtable; > > > > +} > > > > + > > > > +static int mtk_iommu_attach_pgtable(struct mtk_iommu_data *data, > > > > + struct device *dev) > > > > +{ > > > > + struct mtk_iommu_pgtable *pgtable = mtk_iommu_get_pgtable(); > > > > + > > > > + /* create share pgtable */ > > > > + if (!pgtable) { > > > > + pgtable = create_pgtable(data); > > > > + if (IS_ERR(pgtable)) { > > > > + dev_err(data->dev, "Failed to create pgtable\n"); > > > > + return -ENOMEM; > > > > + } > > > > + > > > > + share_pgtable = pgtable; > > > > + } > > > > + > > > > + /* binding to pgtable */ > > > > + data->pgtable = pgtable; > > > > + > > > > + dev_info(data->dev, "m4u%d attach_pgtable done!\n", data->m4u_id); > > > > + > > > > + return 0; > > > > +} > > > > + > > > > static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type) > > > > { > > > > struct mtk_iommu_domain *dom; > > > > @@ -508,10 +581,21 @@ static void mtk_iommu_remove_device(struct device *dev) > > > > static struct iommu_group *mtk_iommu_device_group(struct device *dev) > > > > { > > > > struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); > > > > + struct mtk_iommu_pgtable *pgtable; > > > > + int ret = 0; > > > > > > > > if (!data) > > > > return ERR_PTR(-ENODEV); > > > > > > > > + pgtable = data->pgtable; > > > > + if (!pgtable) { > > > > + ret = mtk_iommu_attach_pgtable(data, dev); > > > > + if (ret) { > > > > + dev_err(data->dev, "Failed to device_group\n"); > > > > + return NULL; > > > > + } > > > > + } > > > > + > > > > /* All the client devices are in the same m4u iommu-group */ > > > > if (!data->m4u_group) { > > > > data->m4u_group = iommu_group_alloc(); > > > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > > > > index 132dc765a40b..dd5f19f78b62 100644 > > > > --- a/drivers/iommu/mtk_iommu.h > > > > +++ b/drivers/iommu/mtk_iommu.h > > > > @@ -61,6 +61,7 @@ struct mtk_iommu_data { > > > > struct clk *bclk; > > > > phys_addr_t protect_base; /* protect memory base */ > > > > struct mtk_iommu_suspend_reg reg; > > > > + struct mtk_iommu_pgtable *pgtable; > > > > struct mtk_iommu_domain *m4u_dom; > > > > struct iommu_group *m4u_group; > > > > bool enable_4GB; > > > > > > > > > > > > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A8F8C35DF8 for ; Tue, 25 Feb 2020 07:37:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 29C9621744 for ; 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bh=fE4NqegaPIl2E5K0BSQdRpTvTQnMKgleeKsxdQnFM+Y=; b=IOOAvLRKMZH7Raz7BY8B4k4HjBJ4jZmFLedrUiMACk8jM+wHVVLU3IRbX5XjIBpVUcpUUqRPYM1XOZJdC5+j3fz58BQ0VxfR0T6xOl6CNN6fxA0mcWrHw1rpOJoVOBqmwS2QDEoAr9Mz235SHSA7o54yzqrdNbjereoCkTgoITY=; X-UUID: d09967e09c97435cbb44b98a20f101ab-20200224 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1815845823; Mon, 24 Feb 2020 23:37:00 -0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 24 Feb 2020 23:27:34 -0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 25 Feb 2020 15:26:04 +0800 Received: from [10.15.20.246] (10.15.20.246) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 25 Feb 2020 15:27:08 +0800 Message-ID: <1582615551.28426.5.camel@mbjsdccf07> Subject: Re: [RESEND,PATCH 03/13] iommu/mediatek: Add mtk_iommu_pgtable structure From: chao hao To: Yong Wu Date: Tue, 25 Feb 2020 15:25:51 +0800 In-Reply-To: <1581769046.32039.27.camel@mhfsdcap03> References: <20191104115238.2394-1-chao.hao@mediatek.com> <20191104115238.2394-4-chao.hao@mediatek.com> <1576498396.28043.78.camel@mhfsdcap03> <1577785148.30177.5.camel@mbjsdccf07> <1581769046.32039.27.camel@mhfsdcap03> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200224_233705_192323_B6C17065 X-CRM114-Status: GOOD ( 39.54 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anan Sun =?UTF-8?Q?=28=E5=AD=99=E5=AE=89=E5=AE=89=29?= , "devicetree@vger.kernel.org" , Cui Zhang =?UTF-8?Q?=28=E5=BC=A0=E7=BF=A0=29?= , Jun Yan =?UTF-8?Q?=28=E9=A2=9C=E5=86=9B=29?= , wsd_upstream , Joerg Roedel , youlin.pei@mediatek.com, "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , Rob Herring , "linux-mediatek@lists.infradead.org" , Miles Chen =?UTF-8?Q?=28=E9=99=B3=E6=B0=91=E6=A8=BA=29?= , Matthias Brugger , "linux-arm-kernel@lists.infradead.org" , fy.yang@mediatek.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Sat, 2020-02-15 at 20:17 +0800, Yong Wu wrote: > On Tue, 2019-12-31 at 17:39 +0800, chao hao wrote: > > On Mon, 2019-12-16 at 20:13 +0800, Yong Wu wrote: > > > On Mon, 2019-11-04 at 19:52 +0800, Chao Hao wrote: > > > > Start with this patch, we will change the SW architecture > > > > to support multiple domains. SW architecture will has a big change, > > > > so we need to modify a little bit by more than one patch. > > > > The new SW overall architecture is as below: > > > > > > > > iommu0 iommu1 > > > > | | > > > > ----------- > > > > | > > > > mtk_iommu_pgtable > > > > | > > > > ------------------------------------------ > > > > | | | > > > > mtk_iommu_domain1 mtk_iommu_domain2 mtk_iommu_domain3 > > > > | | | > > > > iommu_group1 iommu_group2 iommu_group3 > > > > | | | > > > > iommu_domain1 iommu_domain2 iommu_domain3 > > > > | | | > > > > iova region1(normal) iova region2(CCU) iova region3(VPU) > > > > > > > > For current structure, no matter how many iommus there are, > > > > they use the same page table to simplify the usage of module. > > > > In order to make the software architecture more explicit, this > > > > patch will create a global mtk_iommu_pgtable structure to describe > > > > page table and all the iommus use it. > > > > > > Thanks for the hard work of this file. Actually this patch and the later > > > ones confuse me. Why do you make this flow change? > > > for making the code "more explicit" or for adding multi-domain support > > > in 13/13. > > > > > > IMHO, the change is unnecessary. > > > a) For me, this change has no improvement. currently we use a global > > > mtk_iommu_get_m4u_data to get the M4U data. I will be very glad if you > > > could get rid of it. But in this patchset, You use a another global > > > mtk_iommu_pgtable to instead. For me. It has no improvement. > > > > Thanks for you advice! > > > > For current SW arch, all the IOMMU HW use the same page table, we can > > use a global mtk_iommu_pgtable to discribe the information of page table > > What's your plan if the 4GB iova range is not enough for us in future? > Do you plan to add a new global mtk_iommu_pgtable again? > if the 4GB iova range is not enough, we only need to modify mtk_domain_data structure: min_iova and max_iova, Compare with current SW arch: dom->domain.geometry.aperture_start = 0; dom->domain.geometry.aperture_end = DMA_BIT_MASK(32); ==> dom->domain.geometry.aperture_start = pgtable->dom_region->min_iova; dom->domain.geometry.aperture_end = pgtable->dom_region->max_iova; struct mtk_domain_data { dma_addr_t min_iova; dma_addr_t max_iova; }; > > and all the IOMMU attach it, I think that it is more clear and > > unambiguous. For beginners, it maybe more easily explicable? > > I still don't get the necessity of this change. it is only for making > code clear from your point for view, right? > > This code has been reviewed for many years, I don't know why you think > it is ambiguous. it is clear for me at lease. and I will complain that > you add a new global variable in this change. > > > > > > > b) This patchset break the original flow. device_group give you a > > > software chance for initializing, then you move pagetable allocating > > > code into it. But it isn't device_group job. > > > > > > > As is shown above diagram, mtk_iommu_pgtable includes iommu_group and > > iommu_domain,so we need to allocate mtk_iommu_pgtable and initialize it > > in device_group firstly,and then execute the original flow, it only > > changes place for creating mtk_iommu_pgtable and don't break original > > device_group flow. > > I understand you have to do this change after you adjust the structure. > I mean that it may be not proper since allocating pagetable should not > be done in device_group logically. From here, Could we get this change > looks not good?. > gentle ping ... > > > I can not decide if your flow is right. But if you only want to add > > > support multi-domain, I guess you could extend the current "m4u_group" > > > to a array "m4u_group[N]". It may be more simple. To make mt6779 > > > progress easily, I suggest you can use this way to support multi-domain > > > firstly. Then you could send this new mtk_iommu_pgtable patchset for the > > > code "more explicit" if you insist. > > Could you help try this way if it could meet your requirement? Then > let's compare which one is better. > > > BTW, your patches(including v2) cause hangup as below since > "data->m4u_dom" was uninitialized. > > > Unable to handle kernel NULL pointer dereference at virtual address > 0000000000000010 > ... > pc : mtk_iommu_tlb_flush_page_nosync+0x38/0xb8 > lr : __arm_v7s_unmap+0x174/0x598 > ... > Call trace: > mtk_iommu_tlb_flush_page_nosync+0x38/0xb8 > __arm_v7s_unmap+0x174/0x598 > arm_v7s_unmap+0x30/0x48 > mtk_iommu_unmap+0x20/0x28 > __iommu_unmap+0xa4/0xf8 > iommu_unmap+0x44/0x90 > yes, you are right. I will modify it in next version, thanks > > > > > > > The diagram is as below: > > > > > > > > mtk_iommu_data1(MM) mtk_iommu_data2(APU) > > > > | | > > > > | | > > > > ------mtk_iommu_pgtable----- > > > > > > > > We need to create global mtk_iommu_pgtable to include all the iova > > > > regions firstly and special iova regions by divided based on it, > > > > so the information of pgtable needs to be created in device_group. > > > > > > > > Signed-off-by: Chao Hao > > > > --- > > > > drivers/iommu/mtk_iommu.c | 84 +++++++++++++++++++++++++++++++++++++++ > > > > drivers/iommu/mtk_iommu.h | 1 + > > > > 2 files changed, 85 insertions(+) > > > > > > > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > > > > index f2847e661137..fcbde6b0f58d 100644 > > > > --- a/drivers/iommu/mtk_iommu.c > > > > +++ b/drivers/iommu/mtk_iommu.c > > > > @@ -123,6 +123,12 @@ struct mtk_iommu_domain { > > > > struct iommu_domain domain; > > > > }; > > > > > > > > +struct mtk_iommu_pgtable { > > > > + struct io_pgtable_cfg cfg; > > > > + struct io_pgtable_ops *iop; > > > > +}; > > > > + > > > > +static struct mtk_iommu_pgtable *share_pgtable; > > > > static const struct iommu_ops mtk_iommu_ops; > > > > > > > > /* > > > > @@ -170,6 +176,11 @@ static struct mtk_iommu_data *mtk_iommu_get_m4u_data(void) > > > > return NULL; > > > > } > > > > > > > > +static struct mtk_iommu_pgtable *mtk_iommu_get_pgtable(void) > > > > +{ > > > > + return share_pgtable; > > > > +} > > > > + > > > > static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom) > > > > { > > > > return container_of(dom, struct mtk_iommu_domain, domain); > > > > @@ -322,6 +333,13 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom) > > > > { > > > > struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); > > > > > > > > + if (data->pgtable) { > > > > + dom->cfg = data->pgtable->cfg; > > > > + dom->iop = data->pgtable->iop; > > > > + dom->domain.pgsize_bitmap = data->pgtable->cfg.pgsize_bitmap; > > > > + return 0; > > > > + } > > > > + > > > > dom->cfg = (struct io_pgtable_cfg) { > > > > .quirks = IO_PGTABLE_QUIRK_ARM_NS | > > > > IO_PGTABLE_QUIRK_NO_PERMS | > > > > @@ -345,6 +363,61 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom) > > > > return 0; > > > > } > > > > > > > > +static struct mtk_iommu_pgtable *create_pgtable(struct mtk_iommu_data *data) > > > > +{ > > > > + struct mtk_iommu_pgtable *pgtable; > > > > + > > > > + pgtable = kzalloc(sizeof(*pgtable), GFP_KERNEL); > > > > + if (!pgtable) > > > > + return ERR_PTR(-ENOMEM); > > > > + > > > > + pgtable->cfg = (struct io_pgtable_cfg) { > > > > + .quirks = IO_PGTABLE_QUIRK_ARM_NS | > > > > + IO_PGTABLE_QUIRK_NO_PERMS | > > > > + IO_PGTABLE_QUIRK_TLBI_ON_MAP | > > > > + IO_PGTABLE_QUIRK_ARM_MTK_EXT, > > > > + .pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap, > > > > + .ias = 32, > > > > + .oas = 34, > > > > + .tlb = &mtk_iommu_flush_ops, > > > > + .iommu_dev = data->dev, > > > > + }; > > > > + > > > > + pgtable->iop = alloc_io_pgtable_ops(ARM_V7S, &pgtable->cfg, data); > > > > + if (!pgtable->iop) { > > > > + dev_err(data->dev, "Failed to alloc io pgtable\n"); > > > > + return ERR_PTR(-EINVAL); > > > > + } > > > > + > > > > + dev_info(data->dev, "%s create pgtable done\n", __func__); > > > > + > > > > + return pgtable; > > > > +} > > > > + > > > > +static int mtk_iommu_attach_pgtable(struct mtk_iommu_data *data, > > > > + struct device *dev) > > > > +{ > > > > + struct mtk_iommu_pgtable *pgtable = mtk_iommu_get_pgtable(); > > > > + > > > > + /* create share pgtable */ > > > > + if (!pgtable) { > > > > + pgtable = create_pgtable(data); > > > > + if (IS_ERR(pgtable)) { > > > > + dev_err(data->dev, "Failed to create pgtable\n"); > > > > + return -ENOMEM; > > > > + } > > > > + > > > > + share_pgtable = pgtable; > > > > + } > > > > + > > > > + /* binding to pgtable */ > > > > + data->pgtable = pgtable; > > > > + > > > > + dev_info(data->dev, "m4u%d attach_pgtable done!\n", data->m4u_id); > > > > + > > > > + return 0; > > > > +} > > > > + > > > > static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type) > > > > { > > > > struct mtk_iommu_domain *dom; > > > > @@ -508,10 +581,21 @@ static void mtk_iommu_remove_device(struct device *dev) > > > > static struct iommu_group *mtk_iommu_device_group(struct device *dev) > > > > { > > > > struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); > > > > + struct mtk_iommu_pgtable *pgtable; > > > > + int ret = 0; > > > > > > > > if (!data) > > > > return ERR_PTR(-ENODEV); > > > > > > > > + pgtable = data->pgtable; > > > > + if (!pgtable) { > > > > + ret = mtk_iommu_attach_pgtable(data, dev); > > > > + if (ret) { > > > > + dev_err(data->dev, "Failed to device_group\n"); > > > > + return NULL; > > > > + } > > > > + } > > > > + > > > > /* All the client devices are in the same m4u iommu-group */ > > > > if (!data->m4u_group) { > > > > data->m4u_group = iommu_group_alloc(); > > > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > > > > index 132dc765a40b..dd5f19f78b62 100644 > > > > --- a/drivers/iommu/mtk_iommu.h > > > > +++ b/drivers/iommu/mtk_iommu.h > > > > @@ -61,6 +61,7 @@ struct mtk_iommu_data { > > > > struct clk *bclk; > > > > phys_addr_t protect_base; /* protect memory base */ > > > > struct mtk_iommu_suspend_reg reg; > > > > + struct mtk_iommu_pgtable *pgtable; > > > > struct mtk_iommu_domain *m4u_dom; > > > > struct iommu_group *m4u_group; > > > > bool enable_4GB; > > > > > > > > > > > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 483A4C35DF8 for ; Tue, 25 Feb 2020 07:37:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1210421744 for ; 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bh=fE4NqegaPIl2E5K0BSQdRpTvTQnMKgleeKsxdQnFM+Y=; b=IOOAvLRKMZH7Raz7BY8B4k4HjBJ4jZmFLedrUiMACk8jM+wHVVLU3IRbX5XjIBpVUcpUUqRPYM1XOZJdC5+j3fz58BQ0VxfR0T6xOl6CNN6fxA0mcWrHw1rpOJoVOBqmwS2QDEoAr9Mz235SHSA7o54yzqrdNbjereoCkTgoITY=; X-UUID: d09967e09c97435cbb44b98a20f101ab-20200224 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1815845823; Mon, 24 Feb 2020 23:37:00 -0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 24 Feb 2020 23:27:34 -0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 25 Feb 2020 15:26:04 +0800 Received: from [10.15.20.246] (10.15.20.246) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 25 Feb 2020 15:27:08 +0800 Message-ID: <1582615551.28426.5.camel@mbjsdccf07> Subject: Re: [RESEND,PATCH 03/13] iommu/mediatek: Add mtk_iommu_pgtable structure From: chao hao To: Yong Wu Date: Tue, 25 Feb 2020 15:25:51 +0800 In-Reply-To: <1581769046.32039.27.camel@mhfsdcap03> References: <20191104115238.2394-1-chao.hao@mediatek.com> <20191104115238.2394-4-chao.hao@mediatek.com> <1576498396.28043.78.camel@mhfsdcap03> <1577785148.30177.5.camel@mbjsdccf07> <1581769046.32039.27.camel@mhfsdcap03> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200224_233705_192323_B6C17065 X-CRM114-Status: GOOD ( 39.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anan Sun =?UTF-8?Q?=28=E5=AD=99=E5=AE=89=E5=AE=89=29?= , "devicetree@vger.kernel.org" , Cui Zhang =?UTF-8?Q?=28=E5=BC=A0=E7=BF=A0=29?= , Jun Yan =?UTF-8?Q?=28=E9=A2=9C=E5=86=9B=29?= , wsd_upstream , Joerg Roedel , youlin.pei@mediatek.com, "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , Rob Herring , "linux-mediatek@lists.infradead.org" , Miles Chen =?UTF-8?Q?=28=E9=99=B3=E6=B0=91=E6=A8=BA=29?= , Matthias Brugger , "linux-arm-kernel@lists.infradead.org" , fy.yang@mediatek.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, 2020-02-15 at 20:17 +0800, Yong Wu wrote: > On Tue, 2019-12-31 at 17:39 +0800, chao hao wrote: > > On Mon, 2019-12-16 at 20:13 +0800, Yong Wu wrote: > > > On Mon, 2019-11-04 at 19:52 +0800, Chao Hao wrote: > > > > Start with this patch, we will change the SW architecture > > > > to support multiple domains. SW architecture will has a big change, > > > > so we need to modify a little bit by more than one patch. > > > > The new SW overall architecture is as below: > > > > > > > > iommu0 iommu1 > > > > | | > > > > ----------- > > > > | > > > > mtk_iommu_pgtable > > > > | > > > > ------------------------------------------ > > > > | | | > > > > mtk_iommu_domain1 mtk_iommu_domain2 mtk_iommu_domain3 > > > > | | | > > > > iommu_group1 iommu_group2 iommu_group3 > > > > | | | > > > > iommu_domain1 iommu_domain2 iommu_domain3 > > > > | | | > > > > iova region1(normal) iova region2(CCU) iova region3(VPU) > > > > > > > > For current structure, no matter how many iommus there are, > > > > they use the same page table to simplify the usage of module. > > > > In order to make the software architecture more explicit, this > > > > patch will create a global mtk_iommu_pgtable structure to describe > > > > page table and all the iommus use it. > > > > > > Thanks for the hard work of this file. Actually this patch and the later > > > ones confuse me. Why do you make this flow change? > > > for making the code "more explicit" or for adding multi-domain support > > > in 13/13. > > > > > > IMHO, the change is unnecessary. > > > a) For me, this change has no improvement. currently we use a global > > > mtk_iommu_get_m4u_data to get the M4U data. I will be very glad if you > > > could get rid of it. But in this patchset, You use a another global > > > mtk_iommu_pgtable to instead. For me. It has no improvement. > > > > Thanks for you advice! > > > > For current SW arch, all the IOMMU HW use the same page table, we can > > use a global mtk_iommu_pgtable to discribe the information of page table > > What's your plan if the 4GB iova range is not enough for us in future? > Do you plan to add a new global mtk_iommu_pgtable again? > if the 4GB iova range is not enough, we only need to modify mtk_domain_data structure: min_iova and max_iova, Compare with current SW arch: dom->domain.geometry.aperture_start = 0; dom->domain.geometry.aperture_end = DMA_BIT_MASK(32); ==> dom->domain.geometry.aperture_start = pgtable->dom_region->min_iova; dom->domain.geometry.aperture_end = pgtable->dom_region->max_iova; struct mtk_domain_data { dma_addr_t min_iova; dma_addr_t max_iova; }; > > and all the IOMMU attach it, I think that it is more clear and > > unambiguous. For beginners, it maybe more easily explicable? > > I still don't get the necessity of this change. it is only for making > code clear from your point for view, right? > > This code has been reviewed for many years, I don't know why you think > it is ambiguous. it is clear for me at lease. and I will complain that > you add a new global variable in this change. > > > > > > > b) This patchset break the original flow. device_group give you a > > > software chance for initializing, then you move pagetable allocating > > > code into it. But it isn't device_group job. > > > > > > > As is shown above diagram, mtk_iommu_pgtable includes iommu_group and > > iommu_domain,so we need to allocate mtk_iommu_pgtable and initialize it > > in device_group firstly,and then execute the original flow, it only > > changes place for creating mtk_iommu_pgtable and don't break original > > device_group flow. > > I understand you have to do this change after you adjust the structure. > I mean that it may be not proper since allocating pagetable should not > be done in device_group logically. From here, Could we get this change > looks not good?. > gentle ping ... > > > I can not decide if your flow is right. But if you only want to add > > > support multi-domain, I guess you could extend the current "m4u_group" > > > to a array "m4u_group[N]". It may be more simple. To make mt6779 > > > progress easily, I suggest you can use this way to support multi-domain > > > firstly. Then you could send this new mtk_iommu_pgtable patchset for the > > > code "more explicit" if you insist. > > Could you help try this way if it could meet your requirement? Then > let's compare which one is better. > > > BTW, your patches(including v2) cause hangup as below since > "data->m4u_dom" was uninitialized. > > > Unable to handle kernel NULL pointer dereference at virtual address > 0000000000000010 > ... > pc : mtk_iommu_tlb_flush_page_nosync+0x38/0xb8 > lr : __arm_v7s_unmap+0x174/0x598 > ... > Call trace: > mtk_iommu_tlb_flush_page_nosync+0x38/0xb8 > __arm_v7s_unmap+0x174/0x598 > arm_v7s_unmap+0x30/0x48 > mtk_iommu_unmap+0x20/0x28 > __iommu_unmap+0xa4/0xf8 > iommu_unmap+0x44/0x90 > yes, you are right. I will modify it in next version, thanks > > > > > > > The diagram is as below: > > > > > > > > mtk_iommu_data1(MM) mtk_iommu_data2(APU) > > > > | | > > > > | | > > > > ------mtk_iommu_pgtable----- > > > > > > > > We need to create global mtk_iommu_pgtable to include all the iova > > > > regions firstly and special iova regions by divided based on it, > > > > so the information of pgtable needs to be created in device_group. > > > > > > > > Signed-off-by: Chao Hao > > > > --- > > > > drivers/iommu/mtk_iommu.c | 84 +++++++++++++++++++++++++++++++++++++++ > > > > drivers/iommu/mtk_iommu.h | 1 + > > > > 2 files changed, 85 insertions(+) > > > > > > > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > > > > index f2847e661137..fcbde6b0f58d 100644 > > > > --- a/drivers/iommu/mtk_iommu.c > > > > +++ b/drivers/iommu/mtk_iommu.c > > > > @@ -123,6 +123,12 @@ struct mtk_iommu_domain { > > > > struct iommu_domain domain; > > > > }; > > > > > > > > +struct mtk_iommu_pgtable { > > > > + struct io_pgtable_cfg cfg; > > > > + struct io_pgtable_ops *iop; > > > > +}; > > > > + > > > > +static struct mtk_iommu_pgtable *share_pgtable; > > > > static const struct iommu_ops mtk_iommu_ops; > > > > > > > > /* > > > > @@ -170,6 +176,11 @@ static struct mtk_iommu_data *mtk_iommu_get_m4u_data(void) > > > > return NULL; > > > > } > > > > > > > > +static struct mtk_iommu_pgtable *mtk_iommu_get_pgtable(void) > > > > +{ > > > > + return share_pgtable; > > > > +} > > > > + > > > > static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom) > > > > { > > > > return container_of(dom, struct mtk_iommu_domain, domain); > > > > @@ -322,6 +333,13 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom) > > > > { > > > > struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); > > > > > > > > + if (data->pgtable) { > > > > + dom->cfg = data->pgtable->cfg; > > > > + dom->iop = data->pgtable->iop; > > > > + dom->domain.pgsize_bitmap = data->pgtable->cfg.pgsize_bitmap; > > > > + return 0; > > > > + } > > > > + > > > > dom->cfg = (struct io_pgtable_cfg) { > > > > .quirks = IO_PGTABLE_QUIRK_ARM_NS | > > > > IO_PGTABLE_QUIRK_NO_PERMS | > > > > @@ -345,6 +363,61 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom) > > > > return 0; > > > > } > > > > > > > > +static struct mtk_iommu_pgtable *create_pgtable(struct mtk_iommu_data *data) > > > > +{ > > > > + struct mtk_iommu_pgtable *pgtable; > > > > + > > > > + pgtable = kzalloc(sizeof(*pgtable), GFP_KERNEL); > > > > + if (!pgtable) > > > > + return ERR_PTR(-ENOMEM); > > > > + > > > > + pgtable->cfg = (struct io_pgtable_cfg) { > > > > + .quirks = IO_PGTABLE_QUIRK_ARM_NS | > > > > + IO_PGTABLE_QUIRK_NO_PERMS | > > > > + IO_PGTABLE_QUIRK_TLBI_ON_MAP | > > > > + IO_PGTABLE_QUIRK_ARM_MTK_EXT, > > > > + .pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap, > > > > + .ias = 32, > > > > + .oas = 34, > > > > + .tlb = &mtk_iommu_flush_ops, > > > > + .iommu_dev = data->dev, > > > > + }; > > > > + > > > > + pgtable->iop = alloc_io_pgtable_ops(ARM_V7S, &pgtable->cfg, data); > > > > + if (!pgtable->iop) { > > > > + dev_err(data->dev, "Failed to alloc io pgtable\n"); > > > > + return ERR_PTR(-EINVAL); > > > > + } > > > > + > > > > + dev_info(data->dev, "%s create pgtable done\n", __func__); > > > > + > > > > + return pgtable; > > > > +} > > > > + > > > > +static int mtk_iommu_attach_pgtable(struct mtk_iommu_data *data, > > > > + struct device *dev) > > > > +{ > > > > + struct mtk_iommu_pgtable *pgtable = mtk_iommu_get_pgtable(); > > > > + > > > > + /* create share pgtable */ > > > > + if (!pgtable) { > > > > + pgtable = create_pgtable(data); > > > > + if (IS_ERR(pgtable)) { > > > > + dev_err(data->dev, "Failed to create pgtable\n"); > > > > + return -ENOMEM; > > > > + } > > > > + > > > > + share_pgtable = pgtable; > > > > + } > > > > + > > > > + /* binding to pgtable */ > > > > + data->pgtable = pgtable; > > > > + > > > > + dev_info(data->dev, "m4u%d attach_pgtable done!\n", data->m4u_id); > > > > + > > > > + return 0; > > > > +} > > > > + > > > > static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type) > > > > { > > > > struct mtk_iommu_domain *dom; > > > > @@ -508,10 +581,21 @@ static void mtk_iommu_remove_device(struct device *dev) > > > > static struct iommu_group *mtk_iommu_device_group(struct device *dev) > > > > { > > > > struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); > > > > + struct mtk_iommu_pgtable *pgtable; > > > > + int ret = 0; > > > > > > > > if (!data) > > > > return ERR_PTR(-ENODEV); > > > > > > > > + pgtable = data->pgtable; > > > > + if (!pgtable) { > > > > + ret = mtk_iommu_attach_pgtable(data, dev); > > > > + if (ret) { > > > > + dev_err(data->dev, "Failed to device_group\n"); > > > > + return NULL; > > > > + } > > > > + } > > > > + > > > > /* All the client devices are in the same m4u iommu-group */ > > > > if (!data->m4u_group) { > > > > data->m4u_group = iommu_group_alloc(); > > > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > > > > index 132dc765a40b..dd5f19f78b62 100644 > > > > --- a/drivers/iommu/mtk_iommu.h > > > > +++ b/drivers/iommu/mtk_iommu.h > > > > @@ -61,6 +61,7 @@ struct mtk_iommu_data { > > > > struct clk *bclk; > > > > phys_addr_t protect_base; /* protect memory base */ > > > > struct mtk_iommu_suspend_reg reg; > > > > + struct mtk_iommu_pgtable *pgtable; > > > > struct mtk_iommu_domain *m4u_dom; > > > > struct iommu_group *m4u_group; > > > > bool enable_4GB; > > > > > > > > > > > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, 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mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 25 Feb 2020 15:27:08 +0800 Message-ID: <1582615551.28426.5.camel@mbjsdccf07> Subject: Re: [RESEND,PATCH 03/13] iommu/mediatek: Add mtk_iommu_pgtable structure From: chao hao To: Yong Wu CC: Joerg Roedel , Rob Herring , Matthias Brugger , "iommu@lists.linux-foundation.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-mediatek@lists.infradead.org" , wsd_upstream , Jun Yan =?UTF-8?Q?=28=E9=A2=9C=E5=86=9B=29?= , Cui Zhang =?UTF-8?Q?=28=E5=BC=A0=E7=BF=A0=29?= , , Anan Sun =?UTF-8?Q?=28=E5=AD=99=E5=AE=89=E5=AE=89=29?= , Miles Chen =?UTF-8?Q?=28=E9=99=B3=E6=B0=91=E6=A8=BA=29?= , Date: Tue, 25 Feb 2020 15:25:51 +0800 In-Reply-To: <1581769046.32039.27.camel@mhfsdcap03> References: <20191104115238.2394-1-chao.hao@mediatek.com> <20191104115238.2394-4-chao.hao@mediatek.com> <1576498396.28043.78.camel@mhfsdcap03> <1577785148.30177.5.camel@mbjsdccf07> <1581769046.32039.27.camel@mhfsdcap03> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org T24gU2F0LCAyMDIwLTAyLTE1IGF0IDIwOjE3ICswODAwLCBZb25nIFd1IHdyb3RlOg0KPiBPbiBU dWUsIDIwMTktMTItMzEgYXQgMTc6MzkgKzA4MDAsIGNoYW8gaGFvIHdyb3RlOg0KPiA+IE9uIE1v biwgMjAxOS0xMi0xNiBhdCAyMDoxMyArMDgwMCwgWW9uZyBXdSB3cm90ZToNCj4gPiA+IE9uIE1v biwgMjAxOS0xMS0wNCBhdCAxOTo1MiArMDgwMCwgQ2hhbyBIYW8gd3JvdGU6DQo+ID4gPiA+IFN0 YXJ0IHdpdGggdGhpcyBwYXRjaCwgd2Ugd2lsbCBjaGFuZ2UgdGhlIFNXIGFyY2hpdGVjdHVyZQ0K PiA+ID4gPiB0byBzdXBwb3J0IG11bHRpcGxlIGRvbWFpbnMuIFNXIGFyY2hpdGVjdHVyZSB3aWxs IGhhcyBhIGJpZyBjaGFuZ2UsDQo+ID4gPiA+IHNvIHdlIG5lZWQgdG8gbW9kaWZ5IGEgbGl0dGxl IGJpdCBieSBtb3JlIHRoYW4gb25lIHBhdGNoLg0KPiA+ID4gPiBUaGUgbmV3IFNXIG92ZXJhbGwg YXJjaGl0ZWN0dXJlIGlzIGFzIGJlbG93Og0KPiA+ID4gPiANCj4gPiA+ID4gCQkJCWlvbW11MCAg IGlvbW11MQ0KPiA+ID4gPiAJCQkJICB8CSAgICB8DQo+ID4gPiA+IAkJCQkgIC0tLS0tLS0tLS0t DQo+ID4gPiA+IAkJCQkJfA0KPiA+ID4gPiAJCQkJbXRrX2lvbW11X3BndGFibGUNCj4gPiA+ID4g CQkJCQl8DQo+ID4gPiA+IAkJCS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLQ0KPiA+ID4gPiAJCQl8CQkgICAgIHwJCQkgfA0KPiA+ID4gPiAJCW10a19pb21tdV9kb21h aW4xICAgbXRrX2lvbW11X2RvbWFpbjIgIG10a19pb21tdV9kb21haW4zDQo+ID4gPiA+IAkJCXwg ICAgICAgICAgICAgICAgICAgIHwgICAgICAgICAgICAgICAgICAgfA0KPiA+ID4gPiAJCWlvbW11 X2dyb3VwMSAgICAgICAgIGlvbW11X2dyb3VwMiAgICAgICAgICAgaW9tbXVfZ3JvdXAzDQo+ID4g PiA+IAkJCXwgICAgICAgICAgICAgICAgICAgIHwgICAgICAgICAgICAgICAgICAgfA0KPiA+ID4g PiAJCWlvbW11X2RvbWFpbjEgICAgICAgaW9tbXVfZG9tYWluMgkgICAgaW9tbXVfZG9tYWluMw0K PiA+ID4gPiAJCQl8ICAgICAgICAgICAgICAgICAgICB8ICAgICAgICAgICAgICAgICAgIHwNCj4g PiA+ID4gCQlpb3ZhIHJlZ2lvbjEobm9ybWFsKSAgaW92YSByZWdpb24yKENDVSkgICAgaW92YSBy ZWdpb24zKFZQVSkNCj4gPiA+ID4gDQo+ID4gPiA+IEZvciBjdXJyZW50IHN0cnVjdHVyZSwgbm8g bWF0dGVyIGhvdyBtYW55IGlvbW11cyB0aGVyZSBhcmUsDQo+ID4gPiA+IHRoZXkgdXNlIHRoZSBz YW1lIHBhZ2UgdGFibGUgdG8gc2ltcGxpZnkgdGhlIHVzYWdlIG9mIG1vZHVsZS4NCj4gPiA+ID4g SW4gb3JkZXIgdG8gbWFrZSB0aGUgc29mdHdhcmUgYXJjaGl0ZWN0dXJlIG1vcmUgZXhwbGljaXQs IHRoaXMNCj4gPiA+ID4gcGF0Y2ggd2lsbCBjcmVhdGUgYSBnbG9iYWwgbXRrX2lvbW11X3BndGFi bGUgc3RydWN0dXJlIHRvIGRlc2NyaWJlDQo+ID4gPiA+IHBhZ2UgdGFibGUgYW5kIGFsbCB0aGUg aW9tbXVzIHVzZSBpdC4NCj4gPiA+IA0KPiA+ID4gVGhhbmtzIGZvciB0aGUgaGFyZCB3b3JrIG9m IHRoaXMgZmlsZS4gQWN0dWFsbHkgdGhpcyBwYXRjaCBhbmQgdGhlIGxhdGVyDQo+ID4gPiBvbmVz IGNvbmZ1c2UgbWUuIFdoeSBkbyB5b3UgbWFrZSB0aGlzIGZsb3cgY2hhbmdlPyANCj4gPiA+IGZv ciBtYWtpbmcgdGhlIGNvZGUgIm1vcmUgZXhwbGljaXQiIG9yIGZvciBhZGRpbmcgbXVsdGktZG9t YWluIHN1cHBvcnQNCj4gPiA+IGluIDEzLzEzLg0KPiA+ID4gDQo+ID4gPiBJTUhPLCB0aGUgY2hh bmdlIGlzIHVubmVjZXNzYXJ5Lg0KPiA+ID4gYSkgRm9yIG1lLCB0aGlzIGNoYW5nZSBoYXMgbm8g aW1wcm92ZW1lbnQuIGN1cnJlbnRseSB3ZSB1c2UgYSBnbG9iYWwNCj4gPiA+IG10a19pb21tdV9n ZXRfbTR1X2RhdGEgdG8gZ2V0IHRoZSBNNFUgZGF0YS4gSSB3aWxsIGJlIHZlcnkgZ2xhZCBpZiB5 b3UNCj4gPiA+IGNvdWxkIGdldCByaWQgb2YgaXQuIEJ1dCBpbiB0aGlzIHBhdGNoc2V0LCBZb3Ug dXNlIGEgYW5vdGhlciBnbG9iYWwNCj4gPiA+IG10a19pb21tdV9wZ3RhYmxlIHRvIGluc3RlYWQu IEZvciBtZS4gSXQgaGFzIG5vIGltcHJvdmVtZW50Lg0KPiA+IA0KPiA+IFRoYW5rcyBmb3IgeW91 IGFkdmljZSENCj4gPiANCj4gPiBGb3IgY3VycmVudCBTVyBhcmNoLCBhbGwgdGhlIElPTU1VIEhX IHVzZSB0aGUgc2FtZSBwYWdlIHRhYmxlLCB3ZSBjYW4NCj4gPiB1c2UgYSBnbG9iYWwgbXRrX2lv bW11X3BndGFibGUgdG8gZGlzY3JpYmUgdGhlIGluZm9ybWF0aW9uIG9mIHBhZ2UgdGFibGUNCj4g DQo+IFdoYXQncyB5b3VyIHBsYW4gaWYgdGhlIDRHQiBpb3ZhIHJhbmdlIGlzIG5vdCBlbm91Z2gg Zm9yIHVzIGluIGZ1dHVyZT8NCj4gRG8geW91IHBsYW4gdG8gYWRkIGEgbmV3IGdsb2JhbCBtdGtf aW9tbXVfcGd0YWJsZSBhZ2Fpbj8NCj4gDQppZiB0aGUgNEdCIGlvdmEgcmFuZ2UgaXMgbm90IGVu b3VnaCwgd2Ugb25seSBuZWVkIHRvIG1vZGlmeQ0KbXRrX2RvbWFpbl9kYXRhIHN0cnVjdHVyZTog bWluX2lvdmEgYW5kIG1heF9pb3ZhLCBDb21wYXJlIHdpdGggY3VycmVudA0KU1cgYXJjaDoNCiBk b20tPmRvbWFpbi5nZW9tZXRyeS5hcGVydHVyZV9zdGFydCA9IDA7DQogZG9tLT5kb21haW4uZ2Vv bWV0cnkuYXBlcnR1cmVfZW5kID0gRE1BX0JJVF9NQVNLKDMyKTsNCiA9PT4NCiBkb20tPmRvbWFp bi5nZW9tZXRyeS5hcGVydHVyZV9zdGFydCA9IHBndGFibGUtPmRvbV9yZWdpb24tPm1pbl9pb3Zh Ow0KIGRvbS0+ZG9tYWluLmdlb21ldHJ5LmFwZXJ0dXJlX2VuZCA9IHBndGFibGUtPmRvbV9yZWdp b24tPm1heF9pb3ZhOw0KIA0KIHN0cnVjdCBtdGtfZG9tYWluX2RhdGEgew0KICAgICAgICAgIGRt YV9hZGRyX3QgICAgICBtaW5faW92YTsNCiAgICAgICAgICBkbWFfYWRkcl90ICAgICAgbWF4X2lv dmE7DQogIH07DQoNCj4gPiBhbmQgYWxsIHRoZSBJT01NVSBhdHRhY2ggaXQsIEkgdGhpbmsgdGhh dCBpdCBpcyBtb3JlIGNsZWFyIGFuZA0KPiA+IHVuYW1iaWd1b3VzLiBGb3IgYmVnaW5uZXJzLCBp dCBtYXliZSBtb3JlIGVhc2lseSBleHBsaWNhYmxlPyANCj4gDQo+IEkgc3RpbGwgZG9uJ3QgZ2V0 IHRoZSBuZWNlc3NpdHkgb2YgdGhpcyBjaGFuZ2UuIGl0IGlzIG9ubHkgZm9yIG1ha2luZw0KPiBj b2RlIGNsZWFyIGZyb20geW91ciBwb2ludCBmb3IgdmlldywgcmlnaHQ/DQo+IA0KPiBUaGlzIGNv ZGUgaGFzIGJlZW4gcmV2aWV3ZWQgZm9yIG1hbnkgeWVhcnMsIEkgZG9uJ3Qga25vdyB3aHkgeW91 IHRoaW5rDQo+IGl0IGlzIGFtYmlndW91cy4gaXQgaXMgY2xlYXIgZm9yIG1lIGF0IGxlYXNlLiBh bmQgSSB3aWxsIGNvbXBsYWluIHRoYXQNCj4geW91IGFkZCBhIG5ldyBnbG9iYWwgdmFyaWFibGUg aW4gdGhpcyBjaGFuZ2UuDQo+IA0KPiA+ID4gDQo+ID4gPiBiKSBUaGlzIHBhdGNoc2V0IGJyZWFr IHRoZSBvcmlnaW5hbCBmbG93LiBkZXZpY2VfZ3JvdXAgZ2l2ZSB5b3UgYQ0KPiA+ID4gc29mdHdh cmUgY2hhbmNlIGZvciBpbml0aWFsaXppbmcsIHRoZW4geW91IG1vdmUgcGFnZXRhYmxlIGFsbG9j YXRpbmcNCj4gPiA+IGNvZGUgaW50byBpdC4gQnV0IGl0IGlzbid0IGRldmljZV9ncm91cCBqb2Iu DQo+ID4gPiANCj4gPiANCj4gPiBBcyBpcyBzaG93biBhYm92ZSBkaWFncmFtLCBtdGtfaW9tbXVf cGd0YWJsZSBpbmNsdWRlcyBpb21tdV9ncm91cCBhbmQNCj4gPiBpb21tdV9kb21haW4sc28gd2Ug bmVlZCB0byBhbGxvY2F0ZSBtdGtfaW9tbXVfcGd0YWJsZSBhbmQgaW5pdGlhbGl6ZSBpdA0KPiA+ IGluIGRldmljZV9ncm91cCBmaXJzdGx5LGFuZCB0aGVuIGV4ZWN1dGUgdGhlIG9yaWdpbmFsIGZs b3csIGl0IG9ubHkNCj4gPiBjaGFuZ2VzIHBsYWNlIGZvciBjcmVhdGluZyBtdGtfaW9tbXVfcGd0 YWJsZSBhbmQgZG9uJ3QgYnJlYWsgb3JpZ2luYWwNCj4gPiBkZXZpY2VfZ3JvdXAgZmxvdy4NCj4g DQo+IEkgdW5kZXJzdGFuZCB5b3UgaGF2ZSB0byBkbyB0aGlzIGNoYW5nZSBhZnRlciB5b3UgYWRq dXN0IHRoZSBzdHJ1Y3R1cmUuDQo+IEkgbWVhbiB0aGF0IGl0IG1heSBiZSBub3QgcHJvcGVyIHNp bmNlIGFsbG9jYXRpbmcgcGFnZXRhYmxlIHNob3VsZCBub3QNCj4gYmUgZG9uZSBpbiBkZXZpY2Vf Z3JvdXAgbG9naWNhbGx5LiBGcm9tIGhlcmUsIENvdWxkIHdlIGdldCB0aGlzIGNoYW5nZQ0KPiBs b29rcyBub3QgZ29vZD8uDQo+IA0KIGdlbnRsZSBwaW5nIC4uLg0KDQo+ID4gPiBJIGNhbiBub3Qg ZGVjaWRlIGlmIHlvdXIgZmxvdyBpcyByaWdodC4gQnV0IGlmIHlvdSBvbmx5IHdhbnQgdG8gYWRk DQo+ID4gPiBzdXBwb3J0IG11bHRpLWRvbWFpbiwgSSBndWVzcyB5b3UgY291bGQgZXh0ZW5kIHRo ZSBjdXJyZW50ICJtNHVfZ3JvdXAiDQo+ID4gPiB0byBhIGFycmF5ICJtNHVfZ3JvdXBbTl0iLiBJ dCBtYXkgYmUgbW9yZSBzaW1wbGUuIFRvIG1ha2UgbXQ2Nzc5DQo+ID4gPiBwcm9ncmVzcyBlYXNp bHksIEkgc3VnZ2VzdCB5b3UgY2FuIHVzZSB0aGlzIHdheSB0byBzdXBwb3J0IG11bHRpLWRvbWFp bg0KPiA+ID4gZmlyc3RseS4gVGhlbiB5b3UgY291bGQgc2VuZCB0aGlzIG5ldyBtdGtfaW9tbXVf cGd0YWJsZSBwYXRjaHNldCBmb3IgdGhlDQo+ID4gPiBjb2RlICJtb3JlIGV4cGxpY2l0IiBpZiB5 b3UgaW5zaXN0Lg0KPiANCj4gQ291bGQgeW91IGhlbHAgdHJ5IHRoaXMgd2F5IGlmIGl0IGNvdWxk IG1lZXQgeW91ciByZXF1aXJlbWVudD8gVGhlbg0KPiBsZXQncyBjb21wYXJlIHdoaWNoIG9uZSBp cyBiZXR0ZXIuDQo+IA0KPiANCj4gQlRXLCB5b3VyIHBhdGNoZXMoaW5jbHVkaW5nIHYyKSBjYXVz ZSBoYW5ndXAgYXMgYmVsb3cgc2luY2UNCj4gImRhdGEtPm00dV9kb20iIHdhcyB1bmluaXRpYWxp emVkLg0KPiANCj4gDQo+IFVuYWJsZSB0byBoYW5kbGUga2VybmVsIE5VTEwgcG9pbnRlciBkZXJl ZmVyZW5jZSBhdCB2aXJ0dWFsIGFkZHJlc3MNCj4gMDAwMDAwMDAwMDAwMDAxMA0KPiAuLi4NCj4g cGMgOiBtdGtfaW9tbXVfdGxiX2ZsdXNoX3BhZ2Vfbm9zeW5jKzB4MzgvMHhiOA0KPiBsciA6IF9f YXJtX3Y3c191bm1hcCsweDE3NC8weDU5OA0KPiAuLi4NCj4gQ2FsbCB0cmFjZToNCj4gIG10a19p b21tdV90bGJfZmx1c2hfcGFnZV9ub3N5bmMrMHgzOC8weGI4DQo+ICBfX2FybV92N3NfdW5tYXAr MHgxNzQvMHg1OTgNCj4gIGFybV92N3NfdW5tYXArMHgzMC8weDQ4DQo+ICBtdGtfaW9tbXVfdW5t YXArMHgyMC8weDI4DQo+ICBfX2lvbW11X3VubWFwKzB4YTQvMHhmOA0KPiAgaW9tbXVfdW5tYXAr MHg0NC8weDkwDQo+IA0KeWVzLCB5b3UgYXJlIHJpZ2h0LiBJIHdpbGwgbW9kaWZ5IGl0IGluIG5l eHQgdmVyc2lvbiwgdGhhbmtzDQoNCg0KPiA+ID4gDQo+ID4gPiA+IFRoZSBkaWFncmFtIGlzIGFz IGJlbG93Og0KPiA+ID4gPiANCj4gPiA+ID4gCW10a19pb21tdV9kYXRhMShNTSkgICAgICAgbXRr X2lvbW11X2RhdGEyKEFQVSkNCj4gPiA+ID4gCQl8CQkJICAgfA0KPiA+ID4gPiAJCXwJCQkgICB8 DQo+ID4gPiA+IAkJLS0tLS0tbXRrX2lvbW11X3BndGFibGUtLS0tLQ0KPiA+ID4gPiANCj4gPiA+ ID4gV2UgbmVlZCB0byBjcmVhdGUgZ2xvYmFsIG10a19pb21tdV9wZ3RhYmxlIHRvIGluY2x1ZGUg YWxsIHRoZSBpb3ZhDQo+ID4gPiA+IHJlZ2lvbnMgZmlyc3RseSBhbmQgc3BlY2lhbCBpb3ZhIHJl Z2lvbnMgYnkgZGl2aWRlZCBiYXNlZCBvbiBpdCwNCj4gPiA+ID4gc28gdGhlIGluZm9ybWF0aW9u IG9mIHBndGFibGUgbmVlZHMgdG8gYmUgY3JlYXRlZCBpbiBkZXZpY2VfZ3JvdXAuDQo+ID4gPiA+ IA0KPiA+ID4gPiBTaWduZWQtb2ZmLWJ5OiBDaGFvIEhhbyA8Y2hhby5oYW9AbWVkaWF0ZWsuY29t Pg0KPiA+ID4gPiAtLS0NCj4gPiA+ID4gIGRyaXZlcnMvaW9tbXUvbXRrX2lvbW11LmMgfCA4NCAr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysNCj4gPiA+ID4gIGRyaXZlcnMv aW9tbXUvbXRrX2lvbW11LmggfCAgMSArDQo+ID4gPiA+ICAyIGZpbGVzIGNoYW5nZWQsIDg1IGlu c2VydGlvbnMoKykNCj4gPiA+ID4gDQo+ID4gPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2lvbW11 L210a19pb21tdS5jIGIvZHJpdmVycy9pb21tdS9tdGtfaW9tbXUuYw0KPiA+ID4gPiBpbmRleCBm Mjg0N2U2NjExMzcuLmZjYmRlNmIwZjU4ZCAxMDA2NDQNCj4gPiA+ID4gLS0tIGEvZHJpdmVycy9p b21tdS9tdGtfaW9tbXUuYw0KPiA+ID4gPiArKysgYi9kcml2ZXJzL2lvbW11L210a19pb21tdS5j DQo+ID4gPiA+IEBAIC0xMjMsNiArMTIzLDEyIEBAIHN0cnVjdCBtdGtfaW9tbXVfZG9tYWluIHsN Cj4gPiA+ID4gIAlzdHJ1Y3QgaW9tbXVfZG9tYWluCQlkb21haW47DQo+ID4gPiA+ICB9Ow0KPiA+ ID4gPiAgDQo+ID4gPiA+ICtzdHJ1Y3QgbXRrX2lvbW11X3BndGFibGUgew0KPiA+ID4gPiArCXN0 cnVjdCBpb19wZ3RhYmxlX2NmZwljZmc7DQo+ID4gPiA+ICsJc3RydWN0IGlvX3BndGFibGVfb3Bz CSppb3A7DQo+ID4gPiA+ICt9Ow0KPiA+ID4gPiArDQo+ID4gPiA+ICtzdGF0aWMgc3RydWN0IG10 a19pb21tdV9wZ3RhYmxlICpzaGFyZV9wZ3RhYmxlOw0KPiA+ID4gPiAgc3RhdGljIGNvbnN0IHN0 cnVjdCBpb21tdV9vcHMgbXRrX2lvbW11X29wczsNCj4gPiA+ID4gIA0KPiA+ID4gPiAgLyoNCj4g PiA+ID4gQEAgLTE3MCw2ICsxNzYsMTEgQEAgc3RhdGljIHN0cnVjdCBtdGtfaW9tbXVfZGF0YSAq bXRrX2lvbW11X2dldF9tNHVfZGF0YSh2b2lkKQ0KPiA+ID4gPiAgCXJldHVybiBOVUxMOw0KPiA+ ID4gPiAgfQ0KPiA+ID4gPiAgDQo+ID4gPiA+ICtzdGF0aWMgc3RydWN0IG10a19pb21tdV9wZ3Rh YmxlICptdGtfaW9tbXVfZ2V0X3BndGFibGUodm9pZCkNCj4gPiA+ID4gK3sNCj4gPiA+ID4gKwly ZXR1cm4gc2hhcmVfcGd0YWJsZTsNCj4gPiA+ID4gK30NCj4gPiA+ID4gKw0KPiA+ID4gPiAgc3Rh dGljIHN0cnVjdCBtdGtfaW9tbXVfZG9tYWluICp0b19tdGtfZG9tYWluKHN0cnVjdCBpb21tdV9k b21haW4gKmRvbSkNCj4gPiA+ID4gIHsNCj4gPiA+ID4gIAlyZXR1cm4gY29udGFpbmVyX29mKGRv bSwgc3RydWN0IG10a19pb21tdV9kb21haW4sIGRvbWFpbik7DQo+ID4gPiA+IEBAIC0zMjIsNiAr MzMzLDEzIEBAIHN0YXRpYyBpbnQgbXRrX2lvbW11X2RvbWFpbl9maW5hbGlzZShzdHJ1Y3QgbXRr X2lvbW11X2RvbWFpbiAqZG9tKQ0KPiA+ID4gPiAgew0KPiA+ID4gPiAgCXN0cnVjdCBtdGtfaW9t bXVfZGF0YSAqZGF0YSA9IG10a19pb21tdV9nZXRfbTR1X2RhdGEoKTsNCj4gPiA+ID4gIA0KPiA+ ID4gPiArCWlmIChkYXRhLT5wZ3RhYmxlKSB7DQo+ID4gPiA+ICsJCWRvbS0+Y2ZnID0gZGF0YS0+ cGd0YWJsZS0+Y2ZnOw0KPiA+ID4gPiArCQlkb20tPmlvcCA9IGRhdGEtPnBndGFibGUtPmlvcDsN Cj4gPiA+ID4gKwkJZG9tLT5kb21haW4ucGdzaXplX2JpdG1hcCA9IGRhdGEtPnBndGFibGUtPmNm Zy5wZ3NpemVfYml0bWFwOw0KPiA+ID4gPiArCQlyZXR1cm4gMDsNCj4gPiA+ID4gKwl9DQo+ID4g PiA+ICsNCj4gPiA+ID4gIAlkb20tPmNmZyA9IChzdHJ1Y3QgaW9fcGd0YWJsZV9jZmcpIHsNCj4g PiA+ID4gIAkJLnF1aXJrcyA9IElPX1BHVEFCTEVfUVVJUktfQVJNX05TIHwNCj4gPiA+ID4gIAkJ CUlPX1BHVEFCTEVfUVVJUktfTk9fUEVSTVMgfA0KPiA+ID4gPiBAQCAtMzQ1LDYgKzM2Myw2MSBA QCBzdGF0aWMgaW50IG10a19pb21tdV9kb21haW5fZmluYWxpc2Uoc3RydWN0IG10a19pb21tdV9k b21haW4gKmRvbSkNCj4gPiA+ID4gIAlyZXR1cm4gMDsNCj4gPiA+ID4gIH0NCj4gPiA+ID4gIA0K PiA+ID4gPiArc3RhdGljIHN0cnVjdCBtdGtfaW9tbXVfcGd0YWJsZSAqY3JlYXRlX3BndGFibGUo c3RydWN0IG10a19pb21tdV9kYXRhICpkYXRhKQ0KPiA+ID4gPiArew0KPiA+ID4gPiArCXN0cnVj dCBtdGtfaW9tbXVfcGd0YWJsZSAqcGd0YWJsZTsNCj4gPiA+ID4gKw0KPiA+ID4gPiArCXBndGFi bGUgPSBremFsbG9jKHNpemVvZigqcGd0YWJsZSksIEdGUF9LRVJORUwpOw0KPiA+ID4gPiArCWlm ICghcGd0YWJsZSkNCj4gPiA+ID4gKwkJcmV0dXJuIEVSUl9QVFIoLUVOT01FTSk7DQo+ID4gPiA+ ICsNCj4gPiA+ID4gKwlwZ3RhYmxlLT5jZmcgPSAoc3RydWN0IGlvX3BndGFibGVfY2ZnKSB7DQo+ ID4gPiA+ICsJCS5xdWlya3MgPSBJT19QR1RBQkxFX1FVSVJLX0FSTV9OUyB8DQo+ID4gPiA+ICsJ CQlJT19QR1RBQkxFX1FVSVJLX05PX1BFUk1TIHwNCj4gPiA+ID4gKwkJCUlPX1BHVEFCTEVfUVVJ UktfVExCSV9PTl9NQVAgfA0KPiA+ID4gPiArCQkJSU9fUEdUQUJMRV9RVUlSS19BUk1fTVRLX0VY VCwNCj4gPiA+ID4gKwkJLnBnc2l6ZV9iaXRtYXAgPSBtdGtfaW9tbXVfb3BzLnBnc2l6ZV9iaXRt YXAsDQo+ID4gPiA+ICsJCS5pYXMgPSAzMiwNCj4gPiA+ID4gKwkJLm9hcyA9IDM0LA0KPiA+ID4g PiArCQkudGxiID0gJm10a19pb21tdV9mbHVzaF9vcHMsDQo+ID4gPiA+ICsJCS5pb21tdV9kZXYg PSBkYXRhLT5kZXYsDQo+ID4gPiA+ICsJfTsNCj4gPiA+ID4gKw0KPiA+ID4gPiArCXBndGFibGUt PmlvcCA9IGFsbG9jX2lvX3BndGFibGVfb3BzKEFSTV9WN1MsICZwZ3RhYmxlLT5jZmcsIGRhdGEp Ow0KPiA+ID4gPiArCWlmICghcGd0YWJsZS0+aW9wKSB7DQo+ID4gPiA+ICsJCWRldl9lcnIoZGF0 YS0+ZGV2LCAiRmFpbGVkIHRvIGFsbG9jIGlvIHBndGFibGVcbiIpOw0KPiA+ID4gPiArCQlyZXR1 cm4gRVJSX1BUUigtRUlOVkFMKTsNCj4gPiA+ID4gKwl9DQo+ID4gPiA+ICsNCj4gPiA+ID4gKwlk ZXZfaW5mbyhkYXRhLT5kZXYsICIlcyBjcmVhdGUgcGd0YWJsZSBkb25lXG4iLCBfX2Z1bmNfXyk7 DQo+ID4gPiA+ICsNCj4gPiA+ID4gKwlyZXR1cm4gcGd0YWJsZTsNCj4gPiA+ID4gK30NCj4gPiA+ ID4gKw0KPiA+ID4gPiArc3RhdGljIGludCBtdGtfaW9tbXVfYXR0YWNoX3BndGFibGUoc3RydWN0 IG10a19pb21tdV9kYXRhICpkYXRhLA0KPiA+ID4gPiArCQkJCSAgICBzdHJ1Y3QgZGV2aWNlICpk ZXYpDQo+ID4gPiA+ICt7DQo+ID4gPiA+ICsJc3RydWN0IG10a19pb21tdV9wZ3RhYmxlICpwZ3Rh YmxlID0gbXRrX2lvbW11X2dldF9wZ3RhYmxlKCk7DQo+ID4gPiA+ICsNCj4gPiA+ID4gKwkvKiBj cmVhdGUgc2hhcmUgcGd0YWJsZSAqLw0KPiA+ID4gPiArCWlmICghcGd0YWJsZSkgew0KPiA+ID4g PiArCQlwZ3RhYmxlID0gY3JlYXRlX3BndGFibGUoZGF0YSk7DQo+ID4gPiA+ICsJCWlmIChJU19F UlIocGd0YWJsZSkpIHsNCj4gPiA+ID4gKwkJCWRldl9lcnIoZGF0YS0+ZGV2LCAiRmFpbGVkIHRv IGNyZWF0ZSBwZ3RhYmxlXG4iKTsNCj4gPiA+ID4gKwkJCXJldHVybiAtRU5PTUVNOw0KPiA+ID4g PiArCQl9DQo+ID4gPiA+ICsNCj4gPiA+ID4gKwkJc2hhcmVfcGd0YWJsZSA9IHBndGFibGU7DQo+ ID4gPiA+ICsJfQ0KPiA+ID4gPiArDQo+ID4gPiA+ICsJLyogYmluZGluZyB0byBwZ3RhYmxlICov DQo+ID4gPiA+ICsJZGF0YS0+cGd0YWJsZSA9IHBndGFibGU7DQo+ID4gPiA+ICsNCj4gPiA+ID4g KwlkZXZfaW5mbyhkYXRhLT5kZXYsICJtNHUlZCBhdHRhY2hfcGd0YWJsZSBkb25lIVxuIiwgZGF0 YS0+bTR1X2lkKTsNCj4gPiA+ID4gKw0KPiA+ID4gPiArCXJldHVybiAwOw0KPiA+ID4gPiArfQ0K PiA+ID4gPiArDQo+ID4gPiA+ICBzdGF0aWMgc3RydWN0IGlvbW11X2RvbWFpbiAqbXRrX2lvbW11 X2RvbWFpbl9hbGxvYyh1bnNpZ25lZCB0eXBlKQ0KPiA+ID4gPiAgew0KPiA+ID4gPiAgCXN0cnVj dCBtdGtfaW9tbXVfZG9tYWluICpkb207DQo+ID4gPiA+IEBAIC01MDgsMTAgKzU4MSwyMSBAQCBz dGF0aWMgdm9pZCBtdGtfaW9tbXVfcmVtb3ZlX2RldmljZShzdHJ1Y3QgZGV2aWNlICpkZXYpDQo+ ID4gPiA+ICBzdGF0aWMgc3RydWN0IGlvbW11X2dyb3VwICptdGtfaW9tbXVfZGV2aWNlX2dyb3Vw KHN0cnVjdCBkZXZpY2UgKmRldikNCj4gPiA+ID4gIHsNCj4gPiA+ID4gIAlzdHJ1Y3QgbXRrX2lv bW11X2RhdGEgKmRhdGEgPSBtdGtfaW9tbXVfZ2V0X200dV9kYXRhKCk7DQo+ID4gPiA+ICsJc3Ry dWN0IG10a19pb21tdV9wZ3RhYmxlICpwZ3RhYmxlOw0KPiA+ID4gPiArCWludCByZXQgPSAwOw0K PiA+ID4gPiAgDQo+ID4gPiA+ICAJaWYgKCFkYXRhKQ0KPiA+ID4gPiAgCQlyZXR1cm4gRVJSX1BU UigtRU5PREVWKTsNCj4gPiA+ID4gIA0KPiA+ID4gPiArCXBndGFibGUgPSBkYXRhLT5wZ3RhYmxl Ow0KPiA+ID4gPiArCWlmICghcGd0YWJsZSkgew0KPiA+ID4gPiArCQlyZXQgPSBtdGtfaW9tbXVf YXR0YWNoX3BndGFibGUoZGF0YSwgZGV2KTsNCj4gPiA+ID4gKwkJaWYgKHJldCkgew0KPiA+ID4g PiArCQkJZGV2X2VycihkYXRhLT5kZXYsICJGYWlsZWQgdG8gZGV2aWNlX2dyb3VwXG4iKTsNCj4g PiA+ID4gKwkJCXJldHVybiBOVUxMOw0KPiA+ID4gPiArCQl9DQo+ID4gPiA+ICsJfQ0KPiA+ID4g PiArDQo+ID4gPiA+ICAJLyogQWxsIHRoZSBjbGllbnQgZGV2aWNlcyBhcmUgaW4gdGhlIHNhbWUg bTR1IGlvbW11LWdyb3VwICovDQo+ID4gPiA+ICAJaWYgKCFkYXRhLT5tNHVfZ3JvdXApIHsNCj4g PiA+ID4gIAkJZGF0YS0+bTR1X2dyb3VwID0gaW9tbXVfZ3JvdXBfYWxsb2MoKTsNCj4gPiA+ID4g ZGlmZiAtLWdpdCBhL2RyaXZlcnMvaW9tbXUvbXRrX2lvbW11LmggYi9kcml2ZXJzL2lvbW11L210 a19pb21tdS5oDQo+ID4gPiA+IGluZGV4IDEzMmRjNzY1YTQwYi4uZGQ1ZjE5Zjc4YjYyIDEwMDY0 NA0KPiA+ID4gPiAtLS0gYS9kcml2ZXJzL2lvbW11L210a19pb21tdS5oDQo+ID4gPiA+ICsrKyBi L2RyaXZlcnMvaW9tbXUvbXRrX2lvbW11LmgNCj4gPiA+ID4gQEAgLTYxLDYgKzYxLDcgQEAgc3Ry dWN0IG10a19pb21tdV9kYXRhIHsNCj4gPiA+ID4gIAlzdHJ1Y3QgY2xrCQkJKmJjbGs7DQo+ID4g PiA+ICAJcGh5c19hZGRyX3QJCQlwcm90ZWN0X2Jhc2U7IC8qIHByb3RlY3QgbWVtb3J5IGJhc2Ug Ki8NCj4gPiA+ID4gIAlzdHJ1Y3QgbXRrX2lvbW11X3N1c3BlbmRfcmVnCXJlZzsNCj4gPiA+ID4g KwlzdHJ1Y3QgbXRrX2lvbW11X3BndGFibGUJKnBndGFibGU7DQo+ID4gPiA+ICAJc3RydWN0IG10 a19pb21tdV9kb21haW4JCSptNHVfZG9tOw0KPiA+ID4gPiAgCXN0cnVjdCBpb21tdV9ncm91cAkJ Km00dV9ncm91cDsNCj4gPiA+ID4gIAlib29sICAgICAgICAgICAgICAgICAgICAgICAgICAgIGVu YWJsZV80R0I7DQo+ID4gPiANCj4gPiA+IA0KPiA+IA0KPiA+IA0KPiANCj4gDQoNCg==