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Wed, 20 May 2020 19:29:00 -0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 20 May 2020 20:28:59 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 21 May 2020 11:28:57 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 21 May 2020 11:28:57 +0800 Message-ID: <1590031737.26404.26.camel@mtksdaap41> Subject: Re: [PATCH v14 03/11] soc: mediatek: Add basic_clk_name to scp_power_data From: Weiyi Lu To: Enric Balletbo i Serra Date: Thu, 21 May 2020 11:28:57 +0800 In-Reply-To: References: <1588752963-19934-1-git-send-email-weiyi.lu@mediatek.com> <1588752963-19934-4-git-send-email-weiyi.lu@mediatek.com> <7ad67855-a3f8-f979-8849-3765bd8289d3@collabora.com> <1589176947.21832.9.camel@mtksdaap41> <1589513724.16252.3.camel@mtksdaap41> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200520_202910_980482_4DC298EE X-CRM114-Status: GOOD ( 30.06 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: James Liao , Nicolas Boichat , srv_heupstream@mediatek.com, Rob Herring , Enric Balletbo Serra , linux-kernel@vger.kernel.org, Fan Chen , linux-mediatek@lists.infradead.org, Sascha Hauer , Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Mon, 2020-05-18 at 19:52 +0200, Enric Balletbo i Serra wrote: > Hi Weiyi, > > On 15/5/20 5:35, Weiyi Lu wrote: > > On Mon, 2020-05-11 at 14:02 +0800, Weiyi Lu wrote: > >> On Wed, 2020-05-06 at 23:01 +0200, Enric Balletbo i Serra wrote: > >>> Hi Weiyi, > >>> > >>> Thank you for your patch. > >>> > >>> On 6/5/20 10:15, Weiyi Lu wrote: > >>>> Try to stop extending the clk_id or clk_names if there are > >>>> more and more new BASIC clocks. To get its own clocks by the > >>>> basic_clk_name of each power domain. > >>>> And then use basic_clk_name strings for all compatibles, instead of > >>>> mixing clk_id and clk_name. > >>>> > >>>> Signed-off-by: Weiyi Lu > >>>> Reviewed-by: Nicolas Boichat > >>>> --- > >>>> drivers/soc/mediatek/mtk-scpsys.c | 134 ++++++++++++-------------------------- > >>>> 1 file changed, 41 insertions(+), 93 deletions(-) > >>>> > >>>> diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c > >>>> index f669d37..c9c3cf7 100644 > >>>> --- a/drivers/soc/mediatek/mtk-scpsys.c > >>>> +++ b/drivers/soc/mediatek/mtk-scpsys.c > >>>> @@ -78,34 +78,6 @@ > >>>> #define PWR_STATUS_HIF1 BIT(26) /* MT7622 */ > >>>> #define PWR_STATUS_WB BIT(27) /* MT7622 */ > >>>> > >>>> -enum clk_id { > >>>> - CLK_NONE, > >>>> - CLK_MM, > >>>> - CLK_MFG, > >>>> - CLK_VENC, > >>>> - CLK_VENC_LT, > >>>> - CLK_ETHIF, > >>>> - CLK_VDEC, > >>>> - CLK_HIFSEL, > >>>> - CLK_JPGDEC, > >>>> - CLK_AUDIO, > >>>> - CLK_MAX, > >>>> -}; > >>>> - > >>>> -static const char * const clk_names[] = { > >>>> - NULL, > >>>> - "mm", > >>>> - "mfg", > >>>> - "venc", > >>>> - "venc_lt", > >>>> - "ethif", > >>>> - "vdec", > >>>> - "hif_sel", > >>>> - "jpgdec", > >>>> - "audio", > >>>> - NULL, > >>>> -}; > >>>> - > >>>> #define MAX_CLKS 3 > >>>> > >>>> /** > >>>> @@ -116,7 +88,7 @@ enum clk_id { > >>>> * @sram_pdn_bits: The mask for sram power control bits. > >>>> * @sram_pdn_ack_bits: The mask for sram power control acked bits. > >>>> * @bus_prot_mask: The mask for single step bus protection. > >>>> - * @clk_id: The basic clocks required by this power domain. > >>>> + * @basic_clk_name: The basic clocks required by this power domain. > >>>> * @caps: The flag for active wake-up action. > >>>> */ > >>>> struct scp_domain_data { > >>>> @@ -126,7 +98,7 @@ struct scp_domain_data { > >>>> u32 sram_pdn_bits; > >>>> u32 sram_pdn_ack_bits; > >>>> u32 bus_prot_mask; > >>>> - enum clk_id clk_id[MAX_CLKS]; > >>>> + const char *basic_clk_name[MAX_CLKS]; > >>> > >>> I only reviewed v13, so sorry if this was already discussed. I am wondering if > >>> would be better take advantage of the devm_clk_bulk_get() function instead of > >>> kind of reimplementing the same, something like this > >>> > >>> const struct clk_bulk_data *basic_clocks; > >>> > >> > >> I thought it should be const struct clk_bulk_data > >> basic_clocks[MAX_CLKS]; instead of const struct clk_bulk_data > >> *basic_clocks; in struct scp_domain_data data type > >> > >>>> u8 caps; > >>>> }; > >>>> > >>>> @@ -411,12 +383,19 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) > >>>> return ret; > >>>> } > >>>> > >>>> -static void init_clks(struct platform_device *pdev, struct clk **clk) > >>>> +static int init_basic_clks(struct platform_device *pdev, struct clk **clk, > >>>> + const char * const *name) > >>>> { > >>>> int i; > >>>> > >>>> - for (i = CLK_NONE + 1; i < CLK_MAX; i++) > >>>> - clk[i] = devm_clk_get(&pdev->dev, clk_names[i]); > >>>> + for (i = 0; i < MAX_CLKS && name[i]; i++) { > >>>> + clk[i] = devm_clk_get(&pdev->dev, name[i]); > >>>> + > >>>> + if (IS_ERR(clk[i])) > >>>> + return PTR_ERR(clk[i]); > >>>> + } > >>> > >>> You will be able to remove this function, see below ... > >>> > >>>> + > >>>> + return 0; > >>>> } > >>>> > >>>> static struct scp *init_scp(struct platform_device *pdev, > >>>> @@ -426,9 +405,8 @@ static struct scp *init_scp(struct platform_device *pdev, > >>>> { > >>>> struct genpd_onecell_data *pd_data; > >>>> struct resource *res; > >>>> - int i, j; > >>>> + int i, ret; > >>>> struct scp *scp; > >>>> - struct clk *clk[CLK_MAX]; > >>>> > >>>> scp = devm_kzalloc(&pdev->dev, sizeof(*scp), GFP_KERNEL); > >>>> if (!scp) > >>>> @@ -481,8 +459,6 @@ static struct scp *init_scp(struct platform_device *pdev, > >>>> > >>>> pd_data->num_domains = num; > >>>> > >>>> - init_clks(pdev, clk); > >>>> - > >>>> for (i = 0; i < num; i++) { > >>>> struct scp_domain *scpd = &scp->domains[i]; > >>>> struct generic_pm_domain *genpd = &scpd->genpd; > >>>> @@ -493,17 +469,9 @@ static struct scp *init_scp(struct platform_device *pdev, > >>>> > >>>> scpd->data = data; > >>>> > >>>> - for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { > >>>> - struct clk *c = clk[data->clk_id[j]]; > >>>> - > >>>> - if (IS_ERR(c)) { > >>>> - dev_err(&pdev->dev, "%s: clk unavailable\n", > >>>> - data->name); > >>>> - return ERR_CAST(c); > >>>> - } > >>>> - > >>>> - scpd->clk[j] = c; > >>>> - } > >>>> + ret = init_basic_clks(pdev, scpd->clk, data->basic_clk_name); > >>>> + if (ret) > >>>> + return ERR_PTR(ret); > >>> > >>> Just call: > >>> > >>> ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(basic_clocks), > >>> data->basic_clocks); > >>> if (ret) > >>> return ERR_PTR(ret); > >>> > >>>> > >>>> genpd->name = data->name; > >>>> genpd->power_off = scpsys_power_off; > >>>> @@ -560,7 +528,6 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .ctl_offs = SPM_CONN_PWR_CON, > >>>> .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M | > >>>> MT2701_TOP_AXI_PROT_EN_CONN_S, > >>>> - .clk_id = {CLK_NONE}, > >>>> .caps = MTK_SCPD_ACTIVE_WAKEUP, > >>>> }, > >>>> [MT2701_POWER_DOMAIN_DISP] = { > >>>> @@ -568,7 +535,7 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .sta_mask = PWR_STATUS_DISP, > >>>> .ctl_offs = SPM_DIS_PWR_CON, > >>>> .sram_pdn_bits = GENMASK(11, 8), > >>>> - .clk_id = {CLK_MM}, > >>>> + .basic_clk_name = {"mm"}, > >>> > >>> .basic_clocks[] = { > >>> { .id = "mm" }, > >>> }; > >>> > >> > >> Those basic clocks without given a name (name: null) would get incorrect > >> clock via clk_bulk_get(...) due to > >> > >> /** > >> * of_parse_clkspec() - Parse a DT clock specifier for a given device > >> node > >> * @np: device node to parse clock specifier from > >> * @index: index of phandle to parse clock out of. If index < 0, @name > >> is used > >> * @name: clock name to find and parse. If name is NULL, the index is > >> used > >> > >> And the index is 0 here in this callstack > >> > >> I guess something need to be improved before we use the clk_bulk_ APIs. > >> > > > > Hi Enric, > > > > According to the result above, is it necessary to change the APIs or > > maybe I should send the next version v15 first to fix other problems you > > mentioned? Many thanks. > > > > It is fine to send a next version without changing the APIs, it depends on the > extra work if you are fine with the change. To be honest I didn't see the > problem above but I think can be fixed. > > Cheers, > Enric > Hi Enric, Got it, I'll send a next version without changing the APIs. And please let me explain it again. If anything wrong, feel free to correct me. First, the clock mapping in the dts e.g. clocks = <&topckgen CLK_TOP_MUX_AUD_INTBUS>, <= index 0 <&infracfg CLK_INFRA_AUDIO>, <&infracfg CLK_INFRA_AUDIO_26M_BCLK>, <&topckgen CLK_TOP_MUX_MFG>, <&topckgen CLK_TOP_MUX_MM>; clock-names = "audio", "audio1", "audio2", "mfg", "mm"; And then, in struct scp_domain_data data structure we might need to use const struct clk_bulk_data basic_clocks[MAX_CLKS]; rather than const struct clk_bulk_data *basic_clocks; So what .basic_clocks = { { .id = "mm" }, }; is certainly like below .basic_clocks = { { .id = "mm" }, { .id = null }, { .id = null }, }; And using devm_clk_bulk_get(...); to get the clock resource will result in basic_clocks = { { .id = "mm", . clk = <&topckgen CLK_TOP_MUX_MM>}, { .id = null, . clk = <&topckgen CLK_TOP_MUX_AUD_INTBUS>}, { .id = null, . clk = <&topckgen CLK_TOP_MUX_AUD_INTBUS>}, }; I thought it's incorrect for my usage inside the mtk-scpsys.c and currently how devm_clk_bulk_get(...) will get the clock resource is by API of_parse_clksepc() /** * of_parse_clkspec() - Parse a DT clock specifier for a given device node * @np: device node to parse clock specifier from * @index: index of phandle to parse clock out of. If index < 0, @name is used * @name: clock name to find and parse. If name is NULL, the index is used And for clocks without given a name first(id=null), will use the index 0 to get the clock. In this example, the index 0 will map to <&topckgen CLK_TOP_MUX_AUD_INTBUS> If we ignore the problem and use clk_bulk_prepare()/_enable() to control the clock, so far, clk_bulk_enable will traverse all the iterator and enable the unexpected clocks without check if the clock id(name) is valid or not. Right now, I'm not sure why of_parse_clkspec() assume to use the index 0 if the name is NULL. I might need some time to dig it out. If you have some information about this part, please share it to me. Many thanks. > > >> > >>>> .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_MM_M0, > >>>> .caps = MTK_SCPD_ACTIVE_WAKEUP, > >>>> }, > >>>> @@ -578,7 +545,7 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .ctl_offs = SPM_MFG_PWR_CON, > >>>> .sram_pdn_bits = GENMASK(11, 8), > >>>> .sram_pdn_ack_bits = GENMASK(12, 12), > >>>> - .clk_id = {CLK_MFG}, > >>>> + .basic_clk_name = {"mfg"}, > >>> > >>> .basic_clocks[] = { > >>> { .id = "mfg" }, > >>> }; > >>> > >>>> .caps = MTK_SCPD_ACTIVE_WAKEUP, > >>>> }, > >>>> [MT2701_POWER_DOMAIN_VDEC] = { > >>>> @@ -587,7 +554,7 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .ctl_offs = SPM_VDE_PWR_CON, > >>>> .sram_pdn_bits = GENMASK(11, 8), > >>>> .sram_pdn_ack_bits = GENMASK(12, 12), > >>>> - .clk_id = {CLK_MM}, > >>>> + .basic_clk_name = {"mm"}, > >>> > >>> ... > >>> > >>> [snip] > >> > >> > > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2424FC433DF for ; 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Thu, 21 May 2020 11:28:57 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 21 May 2020 11:28:57 +0800 Message-ID: <1590031737.26404.26.camel@mtksdaap41> Subject: Re: [PATCH v14 03/11] soc: mediatek: Add basic_clk_name to scp_power_data From: Weiyi Lu To: Enric Balletbo i Serra Date: Thu, 21 May 2020 11:28:57 +0800 In-Reply-To: References: <1588752963-19934-1-git-send-email-weiyi.lu@mediatek.com> <1588752963-19934-4-git-send-email-weiyi.lu@mediatek.com> <7ad67855-a3f8-f979-8849-3765bd8289d3@collabora.com> <1589176947.21832.9.camel@mtksdaap41> <1589513724.16252.3.camel@mtksdaap41> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200520_202910_980482_4DC298EE X-CRM114-Status: GOOD ( 30.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: James Liao , Nicolas Boichat , srv_heupstream@mediatek.com, Rob Herring , Enric Balletbo Serra , linux-kernel@vger.kernel.org, Fan Chen , linux-mediatek@lists.infradead.org, Sascha Hauer , Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2020-05-18 at 19:52 +0200, Enric Balletbo i Serra wrote: > Hi Weiyi, > > On 15/5/20 5:35, Weiyi Lu wrote: > > On Mon, 2020-05-11 at 14:02 +0800, Weiyi Lu wrote: > >> On Wed, 2020-05-06 at 23:01 +0200, Enric Balletbo i Serra wrote: > >>> Hi Weiyi, > >>> > >>> Thank you for your patch. > >>> > >>> On 6/5/20 10:15, Weiyi Lu wrote: > >>>> Try to stop extending the clk_id or clk_names if there are > >>>> more and more new BASIC clocks. To get its own clocks by the > >>>> basic_clk_name of each power domain. > >>>> And then use basic_clk_name strings for all compatibles, instead of > >>>> mixing clk_id and clk_name. > >>>> > >>>> Signed-off-by: Weiyi Lu > >>>> Reviewed-by: Nicolas Boichat > >>>> --- > >>>> drivers/soc/mediatek/mtk-scpsys.c | 134 ++++++++++++-------------------------- > >>>> 1 file changed, 41 insertions(+), 93 deletions(-) > >>>> > >>>> diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c > >>>> index f669d37..c9c3cf7 100644 > >>>> --- a/drivers/soc/mediatek/mtk-scpsys.c > >>>> +++ b/drivers/soc/mediatek/mtk-scpsys.c > >>>> @@ -78,34 +78,6 @@ > >>>> #define PWR_STATUS_HIF1 BIT(26) /* MT7622 */ > >>>> #define PWR_STATUS_WB BIT(27) /* MT7622 */ > >>>> > >>>> -enum clk_id { > >>>> - CLK_NONE, > >>>> - CLK_MM, > >>>> - CLK_MFG, > >>>> - CLK_VENC, > >>>> - CLK_VENC_LT, > >>>> - CLK_ETHIF, > >>>> - CLK_VDEC, > >>>> - CLK_HIFSEL, > >>>> - CLK_JPGDEC, > >>>> - CLK_AUDIO, > >>>> - CLK_MAX, > >>>> -}; > >>>> - > >>>> -static const char * const clk_names[] = { > >>>> - NULL, > >>>> - "mm", > >>>> - "mfg", > >>>> - "venc", > >>>> - "venc_lt", > >>>> - "ethif", > >>>> - "vdec", > >>>> - "hif_sel", > >>>> - "jpgdec", > >>>> - "audio", > >>>> - NULL, > >>>> -}; > >>>> - > >>>> #define MAX_CLKS 3 > >>>> > >>>> /** > >>>> @@ -116,7 +88,7 @@ enum clk_id { > >>>> * @sram_pdn_bits: The mask for sram power control bits. > >>>> * @sram_pdn_ack_bits: The mask for sram power control acked bits. > >>>> * @bus_prot_mask: The mask for single step bus protection. > >>>> - * @clk_id: The basic clocks required by this power domain. > >>>> + * @basic_clk_name: The basic clocks required by this power domain. > >>>> * @caps: The flag for active wake-up action. > >>>> */ > >>>> struct scp_domain_data { > >>>> @@ -126,7 +98,7 @@ struct scp_domain_data { > >>>> u32 sram_pdn_bits; > >>>> u32 sram_pdn_ack_bits; > >>>> u32 bus_prot_mask; > >>>> - enum clk_id clk_id[MAX_CLKS]; > >>>> + const char *basic_clk_name[MAX_CLKS]; > >>> > >>> I only reviewed v13, so sorry if this was already discussed. I am wondering if > >>> would be better take advantage of the devm_clk_bulk_get() function instead of > >>> kind of reimplementing the same, something like this > >>> > >>> const struct clk_bulk_data *basic_clocks; > >>> > >> > >> I thought it should be const struct clk_bulk_data > >> basic_clocks[MAX_CLKS]; instead of const struct clk_bulk_data > >> *basic_clocks; in struct scp_domain_data data type > >> > >>>> u8 caps; > >>>> }; > >>>> > >>>> @@ -411,12 +383,19 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) > >>>> return ret; > >>>> } > >>>> > >>>> -static void init_clks(struct platform_device *pdev, struct clk **clk) > >>>> +static int init_basic_clks(struct platform_device *pdev, struct clk **clk, > >>>> + const char * const *name) > >>>> { > >>>> int i; > >>>> > >>>> - for (i = CLK_NONE + 1; i < CLK_MAX; i++) > >>>> - clk[i] = devm_clk_get(&pdev->dev, clk_names[i]); > >>>> + for (i = 0; i < MAX_CLKS && name[i]; i++) { > >>>> + clk[i] = devm_clk_get(&pdev->dev, name[i]); > >>>> + > >>>> + if (IS_ERR(clk[i])) > >>>> + return PTR_ERR(clk[i]); > >>>> + } > >>> > >>> You will be able to remove this function, see below ... > >>> > >>>> + > >>>> + return 0; > >>>> } > >>>> > >>>> static struct scp *init_scp(struct platform_device *pdev, > >>>> @@ -426,9 +405,8 @@ static struct scp *init_scp(struct platform_device *pdev, > >>>> { > >>>> struct genpd_onecell_data *pd_data; > >>>> struct resource *res; > >>>> - int i, j; > >>>> + int i, ret; > >>>> struct scp *scp; > >>>> - struct clk *clk[CLK_MAX]; > >>>> > >>>> scp = devm_kzalloc(&pdev->dev, sizeof(*scp), GFP_KERNEL); > >>>> if (!scp) > >>>> @@ -481,8 +459,6 @@ static struct scp *init_scp(struct platform_device *pdev, > >>>> > >>>> pd_data->num_domains = num; > >>>> > >>>> - init_clks(pdev, clk); > >>>> - > >>>> for (i = 0; i < num; i++) { > >>>> struct scp_domain *scpd = &scp->domains[i]; > >>>> struct generic_pm_domain *genpd = &scpd->genpd; > >>>> @@ -493,17 +469,9 @@ static struct scp *init_scp(struct platform_device *pdev, > >>>> > >>>> scpd->data = data; > >>>> > >>>> - for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { > >>>> - struct clk *c = clk[data->clk_id[j]]; > >>>> - > >>>> - if (IS_ERR(c)) { > >>>> - dev_err(&pdev->dev, "%s: clk unavailable\n", > >>>> - data->name); > >>>> - return ERR_CAST(c); > >>>> - } > >>>> - > >>>> - scpd->clk[j] = c; > >>>> - } > >>>> + ret = init_basic_clks(pdev, scpd->clk, data->basic_clk_name); > >>>> + if (ret) > >>>> + return ERR_PTR(ret); > >>> > >>> Just call: > >>> > >>> ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(basic_clocks), > >>> data->basic_clocks); > >>> if (ret) > >>> return ERR_PTR(ret); > >>> > >>>> > >>>> genpd->name = data->name; > >>>> genpd->power_off = scpsys_power_off; > >>>> @@ -560,7 +528,6 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .ctl_offs = SPM_CONN_PWR_CON, > >>>> .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M | > >>>> MT2701_TOP_AXI_PROT_EN_CONN_S, > >>>> - .clk_id = {CLK_NONE}, > >>>> .caps = MTK_SCPD_ACTIVE_WAKEUP, > >>>> }, > >>>> [MT2701_POWER_DOMAIN_DISP] = { > >>>> @@ -568,7 +535,7 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .sta_mask = PWR_STATUS_DISP, > >>>> .ctl_offs = SPM_DIS_PWR_CON, > >>>> .sram_pdn_bits = GENMASK(11, 8), > >>>> - .clk_id = {CLK_MM}, > >>>> + .basic_clk_name = {"mm"}, > >>> > >>> .basic_clocks[] = { > >>> { .id = "mm" }, > >>> }; > >>> > >> > >> Those basic clocks without given a name (name: null) would get incorrect > >> clock via clk_bulk_get(...) due to > >> > >> /** > >> * of_parse_clkspec() - Parse a DT clock specifier for a given device > >> node > >> * @np: device node to parse clock specifier from > >> * @index: index of phandle to parse clock out of. If index < 0, @name > >> is used > >> * @name: clock name to find and parse. If name is NULL, the index is > >> used > >> > >> And the index is 0 here in this callstack > >> > >> I guess something need to be improved before we use the clk_bulk_ APIs. > >> > > > > Hi Enric, > > > > According to the result above, is it necessary to change the APIs or > > maybe I should send the next version v15 first to fix other problems you > > mentioned? Many thanks. > > > > It is fine to send a next version without changing the APIs, it depends on the > extra work if you are fine with the change. To be honest I didn't see the > problem above but I think can be fixed. > > Cheers, > Enric > Hi Enric, Got it, I'll send a next version without changing the APIs. And please let me explain it again. If anything wrong, feel free to correct me. First, the clock mapping in the dts e.g. clocks = <&topckgen CLK_TOP_MUX_AUD_INTBUS>, <= index 0 <&infracfg CLK_INFRA_AUDIO>, <&infracfg CLK_INFRA_AUDIO_26M_BCLK>, <&topckgen CLK_TOP_MUX_MFG>, <&topckgen CLK_TOP_MUX_MM>; clock-names = "audio", "audio1", "audio2", "mfg", "mm"; And then, in struct scp_domain_data data structure we might need to use const struct clk_bulk_data basic_clocks[MAX_CLKS]; rather than const struct clk_bulk_data *basic_clocks; So what .basic_clocks = { { .id = "mm" }, }; is certainly like below .basic_clocks = { { .id = "mm" }, { .id = null }, { .id = null }, }; And using devm_clk_bulk_get(...); to get the clock resource will result in basic_clocks = { { .id = "mm", . clk = <&topckgen CLK_TOP_MUX_MM>}, { .id = null, . clk = <&topckgen CLK_TOP_MUX_AUD_INTBUS>}, { .id = null, . clk = <&topckgen CLK_TOP_MUX_AUD_INTBUS>}, }; I thought it's incorrect for my usage inside the mtk-scpsys.c and currently how devm_clk_bulk_get(...) will get the clock resource is by API of_parse_clksepc() /** * of_parse_clkspec() - Parse a DT clock specifier for a given device node * @np: device node to parse clock specifier from * @index: index of phandle to parse clock out of. If index < 0, @name is used * @name: clock name to find and parse. If name is NULL, the index is used And for clocks without given a name first(id=null), will use the index 0 to get the clock. In this example, the index 0 will map to <&topckgen CLK_TOP_MUX_AUD_INTBUS> If we ignore the problem and use clk_bulk_prepare()/_enable() to control the clock, so far, clk_bulk_enable will traverse all the iterator and enable the unexpected clocks without check if the clock id(name) is valid or not. Right now, I'm not sure why of_parse_clkspec() assume to use the index 0 if the name is NULL. I might need some time to dig it out. If you have some information about this part, please share it to me. Many thanks. > > >> > >>>> .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_MM_M0, > >>>> .caps = MTK_SCPD_ACTIVE_WAKEUP, > >>>> }, > >>>> @@ -578,7 +545,7 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .ctl_offs = SPM_MFG_PWR_CON, > >>>> .sram_pdn_bits = GENMASK(11, 8), > >>>> .sram_pdn_ack_bits = GENMASK(12, 12), > >>>> - .clk_id = {CLK_MFG}, > >>>> + .basic_clk_name = {"mfg"}, > >>> > >>> .basic_clocks[] = { > >>> { .id = "mfg" }, > >>> }; > >>> > >>>> .caps = MTK_SCPD_ACTIVE_WAKEUP, > >>>> }, > >>>> [MT2701_POWER_DOMAIN_VDEC] = { > >>>> @@ -587,7 +554,7 @@ static void mtk_register_power_domains(struct platform_device *pdev, > >>>> .ctl_offs = SPM_VDE_PWR_CON, > >>>> .sram_pdn_bits = GENMASK(11, 8), > >>>> .sram_pdn_ack_bits = GENMASK(12, 12), > >>>> - .clk_id = {CLK_MM}, > >>>> + .basic_clk_name = {"mm"}, > >>> > >>> ... > >>> > >>> [snip] > >> > >> > > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE85BC433DF for ; Thu, 21 May 2020 03:29:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP 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Boichat , , Rob Herring , Enric Balletbo Serra , , Fan Chen , , Sascha Hauer , Matthias Brugger , Date: Thu, 21 May 2020 11:28:57 +0800 In-Reply-To: References: <1588752963-19934-1-git-send-email-weiyi.lu@mediatek.com> <1588752963-19934-4-git-send-email-weiyi.lu@mediatek.com> <7ad67855-a3f8-f979-8849-3765bd8289d3@collabora.com> <1589176947.21832.9.camel@mtksdaap41> <1589513724.16252.3.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org T24gTW9uLCAyMDIwLTA1LTE4IGF0IDE5OjUyICswMjAwLCBFbnJpYyBCYWxsZXRibyBpIFNlcnJh IHdyb3RlOg0KPiBIaSBXZWl5aSwNCj4gDQo+IE9uIDE1LzUvMjAgNTozNSwgV2VpeWkgTHUgd3Jv dGU6DQo+ID4gT24gTW9uLCAyMDIwLTA1LTExIGF0IDE0OjAyICswODAwLCBXZWl5aSBMdSB3cm90 ZToNCj4gPj4gT24gV2VkLCAyMDIwLTA1LTA2IGF0IDIzOjAxICswMjAwLCBFbnJpYyBCYWxsZXRi byBpIFNlcnJhIHdyb3RlOg0KPiA+Pj4gSGkgV2VpeWksDQo+ID4+Pg0KPiA+Pj4gVGhhbmsgeW91 IGZvciB5b3VyIHBhdGNoLg0KPiA+Pj4NCj4gPj4+IE9uIDYvNS8yMCAxMDoxNSwgV2VpeWkgTHUg d3JvdGU6DQo+ID4+Pj4gVHJ5IHRvIHN0b3AgZXh0ZW5kaW5nIHRoZSBjbGtfaWQgb3IgY2xrX25h bWVzIGlmIHRoZXJlIGFyZQ0KPiA+Pj4+IG1vcmUgYW5kIG1vcmUgbmV3IEJBU0lDIGNsb2Nrcy4g VG8gZ2V0IGl0cyBvd24gY2xvY2tzIGJ5IHRoZQ0KPiA+Pj4+IGJhc2ljX2Nsa19uYW1lIG9mIGVh Y2ggcG93ZXIgZG9tYWluLg0KPiA+Pj4+IEFuZCB0aGVuIHVzZSBiYXNpY19jbGtfbmFtZSBzdHJp bmdzIGZvciBhbGwgY29tcGF0aWJsZXMsIGluc3RlYWQgb2YNCj4gPj4+PiBtaXhpbmcgY2xrX2lk IGFuZCBjbGtfbmFtZS4NCj4gPj4+Pg0KPiA+Pj4+IFNpZ25lZC1vZmYtYnk6IFdlaXlpIEx1IDx3 ZWl5aS5sdUBtZWRpYXRlay5jb20+DQo+ID4+Pj4gUmV2aWV3ZWQtYnk6IE5pY29sYXMgQm9pY2hh dCA8ZHJpbmtjYXRAY2hyb21pdW0ub3JnPg0KPiA+Pj4+IC0tLQ0KPiA+Pj4+ICBkcml2ZXJzL3Nv Yy9tZWRpYXRlay9tdGstc2Nwc3lzLmMgfCAxMzQgKysrKysrKysrKysrLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0NCj4gPj4+PiAgMSBmaWxlIGNoYW5nZWQsIDQxIGluc2VydGlvbnMoKyksIDkz IGRlbGV0aW9ucygtKQ0KPiA+Pj4+DQo+ID4+Pj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvc29jL21l ZGlhdGVrL210ay1zY3BzeXMuYyBiL2RyaXZlcnMvc29jL21lZGlhdGVrL210ay1zY3BzeXMuYw0K PiA+Pj4+IGluZGV4IGY2NjlkMzcuLmM5YzNjZjcgMTAwNjQ0DQo+ID4+Pj4gLS0tIGEvZHJpdmVy cy9zb2MvbWVkaWF0ZWsvbXRrLXNjcHN5cy5jDQo+ID4+Pj4gKysrIGIvZHJpdmVycy9zb2MvbWVk aWF0ZWsvbXRrLXNjcHN5cy5jDQo+ID4+Pj4gQEAgLTc4LDM0ICs3OCw2IEBADQo+ID4+Pj4gICNk ZWZpbmUgUFdSX1NUQVRVU19ISUYxCQkJQklUKDI2KQkvKiBNVDc2MjIgKi8NCj4gPj4+PiAgI2Rl ZmluZSBQV1JfU1RBVFVTX1dCCQkJQklUKDI3KQkvKiBNVDc2MjIgKi8NCj4gPj4+PiAgDQo+ID4+ Pj4gLWVudW0gY2xrX2lkIHsNCj4gPj4+PiAtCUNMS19OT05FLA0KPiA+Pj4+IC0JQ0xLX01NLA0K PiA+Pj4+IC0JQ0xLX01GRywNCj4gPj4+PiAtCUNMS19WRU5DLA0KPiA+Pj4+IC0JQ0xLX1ZFTkNf TFQsDQo+ID4+Pj4gLQlDTEtfRVRISUYsDQo+ID4+Pj4gLQlDTEtfVkRFQywNCj4gPj4+PiAtCUNM S19ISUZTRUwsDQo+ID4+Pj4gLQlDTEtfSlBHREVDLA0KPiA+Pj4+IC0JQ0xLX0FVRElPLA0KPiA+ Pj4+IC0JQ0xLX01BWCwNCj4gPj4+PiAtfTsNCj4gPj4+PiAtDQo+ID4+Pj4gLXN0YXRpYyBjb25z dCBjaGFyICogY29uc3QgY2xrX25hbWVzW10gPSB7DQo+ID4+Pj4gLQlOVUxMLA0KPiA+Pj4+IC0J Im1tIiwNCj4gPj4+PiAtCSJtZmciLA0KPiA+Pj4+IC0JInZlbmMiLA0KPiA+Pj4+IC0JInZlbmNf bHQiLA0KPiA+Pj4+IC0JImV0aGlmIiwNCj4gPj4+PiAtCSJ2ZGVjIiwNCj4gPj4+PiAtCSJoaWZf c2VsIiwNCj4gPj4+PiAtCSJqcGdkZWMiLA0KPiA+Pj4+IC0JImF1ZGlvIiwNCj4gPj4+PiAtCU5V TEwsDQo+ID4+Pj4gLX07DQo+ID4+Pj4gLQ0KPiA+Pj4+ICAjZGVmaW5lIE1BWF9DTEtTCTMNCj4g Pj4+PiAgDQo+ID4+Pj4gIC8qKg0KPiA+Pj4+IEBAIC0xMTYsNyArODgsNyBAQCBlbnVtIGNsa19p ZCB7DQo+ID4+Pj4gICAqIEBzcmFtX3Bkbl9iaXRzOiBUaGUgbWFzayBmb3Igc3JhbSBwb3dlciBj b250cm9sIGJpdHMuDQo+ID4+Pj4gICAqIEBzcmFtX3Bkbl9hY2tfYml0czogVGhlIG1hc2sgZm9y IHNyYW0gcG93ZXIgY29udHJvbCBhY2tlZCBiaXRzLg0KPiA+Pj4+ICAgKiBAYnVzX3Byb3RfbWFz azogVGhlIG1hc2sgZm9yIHNpbmdsZSBzdGVwIGJ1cyBwcm90ZWN0aW9uLg0KPiA+Pj4+IC0gKiBA Y2xrX2lkOiBUaGUgYmFzaWMgY2xvY2tzIHJlcXVpcmVkIGJ5IHRoaXMgcG93ZXIgZG9tYWluLg0K PiA+Pj4+ICsgKiBAYmFzaWNfY2xrX25hbWU6IFRoZSBiYXNpYyBjbG9ja3MgcmVxdWlyZWQgYnkg dGhpcyBwb3dlciBkb21haW4uDQo+ID4+Pj4gICAqIEBjYXBzOiBUaGUgZmxhZyBmb3IgYWN0aXZl IHdha2UtdXAgYWN0aW9uLg0KPiA+Pj4+ICAgKi8NCj4gPj4+PiAgc3RydWN0IHNjcF9kb21haW5f ZGF0YSB7DQo+ID4+Pj4gQEAgLTEyNiw3ICs5OCw3IEBAIHN0cnVjdCBzY3BfZG9tYWluX2RhdGEg ew0KPiA+Pj4+ICAJdTMyIHNyYW1fcGRuX2JpdHM7DQo+ID4+Pj4gIAl1MzIgc3JhbV9wZG5fYWNr X2JpdHM7DQo+ID4+Pj4gIAl1MzIgYnVzX3Byb3RfbWFzazsNCj4gPj4+PiAtCWVudW0gY2xrX2lk IGNsa19pZFtNQVhfQ0xLU107DQo+ID4+Pj4gKwljb25zdCBjaGFyICpiYXNpY19jbGtfbmFtZVtN QVhfQ0xLU107DQo+ID4+Pg0KPiA+Pj4gSSBvbmx5IHJldmlld2VkIHYxMywgc28gc29ycnkgaWYg dGhpcyB3YXMgYWxyZWFkeSBkaXNjdXNzZWQuIEkgYW0gd29uZGVyaW5nIGlmDQo+ID4+PiB3b3Vs ZCBiZSBiZXR0ZXIgdGFrZSBhZHZhbnRhZ2Ugb2YgdGhlIGRldm1fY2xrX2J1bGtfZ2V0KCkgZnVu Y3Rpb24gaW5zdGVhZCBvZg0KPiA+Pj4ga2luZCBvZiByZWltcGxlbWVudGluZyB0aGUgc2FtZSwg c29tZXRoaW5nIGxpa2UgdGhpcw0KPiA+Pj4NCj4gPj4+IAljb25zdCBzdHJ1Y3QgY2xrX2J1bGtf ZGF0YSAqYmFzaWNfY2xvY2tzOw0KPiA+Pj4NCj4gPj4NCj4gPj4gSSB0aG91Z2h0IGl0IHNob3Vs ZCBiZSBjb25zdCBzdHJ1Y3QgY2xrX2J1bGtfZGF0YQ0KPiA+PiBiYXNpY19jbG9ja3NbTUFYX0NM S1NdOyBpbnN0ZWFkIG9mIGNvbnN0IHN0cnVjdCBjbGtfYnVsa19kYXRhDQo+ID4+ICpiYXNpY19j bG9ja3M7IGluIHN0cnVjdCBzY3BfZG9tYWluX2RhdGEgZGF0YSB0eXBlDQo+ID4+DQo+ID4+Pj4g IAl1OCBjYXBzOw0KPiA+Pj4+ICB9Ow0KPiA+Pj4+ICANCj4gPj4+PiBAQCAtNDExLDEyICszODMs MTkgQEAgc3RhdGljIGludCBzY3BzeXNfcG93ZXJfb2ZmKHN0cnVjdCBnZW5lcmljX3BtX2RvbWFp biAqZ2VucGQpDQo+ID4+Pj4gIAlyZXR1cm4gcmV0Ow0KPiA+Pj4+ICB9DQo+ID4+Pj4gIA0KPiA+ Pj4+IC1zdGF0aWMgdm9pZCBpbml0X2Nsa3Moc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldiwg c3RydWN0IGNsayAqKmNsaykNCj4gPj4+PiArc3RhdGljIGludCBpbml0X2Jhc2ljX2Nsa3Moc3Ry dWN0IHBsYXRmb3JtX2RldmljZSAqcGRldiwgc3RydWN0IGNsayAqKmNsaywNCj4gPj4+PiArCQkJ Y29uc3QgY2hhciAqIGNvbnN0ICpuYW1lKQ0KPiA+Pj4+ICB7DQo+ID4+Pj4gIAlpbnQgaTsNCj4g Pj4+PiAgDQo+ID4+Pj4gLQlmb3IgKGkgPSBDTEtfTk9ORSArIDE7IGkgPCBDTEtfTUFYOyBpKysp DQo+ID4+Pj4gLQkJY2xrW2ldID0gZGV2bV9jbGtfZ2V0KCZwZGV2LT5kZXYsIGNsa19uYW1lc1tp XSk7DQo+ID4+Pj4gKwlmb3IgKGkgPSAwOyBpIDwgTUFYX0NMS1MgJiYgbmFtZVtpXTsgaSsrKSB7 DQo+ID4+Pj4gKwkJY2xrW2ldID0gZGV2bV9jbGtfZ2V0KCZwZGV2LT5kZXYsIG5hbWVbaV0pOw0K PiA+Pj4+ICsNCj4gPj4+PiArCQlpZiAoSVNfRVJSKGNsa1tpXSkpDQo+ID4+Pj4gKwkJCXJldHVy biBQVFJfRVJSKGNsa1tpXSk7DQo+ID4+Pj4gKwl9DQo+ID4+Pg0KPiA+Pj4gWW91IHdpbGwgYmUg YWJsZSB0byByZW1vdmUgdGhpcyBmdW5jdGlvbiwgc2VlIGJlbG93IC4uLg0KPiA+Pj4NCj4gPj4+ PiArDQo+ID4+Pj4gKwlyZXR1cm4gMDsNCj4gPj4+PiAgfQ0KPiA+Pj4+ICANCj4gPj4+PiAgc3Rh dGljIHN0cnVjdCBzY3AgKmluaXRfc2NwKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYsDQo+ ID4+Pj4gQEAgLTQyNiw5ICs0MDUsOCBAQCBzdGF0aWMgc3RydWN0IHNjcCAqaW5pdF9zY3Aoc3Ry dWN0IHBsYXRmb3JtX2RldmljZSAqcGRldiwNCj4gPj4+PiAgew0KPiA+Pj4+ICAJc3RydWN0IGdl bnBkX29uZWNlbGxfZGF0YSAqcGRfZGF0YTsNCj4gPj4+PiAgCXN0cnVjdCByZXNvdXJjZSAqcmVz Ow0KPiA+Pj4+IC0JaW50IGksIGo7DQo+ID4+Pj4gKwlpbnQgaSwgcmV0Ow0KPiA+Pj4+ICAJc3Ry dWN0IHNjcCAqc2NwOw0KPiA+Pj4+IC0Jc3RydWN0IGNsayAqY2xrW0NMS19NQVhdOw0KPiA+Pj4+ ICANCj4gPj4+PiAgCXNjcCA9IGRldm1fa3phbGxvYygmcGRldi0+ZGV2LCBzaXplb2YoKnNjcCks IEdGUF9LRVJORUwpOw0KPiA+Pj4+ICAJaWYgKCFzY3ApDQo+ID4+Pj4gQEAgLTQ4MSw4ICs0NTks NiBAQCBzdGF0aWMgc3RydWN0IHNjcCAqaW5pdF9zY3Aoc3RydWN0IHBsYXRmb3JtX2RldmljZSAq cGRldiwNCj4gPj4+PiAgDQo+ID4+Pj4gIAlwZF9kYXRhLT5udW1fZG9tYWlucyA9IG51bTsNCj4g Pj4+PiAgDQo+ID4+Pj4gLQlpbml0X2Nsa3MocGRldiwgY2xrKTsNCj4gPj4+PiAtDQo+ID4+Pj4g IAlmb3IgKGkgPSAwOyBpIDwgbnVtOyBpKyspIHsNCj4gPj4+PiAgCQlzdHJ1Y3Qgc2NwX2RvbWFp biAqc2NwZCA9ICZzY3AtPmRvbWFpbnNbaV07DQo+ID4+Pj4gIAkJc3RydWN0IGdlbmVyaWNfcG1f ZG9tYWluICpnZW5wZCA9ICZzY3BkLT5nZW5wZDsNCj4gPj4+PiBAQCAtNDkzLDE3ICs0NjksOSBA QCBzdGF0aWMgc3RydWN0IHNjcCAqaW5pdF9zY3Aoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRl diwNCj4gPj4+PiAgDQo+ID4+Pj4gIAkJc2NwZC0+ZGF0YSA9IGRhdGE7DQo+ID4+Pj4gIA0KPiA+ Pj4+IC0JCWZvciAoaiA9IDA7IGogPCBNQVhfQ0xLUyAmJiBkYXRhLT5jbGtfaWRbal07IGorKykg ew0KPiA+Pj4+IC0JCQlzdHJ1Y3QgY2xrICpjID0gY2xrW2RhdGEtPmNsa19pZFtqXV07DQo+ID4+ Pj4gLQ0KPiA+Pj4+IC0JCQlpZiAoSVNfRVJSKGMpKSB7DQo+ID4+Pj4gLQkJCQlkZXZfZXJyKCZw ZGV2LT5kZXYsICIlczogY2xrIHVuYXZhaWxhYmxlXG4iLA0KPiA+Pj4+IC0JCQkJCWRhdGEtPm5h bWUpOw0KPiA+Pj4+IC0JCQkJcmV0dXJuIEVSUl9DQVNUKGMpOw0KPiA+Pj4+IC0JCQl9DQo+ID4+ Pj4gLQ0KPiA+Pj4+IC0JCQlzY3BkLT5jbGtbal0gPSBjOw0KPiA+Pj4+IC0JCX0NCj4gPj4+PiAr CQlyZXQgPSBpbml0X2Jhc2ljX2Nsa3MocGRldiwgc2NwZC0+Y2xrLCBkYXRhLT5iYXNpY19jbGtf bmFtZSk7DQo+ID4+Pj4gKwkJaWYgKHJldCkNCj4gPj4+PiArCQkJcmV0dXJuIEVSUl9QVFIocmV0 KTsNCj4gPj4+DQo+ID4+PiBKdXN0IGNhbGw6DQo+ID4+Pg0KPiA+Pj4gCXJldCA9IGRldm1fY2xr X2J1bGtfZ2V0KCZwZGV2LT5kZXYsIEFSUkFZX1NJWkUoYmFzaWNfY2xvY2tzKSwNCj4gPj4+IAkJ CQlkYXRhLT5iYXNpY19jbG9ja3MpOw0KPiA+Pj4gCWlmIChyZXQpDQo+ID4+PiAJCXJldHVybiBF UlJfUFRSKHJldCk7DQo+ID4+Pg0KPiA+Pj4+ICANCj4gPj4+PiAgCQlnZW5wZC0+bmFtZSA9IGRh dGEtPm5hbWU7DQo+ID4+Pj4gIAkJZ2VucGQtPnBvd2VyX29mZiA9IHNjcHN5c19wb3dlcl9vZmY7 DQo+ID4+Pj4gQEAgLTU2MCw3ICs1MjgsNiBAQCBzdGF0aWMgdm9pZCBtdGtfcmVnaXN0ZXJfcG93 ZXJfZG9tYWlucyhzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2LA0KPiA+Pj4+ICAJCS5jdGxf b2ZmcyA9IFNQTV9DT05OX1BXUl9DT04sDQo+ID4+Pj4gIAkJLmJ1c19wcm90X21hc2sgPSBNVDI3 MDFfVE9QX0FYSV9QUk9UX0VOX0NPTk5fTSB8DQo+ID4+Pj4gIAkJCQkgTVQyNzAxX1RPUF9BWElf UFJPVF9FTl9DT05OX1MsDQo+ID4+Pj4gLQkJLmNsa19pZCA9IHtDTEtfTk9ORX0sDQo+ID4+Pj4g IAkJLmNhcHMgPSBNVEtfU0NQRF9BQ1RJVkVfV0FLRVVQLA0KPiA+Pj4+ICAJfSwNCj4gPj4+PiAg CVtNVDI3MDFfUE9XRVJfRE9NQUlOX0RJU1BdID0gew0KPiA+Pj4+IEBAIC01NjgsNyArNTM1LDcg QEAgc3RhdGljIHZvaWQgbXRrX3JlZ2lzdGVyX3Bvd2VyX2RvbWFpbnMoc3RydWN0IHBsYXRmb3Jt X2RldmljZSAqcGRldiwNCj4gPj4+PiAgCQkuc3RhX21hc2sgPSBQV1JfU1RBVFVTX0RJU1AsDQo+ ID4+Pj4gIAkJLmN0bF9vZmZzID0gU1BNX0RJU19QV1JfQ09OLA0KPiA+Pj4+ICAJCS5zcmFtX3Bk bl9iaXRzID0gR0VOTUFTSygxMSwgOCksDQo+ID4+Pj4gLQkJLmNsa19pZCA9IHtDTEtfTU19LA0K PiA+Pj4+ICsJCS5iYXNpY19jbGtfbmFtZSA9IHsibW0ifSwNCj4gPj4+DQo+ID4+PiAJCS5iYXNp Y19jbG9ja3NbXSA9IHsNCj4gPj4+IAkJCXsgLmlkID0gIm1tIiB9LA0KPiA+Pj4gCQl9Ow0KPiA+ Pj4NCj4gPj4NCj4gPj4gVGhvc2UgYmFzaWMgY2xvY2tzIHdpdGhvdXQgZ2l2ZW4gYSBuYW1lIChu YW1lOiBudWxsKSB3b3VsZCBnZXQgaW5jb3JyZWN0DQo+ID4+IGNsb2NrIHZpYSBjbGtfYnVsa19n ZXQoLi4uKSBkdWUgdG8gDQo+ID4+DQo+ID4+IC8qKg0KPiA+PiAgKiBvZl9wYXJzZV9jbGtzcGVj KCkgLSBQYXJzZSBhIERUIGNsb2NrIHNwZWNpZmllciBmb3IgYSBnaXZlbiBkZXZpY2UNCj4gPj4g bm9kZQ0KPiA+PiAgKiBAbnA6IGRldmljZSBub2RlIHRvIHBhcnNlIGNsb2NrIHNwZWNpZmllciBm cm9tDQo+ID4+ICAqIEBpbmRleDogaW5kZXggb2YgcGhhbmRsZSB0byBwYXJzZSBjbG9jayBvdXQg b2YuIElmIGluZGV4IDwgMCwgQG5hbWUNCj4gPj4gaXMgdXNlZA0KPiA+PiAgKiBAbmFtZTogY2xv Y2sgbmFtZSB0byBmaW5kIGFuZCBwYXJzZS4gSWYgbmFtZSBpcyBOVUxMLCB0aGUgaW5kZXggaXMN Cj4gPj4gdXNlZA0KPiA+Pg0KPiA+PiBBbmQgdGhlIGluZGV4IGlzIDAgaGVyZSBpbiB0aGlzIGNh bGxzdGFjaw0KPiA+Pg0KPiA+PiBJIGd1ZXNzIHNvbWV0aGluZyBuZWVkIHRvIGJlIGltcHJvdmVk IGJlZm9yZSB3ZSB1c2UgdGhlIGNsa19idWxrXyBBUElzLg0KPiA+Pg0KPiA+IA0KPiA+IEhpIEVu cmljLA0KPiA+IA0KPiA+IEFjY29yZGluZyB0byB0aGUgcmVzdWx0IGFib3ZlLCBpcyBpdCBuZWNl c3NhcnkgdG8gY2hhbmdlIHRoZSBBUElzIG9yDQo+ID4gbWF5YmUgSSBzaG91bGQgc2VuZCB0aGUg bmV4dCB2ZXJzaW9uIHYxNSBmaXJzdCB0byBmaXggb3RoZXIgcHJvYmxlbXMgeW91DQo+ID4gbWVu dGlvbmVkPyBNYW55IHRoYW5rcy4NCj4gPiANCj4gDQo+IEl0IGlzIGZpbmUgdG8gc2VuZCBhIG5l eHQgdmVyc2lvbiB3aXRob3V0IGNoYW5naW5nIHRoZSBBUElzLCBpdCBkZXBlbmRzIG9uIHRoZQ0K PiBleHRyYSB3b3JrIGlmIHlvdSBhcmUgZmluZSB3aXRoIHRoZSBjaGFuZ2UuIFRvIGJlIGhvbmVz dCBJIGRpZG4ndCBzZWUgdGhlDQo+IHByb2JsZW0gYWJvdmUgYnV0IEkgdGhpbmsgY2FuIGJlIGZp eGVkLg0KPiANCj4gQ2hlZXJzLA0KPiAgRW5yaWMNCj4gDQoNCkhpIEVucmljLA0KDQpHb3QgaXQs IEknbGwgc2VuZCBhIG5leHQgdmVyc2lvbiB3aXRob3V0IGNoYW5naW5nIHRoZSBBUElzLg0KQW5k IHBsZWFzZSBsZXQgbWUgZXhwbGFpbiBpdCBhZ2Fpbi4NCklmIGFueXRoaW5nIHdyb25nLCBmZWVs IGZyZWUgdG8gY29ycmVjdCBtZS4NCg0KRmlyc3QsIHRoZSBjbG9jayBtYXBwaW5nIGluIHRoZSBk dHMNCmUuZy4gDQpjbG9ja3MgPSA8JnRvcGNrZ2VuIENMS19UT1BfTVVYX0FVRF9JTlRCVVM+LCA8 PSBpbmRleCAwDQoJIDwmaW5mcmFjZmcgQ0xLX0lORlJBX0FVRElPPiwNCgkgPCZpbmZyYWNmZyBD TEtfSU5GUkFfQVVESU9fMjZNX0JDTEs+LA0KCSA8JnRvcGNrZ2VuIENMS19UT1BfTVVYX01GRz4s DQoJIDwmdG9wY2tnZW4gQ0xLX1RPUF9NVVhfTU0+Ow0KDQpjbG9jay1uYW1lcyA9ICJhdWRpbyIs DQoJICAgICAgImF1ZGlvMSIsDQoJICAgICAgImF1ZGlvMiIsDQoJICAgICAgIm1mZyIsDQoJICAg ICAgIm1tIjsNCg0KDQpBbmQgdGhlbiwgaW4gc3RydWN0IHNjcF9kb21haW5fZGF0YSBkYXRhIHN0 cnVjdHVyZSB3ZSBtaWdodCBuZWVkIHRvIHVzZQ0KY29uc3Qgc3RydWN0IGNsa19idWxrX2RhdGEg YmFzaWNfY2xvY2tzW01BWF9DTEtTXTsgcmF0aGVyIHRoYW4gY29uc3QNCnN0cnVjdCBjbGtfYnVs a19kYXRhICpiYXNpY19jbG9ja3M7DQoNClNvIHdoYXQNCg0KLmJhc2ljX2Nsb2NrcyA9IHsNCgl7 IC5pZCA9ICJtbSIgfSwNCn07DQoNCmlzIGNlcnRhaW5seSBsaWtlIGJlbG93DQoNCi5iYXNpY19j bG9ja3MgPSB7DQoJeyAuaWQgPSAibW0iIH0sDQoJeyAuaWQgPSBudWxsIH0sDQoJeyAuaWQgPSBu dWxsIH0sDQp9Ow0KDQpBbmQgdXNpbmcgZGV2bV9jbGtfYnVsa19nZXQoLi4uKTsgdG8gZ2V0IHRo ZSBjbG9jayByZXNvdXJjZSB3aWxsIHJlc3VsdA0KaW4NCg0KYmFzaWNfY2xvY2tzID0gew0KCXsg LmlkID0gIm1tIiwgLiBjbGsgPSA8JnRvcGNrZ2VuIENMS19UT1BfTVVYX01NPn0sDQoJeyAuaWQg PSBudWxsLCAuIGNsayA9IDwmdG9wY2tnZW4gQ0xLX1RPUF9NVVhfQVVEX0lOVEJVUz59LA0KCXsg LmlkID0gbnVsbCwgLiBjbGsgPSA8JnRvcGNrZ2VuIENMS19UT1BfTVVYX0FVRF9JTlRCVVM+fSwN Cn07DQoNCkkgdGhvdWdodCBpdCdzIGluY29ycmVjdCBmb3IgbXkgdXNhZ2UgaW5zaWRlIHRoZSBt dGstc2Nwc3lzLmMNCmFuZCBjdXJyZW50bHkgaG93IGRldm1fY2xrX2J1bGtfZ2V0KC4uLikgd2ls bCBnZXQgdGhlIGNsb2NrIHJlc291cmNlIGlzDQpieSBBUEkgb2ZfcGFyc2VfY2xrc2VwYygpDQoN Ci8qKg0KICogb2ZfcGFyc2VfY2xrc3BlYygpIC0gUGFyc2UgYSBEVCBjbG9jayBzcGVjaWZpZXIg Zm9yIGEgZ2l2ZW4gZGV2aWNlDQogbm9kZQ0KICAqIEBucDogZGV2aWNlIG5vZGUgdG8gcGFyc2Ug Y2xvY2sgc3BlY2lmaWVyIGZyb20NCiAgKiBAaW5kZXg6IGluZGV4IG9mIHBoYW5kbGUgdG8gcGFy c2UgY2xvY2sgb3V0IG9mLiBJZiBpbmRleCA8IDAsIEBuYW1lDQogaXMgdXNlZA0KICAqIEBuYW1l OiBjbG9jayBuYW1lIHRvIGZpbmQgYW5kIHBhcnNlLiBJZiBuYW1lIGlzIE5VTEwsIHRoZSBpbmRl eCBpcw0KIHVzZWQNCg0KQW5kIGZvciBjbG9ja3Mgd2l0aG91dCBnaXZlbiBhIG5hbWUgZmlyc3Qo aWQ9bnVsbCksIHdpbGwgdXNlIHRoZSBpbmRleCAwDQp0byBnZXQgdGhlIGNsb2NrLiBJbiB0aGlz IGV4YW1wbGUsIHRoZSBpbmRleCAwIHdpbGwgbWFwIHRvIDwmdG9wY2tnZW4NCkNMS19UT1BfTVVY X0FVRF9JTlRCVVM+DQoNCklmIHdlIGlnbm9yZSB0aGUgcHJvYmxlbSBhbmQgdXNlIGNsa19idWxr X3ByZXBhcmUoKS9fZW5hYmxlKCkgdG8gY29udHJvbA0KdGhlIGNsb2NrLCBzbyBmYXIsIGNsa19i dWxrX2VuYWJsZSB3aWxsIHRyYXZlcnNlIGFsbCB0aGUgaXRlcmF0b3IgYW5kDQplbmFibGUgdGhl IHVuZXhwZWN0ZWQgY2xvY2tzIHdpdGhvdXQgY2hlY2sgaWYgdGhlIGNsb2NrIGlkKG5hbWUpIGlz DQp2YWxpZCBvciBub3QuDQoNClJpZ2h0IG5vdywgSSdtIG5vdCBzdXJlIHdoeSBvZl9wYXJzZV9j bGtzcGVjKCkgYXNzdW1lIHRvIHVzZSB0aGUgaW5kZXggMA0KaWYgdGhlIG5hbWUgaXMgTlVMTC4g SSBtaWdodCBuZWVkIHNvbWUgdGltZSB0byBkaWcgaXQgb3V0LiBJZiB5b3UgaGF2ZQ0Kc29tZSBp bmZvcm1hdGlvbiBhYm91dCB0aGlzIHBhcnQsIHBsZWFzZSBzaGFyZSBpdCB0byBtZS4gTWFueSB0 aGFua3MuDQoNCg0KPiANCj4gPj4NCj4gPj4+PiAgCQkuYnVzX3Byb3RfbWFzayA9IE1UMjcwMV9U T1BfQVhJX1BST1RfRU5fTU1fTTAsDQo+ID4+Pj4gIAkJLmNhcHMgPSBNVEtfU0NQRF9BQ1RJVkVf V0FLRVVQLA0KPiA+Pj4+ICAJfSwNCj4gPj4+PiBAQCAtNTc4LDcgKzU0NSw3IEBAIHN0YXRpYyB2 b2lkIG10a19yZWdpc3Rlcl9wb3dlcl9kb21haW5zKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBk ZXYsDQo+ID4+Pj4gIAkJLmN0bF9vZmZzID0gU1BNX01GR19QV1JfQ09OLA0KPiA+Pj4+ICAJCS5z cmFtX3Bkbl9iaXRzID0gR0VOTUFTSygxMSwgOCksDQo+ID4+Pj4gIAkJLnNyYW1fcGRuX2Fja19i aXRzID0gR0VOTUFTSygxMiwgMTIpLA0KPiA+Pj4+IC0JCS5jbGtfaWQgPSB7Q0xLX01GR30sDQo+ ID4+Pj4gKwkJLmJhc2ljX2Nsa19uYW1lID0geyJtZmcifSwNCj4gPj4+DQo+ID4+PiAJCS5iYXNp Y19jbG9ja3NbXSA9IHsNCj4gPj4+IAkJCXsgLmlkID0gIm1mZyIgfSwNCj4gPj4+IAkJfTsNCj4g Pj4+DQo+ID4+Pj4gIAkJLmNhcHMgPSBNVEtfU0NQRF9BQ1RJVkVfV0FLRVVQLA0KPiA+Pj4+ICAJ fSwNCj4gPj4+PiAgCVtNVDI3MDFfUE9XRVJfRE9NQUlOX1ZERUNdID0gew0KPiA+Pj4+IEBAIC01 ODcsNyArNTU0LDcgQEAgc3RhdGljIHZvaWQgbXRrX3JlZ2lzdGVyX3Bvd2VyX2RvbWFpbnMoc3Ry dWN0IHBsYXRmb3JtX2RldmljZSAqcGRldiwNCj4gPj4+PiAgCQkuY3RsX29mZnMgPSBTUE1fVkRF X1BXUl9DT04sDQo+ID4+Pj4gIAkJLnNyYW1fcGRuX2JpdHMgPSBHRU5NQVNLKDExLCA4KSwNCj4g Pj4+PiAgCQkuc3JhbV9wZG5fYWNrX2JpdHMgPSBHRU5NQVNLKDEyLCAxMiksDQo+ID4+Pj4gLQkJ LmNsa19pZCA9IHtDTEtfTU19LA0KPiA+Pj4+ICsJCS5iYXNpY19jbGtfbmFtZSA9IHsibW0ifSwN Cj4gPj4+DQo+ID4+PiAuLi4NCj4gPj4+DQo+ID4+PiBbc25pcF0NCj4gPj4NCj4gPj4NCj4gPiAN Cj4gDQo+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fDQo+ IExpbnV4LW1lZGlhdGVrIG1haWxpbmcgbGlzdA0KPiBMaW51eC1tZWRpYXRla0BsaXN0cy5pbmZy YWRlYWQub3JnDQo+IGh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8v bGludXgtbWVkaWF0ZWsNCg0K