Re: [Qemu-devel] [PATCH] Adding support for LPD and LPDG instructions

["Éric Bischoff" <ebischoff@nerim.net>]

Le samedi 25 février 2017, 10:42:43 CET Richard Henderson a écrit :
> On 02/23/2017 10:58 PM, Eric Bischoff wrote:
> > +/* LOAD PAIR DISJOINT */
> > +    C(0xc804, LPD,     SSF,   ILA, m1_32s, m2_32s, 0, r3_P32, movx, 0)
> > +    C(0xc805, LPDG,    SSF,   ILA, m1_64, m2_64, 0, r3_P64, movx, 0)
> 
> Missing is the update to the condition codes.
> I think just setting CC = 3 (not loaded interlocked) is probably fine.

Hi Richard,


thanks a lot for the feedback.

When trying on real hardware, I was always getting CC == 0 (loaded 
interlocked). It seems to be the usual and simplest case, where fetch was 
immediately succesful.

Case CC == 3 makes it needed to use a loop:

       2. When the resulting condition code is 3, the pro-
          gram may branch back to reexecute the LOAD
          PAIR DISJOINT instruction. However, after
          repeated unsuccessful attempts to attain an
          interlocked fetch, the program should use an
          alternate means of serializing access to the stor-
          age operands. It is recommended that the pro-
          gram reexecute the LOAD PAIR DISJOINT no
          more than 10 times before branching to the alter-
          nate path.

Therefore I think that setting CC = 0 is the correct emulation.

I assumed that putting 0 in last column of C() macro was the way to set CC = 
0. I apologize if that was wrong, and if so, please tell me, and I'll correct.


Best,

-- 
Éric Bischoff