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Sat, 19 Sep 2020 07:26:54 -0800 Received: from MTKMBS06N2.mediatek.inc (172.21.101.130) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 19 Sep 2020 08:26:52 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 19 Sep 2020 23:26:50 +0800 Received: from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 19 Sep 2020 23:26:42 +0800 Message-ID: <1600529204.7002.0.camel@mtksdaap41> Subject: Re: [PATCH v2 4/5] spi: spi-mtk-nor: support 36bit dma addressing to mediatek From: Yingjoe Chen To: Ikjoon Jang Date: Sat, 19 Sep 2020 23:26:44 +0800 In-Reply-To: <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> References: <20200918083124.3921207-1-ikjn@chromium.org> <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 46E17E8B4D077AB8C9950FBED0B79A5B30E2719458EBEF71FDC429C6B020E84F2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200919_112714_156061_BD568686 X-CRM114-Status: GOOD ( 23.51 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-spi@vger.kernel.org, Mark Brown , linux-mtd@lists.infradead.org, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Fri, 2020-09-18 at 16:31 +0800, Ikjoon Jang wrote: > This patch enables 36bit dma address support to spi-mtk-nor. > Currently 36bit dma addressing is enabled only for mt8192-nor. > > Signed-off-by: Ikjoon Jang > --- > > (no changes since v1) > > drivers/spi/spi-mtk-nor.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c > index e14798a6e7d0..99dd5dca744e 100644 > --- a/drivers/spi/spi-mtk-nor.c > +++ b/drivers/spi/spi-mtk-nor.c > @@ -78,6 +78,8 @@ > #define MTK_NOR_REG_DMA_FADR 0x71c > #define MTK_NOR_REG_DMA_DADR 0x720 > #define MTK_NOR_REG_DMA_END_DADR 0x724 > +#define MTK_NOR_REG_DMA_DADR_HB 0x738 > +#define MTK_NOR_REG_DMA_END_DADR_HB 0x73c > > #define MTK_NOR_PRG_MAX_SIZE 6 > // Reading DMA src/dst addresses have to be 16-byte aligned > @@ -102,6 +104,7 @@ struct mtk_nor { > unsigned int spi_freq; > bool wbuf_en; > bool has_irq; > + bool high_dma; > struct completion op_done; > }; > > @@ -291,6 +294,11 @@ static int read_dma(struct mtk_nor *sp, u32 from, unsigned int length, > writel(dma_addr, sp->base + MTK_NOR_REG_DMA_DADR); > writel(dma_addr + length, sp->base + MTK_NOR_REG_DMA_END_DADR); > > + if (sp->high_dma) { > + writel(dma_addr >> 32, sp->base + MTK_NOR_REG_DMA_DADR_HB); > + writel((dma_addr + length) >> 32, sp->base + MTK_NOR_REG_DMA_END_DADR_HB); > + } > + > if (sp->has_irq) { > reinit_completion(&sp->op_done); > mtk_nor_rmw(sp, MTK_NOR_REG_IRQ_EN, MTK_NOR_IRQ_DMA, 0); > @@ -594,7 +602,8 @@ static const struct spi_controller_mem_ops mtk_nor_mem_ops = { > }; > > static const struct of_device_id mtk_nor_match[] = { > - { .compatible = "mediatek,mt8173-nor" }, > + { .compatible = "mediatek,mt8192-nor", .data = (void *)36 }, > + { .compatible = "mediatek,mt8173-nor", .data = (void *)32 }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, mtk_nor_match); > @@ -607,6 +616,7 @@ static int mtk_nor_probe(struct platform_device *pdev) > u8 *buffer; > struct clk *spi_clk, *ctlr_clk; > int ret, irq; > + unsigned long dma_bits; > > base = devm_platform_ioremap_resource(pdev, 0); > if (IS_ERR(base)) > @@ -623,6 +633,13 @@ static int mtk_nor_probe(struct platform_device *pdev) > buffer = devm_kmalloc(&pdev->dev, > MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN, > GFP_KERNEL); > + > + dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev); > + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits))) { > + dev_err(&pdev->dev, "failed to set dma mask(%lu)\n", dma_bits); > + return -EINVAL; > + } > + Do we need to set sp->high_dma when we have >32bits DMA? Joe.C _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDCE1C43464 for ; Sat, 19 Sep 2020 15:28:14 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4FAC12098B for ; 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Sat, 19 Sep 2020 23:26:42 +0800 Message-ID: <1600529204.7002.0.camel@mtksdaap41> Subject: Re: [PATCH v2 4/5] spi: spi-mtk-nor: support 36bit dma addressing to mediatek From: Yingjoe Chen To: Ikjoon Jang Date: Sat, 19 Sep 2020 23:26:44 +0800 In-Reply-To: <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> References: <20200918083124.3921207-1-ikjn@chromium.org> <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 46E17E8B4D077AB8C9950FBED0B79A5B30E2719458EBEF71FDC429C6B020E84F2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200919_112714_156061_BD568686 X-CRM114-Status: GOOD ( 23.51 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-spi@vger.kernel.org, Mark Brown , linux-mtd@lists.infradead.org, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On Fri, 2020-09-18 at 16:31 +0800, Ikjoon Jang wrote: > This patch enables 36bit dma address support to spi-mtk-nor. > Currently 36bit dma addressing is enabled only for mt8192-nor. > > Signed-off-by: Ikjoon Jang > --- > > (no changes since v1) > > drivers/spi/spi-mtk-nor.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c > index e14798a6e7d0..99dd5dca744e 100644 > --- a/drivers/spi/spi-mtk-nor.c > +++ b/drivers/spi/spi-mtk-nor.c > @@ -78,6 +78,8 @@ > #define MTK_NOR_REG_DMA_FADR 0x71c > #define MTK_NOR_REG_DMA_DADR 0x720 > #define MTK_NOR_REG_DMA_END_DADR 0x724 > +#define MTK_NOR_REG_DMA_DADR_HB 0x738 > +#define MTK_NOR_REG_DMA_END_DADR_HB 0x73c > > #define MTK_NOR_PRG_MAX_SIZE 6 > // Reading DMA src/dst addresses have to be 16-byte aligned > @@ -102,6 +104,7 @@ struct mtk_nor { > unsigned int spi_freq; > bool wbuf_en; > bool has_irq; > + bool high_dma; > struct completion op_done; > }; > > @@ -291,6 +294,11 @@ static int read_dma(struct mtk_nor *sp, u32 from, unsigned int length, > writel(dma_addr, sp->base + MTK_NOR_REG_DMA_DADR); > writel(dma_addr + length, sp->base + MTK_NOR_REG_DMA_END_DADR); > > + if (sp->high_dma) { > + writel(dma_addr >> 32, sp->base + MTK_NOR_REG_DMA_DADR_HB); > + writel((dma_addr + length) >> 32, sp->base + MTK_NOR_REG_DMA_END_DADR_HB); > + } > + > if (sp->has_irq) { > reinit_completion(&sp->op_done); > mtk_nor_rmw(sp, MTK_NOR_REG_IRQ_EN, MTK_NOR_IRQ_DMA, 0); > @@ -594,7 +602,8 @@ static const struct spi_controller_mem_ops mtk_nor_mem_ops = { > }; > > static const struct of_device_id mtk_nor_match[] = { > - { .compatible = "mediatek,mt8173-nor" }, > + { .compatible = "mediatek,mt8192-nor", .data = (void *)36 }, > + { .compatible = "mediatek,mt8173-nor", .data = (void *)32 }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, mtk_nor_match); > @@ -607,6 +616,7 @@ static int mtk_nor_probe(struct platform_device *pdev) > u8 *buffer; > struct clk *spi_clk, *ctlr_clk; > int ret, irq; > + unsigned long dma_bits; > > base = devm_platform_ioremap_resource(pdev, 0); > if (IS_ERR(base)) > @@ -623,6 +633,13 @@ static int mtk_nor_probe(struct platform_device *pdev) > buffer = devm_kmalloc(&pdev->dev, > MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN, > GFP_KERNEL); > + > + dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev); > + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits))) { > + dev_err(&pdev->dev, "failed to set dma mask(%lu)\n", dma_bits); > + return -EINVAL; > + } > + Do we need to set sp->high_dma when we have >32bits DMA? Joe.C ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88F38C43464 for ; Sat, 19 Sep 2020 15:32:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 468AE2098B for ; Sat, 19 Sep 2020 15:32:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass 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X-UUID: cd6e87128bfa48b7ab029e7556ad1be4-20200919 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1990299331; Sat, 19 Sep 2020 23:26:52 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 19 Sep 2020 23:26:50 +0800 Received: from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 19 Sep 2020 23:26:42 +0800 Message-ID: <1600529204.7002.0.camel@mtksdaap41> Subject: Re: [PATCH v2 4/5] spi: spi-mtk-nor: support 36bit dma addressing to mediatek From: Yingjoe Chen To: Ikjoon Jang CC: Rob Herring , Mark Brown , , , , Matthias Brugger , , , Date: Sat, 19 Sep 2020 23:26:44 +0800 In-Reply-To: <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> References: <20200918083124.3921207-1-ikjn@chromium.org> <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 46E17E8B4D077AB8C9950FBED0B79A5B30E2719458EBEF71FDC429C6B020E84F2000:8 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org T24gRnJpLCAyMDIwLTA5LTE4IGF0IDE2OjMxICswODAwLCBJa2pvb24gSmFuZyB3cm90ZToNCj4g VGhpcyBwYXRjaCBlbmFibGVzIDM2Yml0IGRtYSBhZGRyZXNzIHN1cHBvcnQgdG8gc3BpLW10ay1u b3IuDQo+IEN1cnJlbnRseSAzNmJpdCBkbWEgYWRkcmVzc2luZyBpcyBlbmFibGVkIG9ubHkgZm9y IG10ODE5Mi1ub3IuDQo+IA0KPiBTaWduZWQtb2ZmLWJ5OiBJa2pvb24gSmFuZyA8aWtqbkBjaHJv bWl1bS5vcmc+DQo+IC0tLQ0KPiANCj4gKG5vIGNoYW5nZXMgc2luY2UgdjEpDQo+IA0KPiAgZHJp dmVycy9zcGkvc3BpLW10ay1ub3IuYyB8IDE5ICsrKysrKysrKysrKysrKysrKy0NCj4gIDEgZmls ZSBjaGFuZ2VkLCAxOCBpbnNlcnRpb25zKCspLCAxIGRlbGV0aW9uKC0pDQo+IA0KPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy9zcGkvc3BpLW10ay1ub3IuYyBiL2RyaXZlcnMvc3BpL3NwaS1tdGstbm9y LmMNCj4gaW5kZXggZTE0Nzk4YTZlN2QwLi45OWRkNWRjYTc0NGUgMTAwNjQ0DQo+IC0tLSBhL2Ry aXZlcnMvc3BpL3NwaS1tdGstbm9yLmMNCj4gKysrIGIvZHJpdmVycy9zcGkvc3BpLW10ay1ub3Iu Yw0KPiBAQCAtNzgsNiArNzgsOCBAQA0KPiAgI2RlZmluZSBNVEtfTk9SX1JFR19ETUFfRkFEUgkJ MHg3MWMNCj4gICNkZWZpbmUgTVRLX05PUl9SRUdfRE1BX0RBRFIJCTB4NzIwDQo+ICAjZGVmaW5l IE1US19OT1JfUkVHX0RNQV9FTkRfREFEUgkweDcyNA0KPiArI2RlZmluZSBNVEtfTk9SX1JFR19E TUFfREFEUl9IQgkJMHg3MzgNCj4gKyNkZWZpbmUgTVRLX05PUl9SRUdfRE1BX0VORF9EQURSX0hC CTB4NzNjDQo+ICANCj4gICNkZWZpbmUgTVRLX05PUl9QUkdfTUFYX1NJWkUJCTYNCj4gIC8vIFJl YWRpbmcgRE1BIHNyYy9kc3QgYWRkcmVzc2VzIGhhdmUgdG8gYmUgMTYtYnl0ZSBhbGlnbmVkDQo+ IEBAIC0xMDIsNiArMTA0LDcgQEAgc3RydWN0IG10a19ub3Igew0KPiAgCXVuc2lnbmVkIGludCBz cGlfZnJlcTsNCj4gIAlib29sIHdidWZfZW47DQo+ICAJYm9vbCBoYXNfaXJxOw0KPiArCWJvb2wg aGlnaF9kbWE7DQo+ICAJc3RydWN0IGNvbXBsZXRpb24gb3BfZG9uZTsNCj4gIH07DQo+ICANCj4g QEAgLTI5MSw2ICsyOTQsMTEgQEAgc3RhdGljIGludCByZWFkX2RtYShzdHJ1Y3QgbXRrX25vciAq c3AsIHUzMiBmcm9tLCB1bnNpZ25lZCBpbnQgbGVuZ3RoLA0KPiAgCXdyaXRlbChkbWFfYWRkciwg c3AtPmJhc2UgKyBNVEtfTk9SX1JFR19ETUFfREFEUik7DQo+ICAJd3JpdGVsKGRtYV9hZGRyICsg bGVuZ3RoLCBzcC0+YmFzZSArIE1US19OT1JfUkVHX0RNQV9FTkRfREFEUik7DQo+ICANCj4gKwlp ZiAoc3AtPmhpZ2hfZG1hKSB7DQo+ICsJCXdyaXRlbChkbWFfYWRkciA+PiAzMiwgc3AtPmJhc2Ug KyBNVEtfTk9SX1JFR19ETUFfREFEUl9IQik7DQo+ICsJCXdyaXRlbCgoZG1hX2FkZHIgKyBsZW5n dGgpID4+IDMyLCBzcC0+YmFzZSArIE1US19OT1JfUkVHX0RNQV9FTkRfREFEUl9IQik7DQo+ICsJ fQ0KPiArDQo+ICAJaWYgKHNwLT5oYXNfaXJxKSB7DQo+ICAJCXJlaW5pdF9jb21wbGV0aW9uKCZz cC0+b3BfZG9uZSk7DQo+ICAJCW10a19ub3Jfcm13KHNwLCBNVEtfTk9SX1JFR19JUlFfRU4sIE1U S19OT1JfSVJRX0RNQSwgMCk7DQo+IEBAIC01OTQsNyArNjAyLDggQEAgc3RhdGljIGNvbnN0IHN0 cnVjdCBzcGlfY29udHJvbGxlcl9tZW1fb3BzIG10a19ub3JfbWVtX29wcyA9IHsNCj4gIH07DQo+ ICANCj4gIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgb2ZfZGV2aWNlX2lkIG10a19ub3JfbWF0Y2hbXSA9 IHsNCj4gLQl7IC5jb21wYXRpYmxlID0gIm1lZGlhdGVrLG10ODE3My1ub3IiIH0sDQo+ICsJeyAu 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id 1kJeld-0000j1-3I; Sat, 19 Sep 2020 15:27:15 +0000 X-UUID: 13ed17d77ef34e06a9bc351a089705f4-20200919 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=IrIcNVhFVMWRbTHiVNPXL4VIQ4/x908yIeAq6qk9Ekc=; b=AkC4jDUGvMpB3L53ZdH1ue0FGSgGFs0n4j/r6cPjzBdoxCITafuHL1+KZakmoORsWbVBlIBD+Z+jxGoFMGRMt3JL8uVKSby43kwv/ZBVGx9o7SRkI4MdleN8ZkXPUF3oVHclKUJDTfdCQial5DRmFTjC0CrOqxeEsQbfCpWVeAQ=; X-UUID: 13ed17d77ef34e06a9bc351a089705f4-20200919 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1125254471; Sat, 19 Sep 2020 07:26:54 -0800 Received: from MTKMBS06N2.mediatek.inc (172.21.101.130) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 19 Sep 2020 08:26:52 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 19 Sep 2020 23:26:50 +0800 Received: from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 19 Sep 2020 23:26:42 +0800 Message-ID: <1600529204.7002.0.camel@mtksdaap41> Subject: Re: [PATCH v2 4/5] spi: spi-mtk-nor: support 36bit dma addressing to mediatek From: Yingjoe Chen To: Ikjoon Jang Date: Sat, 19 Sep 2020 23:26:44 +0800 In-Reply-To: <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> References: <20200918083124.3921207-1-ikjn@chromium.org> <20200918162834.v2.4.Id1cb208392928afc7ceed4de06924243c7858cd0@changeid> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 46E17E8B4D077AB8C9950FBED0B79A5B30E2719458EBEF71FDC429C6B020E84F2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200919_112714_156061_BD568686 X-CRM114-Status: GOOD ( 23.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-spi@vger.kernel.org, Mark Brown , linux-mtd@lists.infradead.org, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 2020-09-18 at 16:31 +0800, Ikjoon Jang wrote: > This patch enables 36bit dma address support to spi-mtk-nor. > Currently 36bit dma addressing is enabled only for mt8192-nor. > > Signed-off-by: Ikjoon Jang > --- > > (no changes since v1) > > drivers/spi/spi-mtk-nor.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c > index e14798a6e7d0..99dd5dca744e 100644 > --- a/drivers/spi/spi-mtk-nor.c > +++ b/drivers/spi/spi-mtk-nor.c > @@ -78,6 +78,8 @@ > #define MTK_NOR_REG_DMA_FADR 0x71c > #define MTK_NOR_REG_DMA_DADR 0x720 > #define MTK_NOR_REG_DMA_END_DADR 0x724 > +#define MTK_NOR_REG_DMA_DADR_HB 0x738 > +#define MTK_NOR_REG_DMA_END_DADR_HB 0x73c > > #define MTK_NOR_PRG_MAX_SIZE 6 > // Reading DMA src/dst addresses have to be 16-byte aligned > @@ -102,6 +104,7 @@ struct mtk_nor { > unsigned int spi_freq; > bool wbuf_en; > bool has_irq; > + bool high_dma; > struct completion op_done; > }; > > @@ -291,6 +294,11 @@ static int read_dma(struct mtk_nor *sp, u32 from, unsigned int length, > writel(dma_addr, sp->base + MTK_NOR_REG_DMA_DADR); > writel(dma_addr + length, sp->base + MTK_NOR_REG_DMA_END_DADR); > > + if (sp->high_dma) { > + writel(dma_addr >> 32, sp->base + MTK_NOR_REG_DMA_DADR_HB); > + writel((dma_addr + length) >> 32, sp->base + MTK_NOR_REG_DMA_END_DADR_HB); > + } > + > if (sp->has_irq) { > reinit_completion(&sp->op_done); > mtk_nor_rmw(sp, MTK_NOR_REG_IRQ_EN, MTK_NOR_IRQ_DMA, 0); > @@ -594,7 +602,8 @@ static const struct spi_controller_mem_ops mtk_nor_mem_ops = { > }; > > static const struct of_device_id mtk_nor_match[] = { > - { .compatible = "mediatek,mt8173-nor" }, > + { .compatible = "mediatek,mt8192-nor", .data = (void *)36 }, > + { .compatible = "mediatek,mt8173-nor", .data = (void *)32 }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, mtk_nor_match); > @@ -607,6 +616,7 @@ static int mtk_nor_probe(struct platform_device *pdev) > u8 *buffer; > struct clk *spi_clk, *ctlr_clk; > int ret, irq; > + unsigned long dma_bits; > > base = devm_platform_ioremap_resource(pdev, 0); > if (IS_ERR(base)) > @@ -623,6 +633,13 @@ static int mtk_nor_probe(struct platform_device *pdev) > buffer = devm_kmalloc(&pdev->dev, > MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN, > GFP_KERNEL); > + > + dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev); > + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits))) { > + dev_err(&pdev->dev, "failed to set dma mask(%lu)\n", dma_bits); > + return -EINVAL; > + } > + Do we need to set sp->high_dma when we have >32bits DMA? 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