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Mon, 30 Nov 2020 19:16:35 -0800 Received: from MTKMBS31N1.mediatek.inc (172.27.4.69) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 30 Nov 2020 19:06:46 -0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 1 Dec 2020 11:06:44 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 1 Dec 2020 11:06:43 +0800 Message-ID: <1606792003.14736.63.camel@mhfsdcap03> Subject: Re: [v4,2/3] PCI: mediatek: Add new generation controller support From: Jianjun Wang To: Bjorn Helgaas Date: Tue, 1 Dec 2020 11:06:43 +0800 In-Reply-To: <20201130173005.GA1088958@bjorn-Precision-5520> References: <20201130173005.GA1088958@bjorn-Precision-5520> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: FC451FC4603DE65A509FD6378268318300EC02B2017977A484F41EC915355B5E2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201130_222821_827366_A41AE486 X-CRM114-Status: GOOD ( 32.59 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Lorenzo Pieralisi , qizhong.cheng@mediatek.com, chuanjia.liu@mediatek.com, Mauro Carvalho Chehab , linux-pci@vger.kernel.org, Ryder Lee , linux-kernel@vger.kernel.org, Matthias Brugger , Sj Huang , Rob Herring , linux-mediatek@lists.infradead.org, Philipp Zabel , Bjorn Helgaas , Lukas Wunner , sin_jieyang@mediatek.com, davem@davemloft.net, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Mon, 2020-11-30 at 11:30 -0600, Bjorn Helgaas wrote: > [+cc Lukas, pciehp power control question] > > On Mon, Nov 23, 2020 at 02:45:13PM +0800, Jianjun Wang wrote: > > On Thu, 2020-11-19 at 14:28 -0600, Bjorn Helgaas wrote: > > > "Add new generation" really contains no information. And "mediatek" > > > is already used for the pcie-mediatek.c driver, so we should have a > > > new tag for this new driver. Include useful information in the > > > subject, e.g., > > > > > > PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192 > > > > > +static int mtk_pcie_setup(struct mtk_pcie_port *port) > > > > +{ > > > > + struct device *dev = port->dev; > > > > + struct platform_device *pdev = to_platform_device(dev); > > > > + struct resource *regs; > > > > + int err; > > > > + > > > > + regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcie-mac"); > > > > + port->base = devm_ioremap_resource(dev, regs); > > > > + if (IS_ERR(port->base)) { > > > > + dev_notice(dev, "failed to map register base\n"); > > > > + return PTR_ERR(port->base); > > > > + } > > > > + > > > > + port->reg_base = regs->start; > > > > + > > > > + /* Don't touch the hardware registers before power up */ > > > > + err = mtk_pcie_power_up(port); > > > > + if (err) > > > > + return err; > > > > + > > > > + /* Try link up */ > > > > + err = mtk_pcie_startup_port(port); > > > > + if (err) { > > > > + dev_notice(dev, "PCIe link down\n"); > > > > + goto err_setup; > > > > > > Generally it should not be a fatal error if the link is not up at > > > probe-time. You may be able to hot-add a device, or the device may > > > have some external power control that will power it up later. > > > > This is for the power saving requirement. If there is no device > > connected with the PCIe slot, the PCIe MAC and PHY should be powered > > off. > > > > Is there any standard flow to support power down the hardware at > > probe-time if no device is connected and power it up when hot-add a > > device? > > That's a good question. I assume this looks like a standard PCIe > hot-add event? > > When you hot-add a device, does the Root Port generate a Presence > Detect Changed interrupt? The pciehp driver should field that > interrupt and turn on power to the slot via the Power Controller > Control bit in the Slot Control register. > > Does your hardware require something more than that to control the MAC > and PHY power? > > Bjorn The hardware support to generate a Presence Detect Changed interrupt when hot-add a device. But it seems that we should keep the PHY's power and clocks to ensure the data link layer state change can be detected, and keep the MAC layer active for routing the interrupt event to pciehp driver handler. For the power saving requirement, the modules that is not used when probe-time must be powered off, so I think we may not support hot-plug in this case. Thanks _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38FE4C64E90 for ; Tue, 1 Dec 2020 03:07:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CCCAE2087C for ; Tue, 1 Dec 2020 03:07:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="fb2t/M/V" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727205AbgLADHd (ORCPT ); Mon, 30 Nov 2020 22:07:33 -0500 Received: from Mailgw01.mediatek.com ([1.203.163.78]:27005 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725859AbgLADHd (ORCPT ); Mon, 30 Nov 2020 22:07:33 -0500 X-UUID: 7464e83b8bdc40c49f65b53555b423d8-20201201 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=2aXVN+zVHNxxltuwnwGBJajzVvMc3w46iOtEkP3tAkc=; b=fb2t/M/VJUhauyRALv1pYceOCzyqIjsT/M++V0qELJcw/YxNKaIiTtbLhF99+GVIxxC0aCov9WcEm4RVRu17Dtilvc8kdAjQhY/izNJNEsfVh9ILb6XuuZCAeSZRaKewo+FG130KcNfyeRwAwfSzRyw9ggF8LWjnO7+xk0TXRG4=; X-UUID: 7464e83b8bdc40c49f65b53555b423d8-20201201 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1228097533; Tue, 01 Dec 2020 11:06:45 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 1 Dec 2020 11:06:44 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 1 Dec 2020 11:06:43 +0800 Message-ID: <1606792003.14736.63.camel@mhfsdcap03> Subject: Re: [v4,2/3] PCI: mediatek: Add new generation controller support From: Jianjun Wang To: Bjorn Helgaas CC: Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , Ryder Lee , Philipp Zabel , "Matthias Brugger" , Mauro Carvalho Chehab , , , , , , , Sj Huang , , , , , Lukas Wunner Date: Tue, 1 Dec 2020 11:06:43 +0800 In-Reply-To: <20201130173005.GA1088958@bjorn-Precision-5520> References: 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2020 19:06:46 -0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 1 Dec 2020 11:06:44 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 1 Dec 2020 11:06:43 +0800 Message-ID: <1606792003.14736.63.camel@mhfsdcap03> Subject: Re: [v4,2/3] PCI: mediatek: Add new generation controller support From: Jianjun Wang To: Bjorn Helgaas Date: Tue, 1 Dec 2020 11:06:43 +0800 In-Reply-To: <20201130173005.GA1088958@bjorn-Precision-5520> References: <20201130173005.GA1088958@bjorn-Precision-5520> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: FC451FC4603DE65A509FD6378268318300EC02B2017977A484F41EC915355B5E2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201130_222821_827366_A41AE486 X-CRM114-Status: GOOD ( 32.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Lorenzo Pieralisi , qizhong.cheng@mediatek.com, chuanjia.liu@mediatek.com, Mauro Carvalho Chehab , linux-pci@vger.kernel.org, Ryder Lee , linux-kernel@vger.kernel.org, Matthias Brugger , Sj Huang , Rob Herring , linux-mediatek@lists.infradead.org, Philipp Zabel , Bjorn Helgaas , Lukas Wunner , sin_jieyang@mediatek.com, davem@davemloft.net, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2020-11-30 at 11:30 -0600, Bjorn Helgaas wrote: > [+cc Lukas, pciehp power control question] > > On Mon, Nov 23, 2020 at 02:45:13PM +0800, Jianjun Wang wrote: > > On Thu, 2020-11-19 at 14:28 -0600, Bjorn Helgaas wrote: > > > "Add new generation" really contains no information. And "mediatek" > > > is already used for the pcie-mediatek.c driver, so we should have a > > > new tag for this new driver. Include useful information in the > > > subject, e.g., > > > > > > PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192 > > > > > +static int mtk_pcie_setup(struct mtk_pcie_port *port) > > > > +{ > > > > + struct device *dev = port->dev; > > > > + struct platform_device *pdev = to_platform_device(dev); > > > > + struct resource *regs; > > > > + int err; > > > > + > > > > + regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcie-mac"); > > > > + port->base = devm_ioremap_resource(dev, regs); > > > > + if (IS_ERR(port->base)) { > > > > + dev_notice(dev, "failed to map register base\n"); > > > > + return PTR_ERR(port->base); > > > > + } > > > > + > > > > + port->reg_base = regs->start; > > > > + > > > > + /* Don't touch the hardware registers before power up */ > > > > + err = mtk_pcie_power_up(port); > > > > + if (err) > > > > + return err; > > > > + > > > > + /* Try link up */ > > > > + err = mtk_pcie_startup_port(port); > > > > + if (err) { > > > > + dev_notice(dev, "PCIe link down\n"); > > > > + goto err_setup; > > > > > > Generally it should not be a fatal error if the link is not up at > > > probe-time. You may be able to hot-add a device, or the device may > > > have some external power control that will power it up later. > > > > This is for the power saving requirement. If there is no device > > connected with the PCIe slot, the PCIe MAC and PHY should be powered > > off. > > > > Is there any standard flow to support power down the hardware at > > probe-time if no device is connected and power it up when hot-add a > > device? > > That's a good question. I assume this looks like a standard PCIe > hot-add event? > > When you hot-add a device, does the Root Port generate a Presence > Detect Changed interrupt? The pciehp driver should field that > interrupt and turn on power to the slot via the Power Controller > Control bit in the Slot Control register. > > Does your hardware require something more than that to control the MAC > and PHY power? > > Bjorn The hardware support to generate a Presence Detect Changed interrupt when hot-add a device. But it seems that we should keep the PHY's power and clocks to ensure the data link layer state change can be detected, and keep the MAC layer active for routing the interrupt event to pciehp driver handler. For the power saving requirement, the modules that is not used when probe-time must be powered off, so I think we may not support hot-plug in this case. Thanks _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel