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mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 235720789; Wed, 27 Jan 2021 22:18:02 -0800 Received: from MTKMBS31N2.mediatek.inc (172.27.4.87) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 22:18:00 -0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Jan 2021 14:17:53 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 28 Jan 2021 14:17:53 +0800 Message-ID: <1611814673.28312.10.camel@mtksdaap41> Subject: Re: [PATCH v10 9/9] drm/mediatek: add support for mediatek SOC MT8183 From: CK Hu To: Hsin-Yi Wang Date: Thu, 28 Jan 2021 14:17:53 +0800 In-Reply-To: <20210127045422.2418917-10-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> <20210127045422.2418917-10-hsinyi@chromium.org> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: C777708033CD168A1AAC5B786F1DFA5848CB97E50C292601B42893BA975571EC2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210128_011807_940778_F3AEE5D6 X-CRM114-Status: GOOD ( 17.93 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Philipp Zabel , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Yongqiang Niu , Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, Daniel Vetter , Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi, Hsin-Yi: On Wed, 2021-01-27 at 12:54 +0800, Hsin-Yi Wang wrote: > From: Yongqiang Niu > > 1. add ovl private data > 2. add rdma private data > 3. add gamma privte data > 4. add main and external path module for crtc create Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > Signed-off-by: Hsin-Yi Wang > --- > drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 1 + > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18 +++++++++ > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++ > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 45 +++++++++++++++++++++++ > 4 files changed, 70 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > index c98fe284265d0..93ad76a2dda5e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > @@ -179,6 +179,7 @@ static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = { > static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = { > { .compatible = "mediatek,mt8173-disp-gamma", > .data = &mt8173_gamma_driver_data}, > + { .compatible = "mediatek,mt8183-disp-gamma"}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > index 1c295c58a5e82..da7e38a28759b 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > @@ -424,11 +424,29 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { > .fmt_rgb565_is_0 = true, > }; > > +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = { > + .addr = DISP_REG_OVL_ADDR_MT8173, > + .gmc_bits = 10, > + .layer_nr = 4, > + .fmt_rgb565_is_0 = true, > +}; > + > +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = { > + .addr = DISP_REG_OVL_ADDR_MT8173, > + .gmc_bits = 10, > + .layer_nr = 2, > + .fmt_rgb565_is_0 = true, > +}; > + > static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-ovl", > .data = &mt2701_ovl_driver_data}, > { .compatible = "mediatek,mt8173-disp-ovl", > .data = &mt8173_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl", > + .data = &mt8183_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl-2l", > + .data = &mt8183_ovl_2l_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index 04b9542010b00..29fa5f3a05c30 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -355,11 +355,17 @@ static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = { > .fifo_size = SZ_8K, > }; > > +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = { > + .fifo_size = 5 * SZ_1K, > +}; > + > static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-rdma", > .data = &mt2701_rdma_driver_data}, > { .compatible = "mediatek,mt8173-disp-rdma", > .data = &mt8173_rdma_driver_data}, > + { .compatible = "mediatek,mt8183-disp-rdma", > + .data = &mt8183_rdma_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > index 279d3e6f11563..486e73e675ad5 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > @@ -129,6 +129,24 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { > DDP_COMPONENT_DPI0, > }; > > +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = { > + DDP_COMPONENT_OVL0, > + DDP_COMPONENT_OVL_2L0, > + DDP_COMPONENT_RDMA0, > + DDP_COMPONENT_COLOR0, > + DDP_COMPONENT_CCORR, > + DDP_COMPONENT_AAL0, > + DDP_COMPONENT_GAMMA, > + DDP_COMPONENT_DITHER, > + DDP_COMPONENT_DSI0, > +}; > + > +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = { > + DDP_COMPONENT_OVL_2L1, > + DDP_COMPONENT_RDMA1, > + DDP_COMPONENT_DPI0, > +}; > + > static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { > .main_path = mt2701_mtk_ddp_main, > .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), > @@ -161,6 +179,13 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { > .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), > }; > > +static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { > + .main_path = mt8183_mtk_ddp_main, > + .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main), > + .ext_path = mt8183_mtk_ddp_ext, > + .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext), > +}; > + > static int mtk_drm_kms_init(struct drm_device *drm) > { > struct mtk_drm_private *private = drm->dev_private; > @@ -375,12 +400,20 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DISP_OVL }, > { .compatible = "mediatek,mt8173-disp-ovl", > .data = (void *)MTK_DISP_OVL }, > + { .compatible = "mediatek,mt8183-disp-ovl", > + .data = (void *)MTK_DISP_OVL }, > + { .compatible = "mediatek,mt8183-disp-ovl-2l", > + .data = (void *)MTK_DISP_OVL_2L }, > { .compatible = "mediatek,mt2701-disp-rdma", > .data = (void *)MTK_DISP_RDMA }, > { .compatible = "mediatek,mt8173-disp-rdma", > .data = (void *)MTK_DISP_RDMA }, > + { .compatible = "mediatek,mt8183-disp-rdma", > + .data = (void *)MTK_DISP_RDMA }, > { .compatible = "mediatek,mt8173-disp-wdma", > .data = (void *)MTK_DISP_WDMA }, > + { .compatible = "mediatek,mt8183-disp-ccorr", > + .data = (void *)MTK_DISP_CCORR }, > { .compatible = "mediatek,mt2701-disp-color", > .data = (void *)MTK_DISP_COLOR }, > { .compatible = "mediatek,mt8173-disp-color", > @@ -389,22 +422,32 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DISP_AAL}, > { .compatible = "mediatek,mt8173-disp-gamma", > .data = (void *)MTK_DISP_GAMMA, }, > + { .compatible = "mediatek,mt8183-disp-gamma", > + .data = (void *)MTK_DISP_GAMMA, }, > + { .compatible = "mediatek,mt8183-disp-dither", > + .data = (void *)MTK_DISP_DITHER }, > { .compatible = "mediatek,mt8173-disp-ufoe", > .data = (void *)MTK_DISP_UFOE }, > { .compatible = "mediatek,mt2701-dsi", > .data = (void *)MTK_DSI }, > { .compatible = "mediatek,mt8173-dsi", > .data = (void *)MTK_DSI }, > + { .compatible = "mediatek,mt8183-dsi", > + .data = (void *)MTK_DSI }, > { .compatible = "mediatek,mt2701-dpi", > .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt8173-dpi", > .data = (void *)MTK_DPI }, > + { .compatible = "mediatek,mt8183-dpi", > + .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt2701-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt2712-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt8173-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > + { .compatible = "mediatek,mt8183-disp-mutex", > + .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt2701-disp-pwm", > .data = (void *)MTK_DISP_BLS }, > { .compatible = "mediatek,mt8173-disp-pwm", > @@ -423,6 +466,8 @@ static const struct of_device_id mtk_drm_of_ids[] = { > .data = &mt2712_mmsys_driver_data}, > { .compatible = "mediatek,mt8173-mmsys", > .data = &mt8173_mmsys_driver_data}, > + { .compatible = "mediatek,mt8183-mmsys", > + .data = &mt8183_mmsys_driver_data}, > { } > }; > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, 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([216.200.240.185]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l50d5-0002Rb-Lb; Thu, 28 Jan 2021 06:18:08 +0000 X-UUID: ed04779ab48c46a19528ebb8bb362565-20210127 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=yH+gBipO9hOQRZvMiK6UDJurGb4rGh2uSo1RfKfHNr4=; b=KAEmOXWsiUFzjz1k1G+8SjHI61P1odTYjNHHVllO0qdkV7zEm1Fci1PfuWVgkZi05rgRjgXSLKgKFdRGGqMTFcPyo7dfcaIBMM2Q1GbF8sgkU0FQY727rRT+f3LR11GHF7IQ9JQIu9B8G1OqcKyRlo3mEYNtsYMc9Fj++Pu1s5Q=; X-UUID: ed04779ab48c46a19528ebb8bb362565-20210127 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 235720789; Wed, 27 Jan 2021 22:18:02 -0800 Received: from MTKMBS31N2.mediatek.inc (172.27.4.87) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 22:18:00 -0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Jan 2021 14:17:53 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 28 Jan 2021 14:17:53 +0800 Message-ID: <1611814673.28312.10.camel@mtksdaap41> Subject: Re: [PATCH v10 9/9] drm/mediatek: add support for mediatek SOC MT8183 From: CK Hu To: Hsin-Yi Wang Date: Thu, 28 Jan 2021 14:17:53 +0800 In-Reply-To: <20210127045422.2418917-10-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> <20210127045422.2418917-10-hsinyi@chromium.org> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: C777708033CD168A1AAC5B786F1DFA5848CB97E50C292601B42893BA975571EC2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210128_011807_940778_F3AEE5D6 X-CRM114-Status: GOOD ( 17.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Philipp Zabel , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Yongqiang Niu , Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, Daniel Vetter , Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Hsin-Yi: On Wed, 2021-01-27 at 12:54 +0800, Hsin-Yi Wang wrote: > From: Yongqiang Niu > > 1. add ovl private data > 2. add rdma private data > 3. add gamma privte data > 4. add main and external path module for crtc create Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > Signed-off-by: Hsin-Yi Wang > --- > drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 1 + > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18 +++++++++ > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++ > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 45 +++++++++++++++++++++++ > 4 files changed, 70 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > index c98fe284265d0..93ad76a2dda5e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > @@ -179,6 +179,7 @@ static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = { > static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = { > { .compatible = "mediatek,mt8173-disp-gamma", > .data = &mt8173_gamma_driver_data}, > + { .compatible = "mediatek,mt8183-disp-gamma"}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > index 1c295c58a5e82..da7e38a28759b 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > @@ -424,11 +424,29 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { > .fmt_rgb565_is_0 = true, > }; > > +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = { > + .addr = DISP_REG_OVL_ADDR_MT8173, > + .gmc_bits = 10, > + .layer_nr = 4, > + .fmt_rgb565_is_0 = true, > +}; > + > +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = { > + .addr = DISP_REG_OVL_ADDR_MT8173, > + .gmc_bits = 10, > + .layer_nr = 2, > + .fmt_rgb565_is_0 = true, > +}; > + > static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-ovl", > .data = &mt2701_ovl_driver_data}, > { .compatible = "mediatek,mt8173-disp-ovl", > .data = &mt8173_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl", > + .data = &mt8183_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl-2l", > + .data = &mt8183_ovl_2l_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index 04b9542010b00..29fa5f3a05c30 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -355,11 +355,17 @@ static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = { > .fifo_size = SZ_8K, > }; > > +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = { > + .fifo_size = 5 * SZ_1K, > +}; > + > static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-rdma", > .data = &mt2701_rdma_driver_data}, > { .compatible = "mediatek,mt8173-disp-rdma", > .data = &mt8173_rdma_driver_data}, > + { .compatible = "mediatek,mt8183-disp-rdma", > + .data = &mt8183_rdma_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > index 279d3e6f11563..486e73e675ad5 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > @@ -129,6 +129,24 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { > DDP_COMPONENT_DPI0, > }; > > +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = { > + DDP_COMPONENT_OVL0, > + DDP_COMPONENT_OVL_2L0, > + DDP_COMPONENT_RDMA0, > + DDP_COMPONENT_COLOR0, > + DDP_COMPONENT_CCORR, > + DDP_COMPONENT_AAL0, > + DDP_COMPONENT_GAMMA, > + DDP_COMPONENT_DITHER, > + DDP_COMPONENT_DSI0, > +}; > + > +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = { > + DDP_COMPONENT_OVL_2L1, > + DDP_COMPONENT_RDMA1, > + DDP_COMPONENT_DPI0, > +}; > + > static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { > .main_path = mt2701_mtk_ddp_main, > .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), > @@ -161,6 +179,13 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { > .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), > }; > > +static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { > + .main_path = mt8183_mtk_ddp_main, > + .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main), > + .ext_path = mt8183_mtk_ddp_ext, > + .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext), > +}; > + > static int mtk_drm_kms_init(struct drm_device *drm) > { > struct mtk_drm_private *private = drm->dev_private; > @@ -375,12 +400,20 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DISP_OVL }, > { .compatible = "mediatek,mt8173-disp-ovl", > .data = (void *)MTK_DISP_OVL }, > + { .compatible = "mediatek,mt8183-disp-ovl", > + .data = (void *)MTK_DISP_OVL }, > + { .compatible = "mediatek,mt8183-disp-ovl-2l", > + .data = (void *)MTK_DISP_OVL_2L }, > { .compatible = "mediatek,mt2701-disp-rdma", > .data = (void *)MTK_DISP_RDMA }, > { .compatible = "mediatek,mt8173-disp-rdma", > .data = (void *)MTK_DISP_RDMA }, > + { .compatible = "mediatek,mt8183-disp-rdma", > + .data = (void *)MTK_DISP_RDMA }, > { .compatible = "mediatek,mt8173-disp-wdma", > .data = (void *)MTK_DISP_WDMA }, > + { .compatible = "mediatek,mt8183-disp-ccorr", > + .data = (void *)MTK_DISP_CCORR }, > { .compatible = "mediatek,mt2701-disp-color", > .data = (void *)MTK_DISP_COLOR }, > { .compatible = "mediatek,mt8173-disp-color", > @@ -389,22 +422,32 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DISP_AAL}, > { .compatible = "mediatek,mt8173-disp-gamma", > .data = (void *)MTK_DISP_GAMMA, }, > + { .compatible = "mediatek,mt8183-disp-gamma", > + .data = (void *)MTK_DISP_GAMMA, }, > + { .compatible = "mediatek,mt8183-disp-dither", > + .data = (void *)MTK_DISP_DITHER }, > { .compatible = "mediatek,mt8173-disp-ufoe", > .data = (void *)MTK_DISP_UFOE }, > { .compatible = "mediatek,mt2701-dsi", > .data = (void *)MTK_DSI }, > { .compatible = "mediatek,mt8173-dsi", > .data = (void *)MTK_DSI }, > + { .compatible = "mediatek,mt8183-dsi", > + .data = (void *)MTK_DSI }, > { .compatible = "mediatek,mt2701-dpi", > .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt8173-dpi", > .data = (void *)MTK_DPI }, > + { .compatible = "mediatek,mt8183-dpi", > + .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt2701-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt2712-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt8173-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > + { .compatible = "mediatek,mt8183-disp-mutex", > + .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt2701-disp-pwm", > .data = (void *)MTK_DISP_BLS }, > { .compatible = "mediatek,mt8173-disp-pwm", > @@ -423,6 +466,8 @@ static const struct of_device_id mtk_drm_of_ids[] = { > .data = &mt2712_mmsys_driver_data}, > { .compatible = "mediatek,mt8173-mmsys", > .data = &mt8173_mmsys_driver_data}, > + { .compatible = "mediatek,mt8183-mmsys", > + .data = &mt8183_mmsys_driver_data}, > { } > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EDE2C433E0 for ; Thu, 28 Jan 2021 06:18:56 +0000 (UTC) Received: from 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26fb992c177d4546a7bdb87eef1d8683-20210128 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1174722291; Thu, 28 Jan 2021 14:17:59 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Jan 2021 14:17:53 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 28 Jan 2021 14:17:53 +0800 Message-ID: <1611814673.28312.10.camel@mtksdaap41> Subject: Re: [PATCH v10 9/9] drm/mediatek: add support for mediatek SOC MT8183 From: CK Hu To: Hsin-Yi Wang CC: Philipp Zabel , Matthias Brugger , David Airlie , Daniel Vetter , Mark Rutland , , , , , , , Yongqiang Niu Date: Thu, 28 Jan 2021 14:17:53 +0800 In-Reply-To: <20210127045422.2418917-10-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> <20210127045422.2418917-10-hsinyi@chromium.org> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: C777708033CD168A1AAC5B786F1DFA5848CB97E50C292601B42893BA975571EC2000:8 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SGksIEhzaW4tWWk6DQoNCk9uIFdlZCwgMjAyMS0wMS0yNyBhdCAxMjo1NCArMDgwMCwgSHNpbi1Z aSBXYW5nIHdyb3RlOg0KPiBGcm9tOiBZb25ncWlhbmcgTml1IDx5b25ncWlhbmcubml1QG1lZGlh dGVrLmNvbT4NCj4gDQo+IDEuIGFkZCBvdmwgcHJpdmF0ZSBkYXRhDQo+IDIuIGFkZCByZG1hIHBy aXZhdGUgZGF0YQ0KPiAzLiBhZGQgZ2FtbWEgcHJpdnRlIGRhdGENCj4gNC4gYWRkIG1haW4gYW5k IGV4dGVybmFsIHBhdGggbW9kdWxlIGZvciBjcnRjIGNyZWF0ZQ0KDQpSZXZpZXdlZC1ieTogQ0sg SHUgPGNrLmh1QG1lZGlhdGVrLmNvbT4NCg0KPiANCj4gU2lnbmVkLW9mZi1ieTogWW9uZ3FpYW5n IE5pdSA8eW9uZ3FpYW5nLm5pdUBtZWRpYXRlay5jb20+DQo+IFNpZ25lZC1vZmYtYnk6IEhzaW4t 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mail.kernel.org 801D86146D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 733E76E8DA; Thu, 28 Jan 2021 06:18:06 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [1.203.163.78]) by gabe.freedesktop.org (Postfix) with ESMTP id CDB356E8DA for ; Thu, 28 Jan 2021 06:18:03 +0000 (UTC) X-UUID: 26fb992c177d4546a7bdb87eef1d8683-20210128 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=yH+gBipO9hOQRZvMiK6UDJurGb4rGh2uSo1RfKfHNr4=; b=KAEmOXWsiUFzjz1k1G+8SjHI61P1odTYjNHHVllO0qdkV7zEm1Fci1PfuWVgkZi05rgRjgXSLKgKFdRGGqMTFcPyo7dfcaIBMM2Q1GbF8sgkU0FQY727rRT+f3LR11GHF7IQ9JQIu9B8G1OqcKyRlo3mEYNtsYMc9Fj++Pu1s5Q=; X-UUID: 26fb992c177d4546a7bdb87eef1d8683-20210128 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1174722291; Thu, 28 Jan 2021 14:17:59 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Jan 2021 14:17:53 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 28 Jan 2021 14:17:53 +0800 Message-ID: <1611814673.28312.10.camel@mtksdaap41> Subject: Re: [PATCH v10 9/9] drm/mediatek: add support for mediatek SOC MT8183 From: CK Hu To: Hsin-Yi Wang Date: Thu, 28 Jan 2021 14:17:53 +0800 In-Reply-To: <20210127045422.2418917-10-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> <20210127045422.2418917-10-hsinyi@chromium.org> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: C777708033CD168A1AAC5B786F1DFA5848CB97E50C292601B42893BA975571EC2000:8 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Yongqiang Niu , Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, Hsin-Yi: On Wed, 2021-01-27 at 12:54 +0800, Hsin-Yi Wang wrote: > From: Yongqiang Niu > > 1. add ovl private data > 2. add rdma private data > 3. add gamma privte data > 4. add main and external path module for crtc create Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > Signed-off-by: Hsin-Yi Wang > --- > drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 1 + > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18 +++++++++ > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++ > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 45 +++++++++++++++++++++++ > 4 files changed, 70 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > index c98fe284265d0..93ad76a2dda5e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c > @@ -179,6 +179,7 @@ static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = { > static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = { > { .compatible = "mediatek,mt8173-disp-gamma", > .data = &mt8173_gamma_driver_data}, > + { .compatible = "mediatek,mt8183-disp-gamma"}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > index 1c295c58a5e82..da7e38a28759b 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > @@ -424,11 +424,29 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { > .fmt_rgb565_is_0 = true, > }; > > +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = { > + .addr = DISP_REG_OVL_ADDR_MT8173, > + .gmc_bits = 10, > + .layer_nr = 4, > + .fmt_rgb565_is_0 = true, > +}; > + > +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = { > + .addr = DISP_REG_OVL_ADDR_MT8173, > + .gmc_bits = 10, > + .layer_nr = 2, > + .fmt_rgb565_is_0 = true, > +}; > + > static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-ovl", > .data = &mt2701_ovl_driver_data}, > { .compatible = "mediatek,mt8173-disp-ovl", > .data = &mt8173_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl", > + .data = &mt8183_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl-2l", > + .data = &mt8183_ovl_2l_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index 04b9542010b00..29fa5f3a05c30 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -355,11 +355,17 @@ static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = { > .fifo_size = SZ_8K, > }; > > +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = { > + .fifo_size = 5 * SZ_1K, > +}; > + > static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-rdma", > .data = &mt2701_rdma_driver_data}, > { .compatible = "mediatek,mt8173-disp-rdma", > .data = &mt8173_rdma_driver_data}, > + { .compatible = "mediatek,mt8183-disp-rdma", > + .data = &mt8183_rdma_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match); > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > index 279d3e6f11563..486e73e675ad5 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > @@ -129,6 +129,24 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { > DDP_COMPONENT_DPI0, > }; > > +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = { > + DDP_COMPONENT_OVL0, > + DDP_COMPONENT_OVL_2L0, > + DDP_COMPONENT_RDMA0, > + DDP_COMPONENT_COLOR0, > + DDP_COMPONENT_CCORR, > + DDP_COMPONENT_AAL0, > + DDP_COMPONENT_GAMMA, > + DDP_COMPONENT_DITHER, > + DDP_COMPONENT_DSI0, > +}; > + > +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = { > + DDP_COMPONENT_OVL_2L1, > + DDP_COMPONENT_RDMA1, > + DDP_COMPONENT_DPI0, > +}; > + > static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { > .main_path = mt2701_mtk_ddp_main, > .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), > @@ -161,6 +179,13 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { > .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), > }; > > +static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { > + .main_path = mt8183_mtk_ddp_main, > + .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main), > + .ext_path = mt8183_mtk_ddp_ext, > + .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext), > +}; > + > static int mtk_drm_kms_init(struct drm_device *drm) > { > struct mtk_drm_private *private = drm->dev_private; > @@ -375,12 +400,20 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DISP_OVL }, > { .compatible = "mediatek,mt8173-disp-ovl", > .data = (void *)MTK_DISP_OVL }, > + { .compatible = "mediatek,mt8183-disp-ovl", > + .data = (void *)MTK_DISP_OVL }, > + { .compatible = "mediatek,mt8183-disp-ovl-2l", > + .data = (void *)MTK_DISP_OVL_2L }, > { .compatible = "mediatek,mt2701-disp-rdma", > .data = (void *)MTK_DISP_RDMA }, > { .compatible = "mediatek,mt8173-disp-rdma", > .data = (void *)MTK_DISP_RDMA }, > + { .compatible = "mediatek,mt8183-disp-rdma", > + .data = (void *)MTK_DISP_RDMA }, > { .compatible = "mediatek,mt8173-disp-wdma", > .data = (void *)MTK_DISP_WDMA }, > + { .compatible = "mediatek,mt8183-disp-ccorr", > + .data = (void *)MTK_DISP_CCORR }, > { .compatible = "mediatek,mt2701-disp-color", > .data = (void *)MTK_DISP_COLOR }, > { .compatible = "mediatek,mt8173-disp-color", > @@ -389,22 +422,32 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DISP_AAL}, > { .compatible = "mediatek,mt8173-disp-gamma", > .data = (void *)MTK_DISP_GAMMA, }, > + { .compatible = "mediatek,mt8183-disp-gamma", > + .data = (void *)MTK_DISP_GAMMA, }, > + { .compatible = "mediatek,mt8183-disp-dither", > + .data = (void *)MTK_DISP_DITHER }, > { .compatible = "mediatek,mt8173-disp-ufoe", > .data = (void *)MTK_DISP_UFOE }, > { .compatible = "mediatek,mt2701-dsi", > .data = (void *)MTK_DSI }, > { .compatible = "mediatek,mt8173-dsi", > .data = (void *)MTK_DSI }, > + { .compatible = "mediatek,mt8183-dsi", > + .data = (void *)MTK_DSI }, > { .compatible = "mediatek,mt2701-dpi", > .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt8173-dpi", > .data = (void *)MTK_DPI }, > + { .compatible = "mediatek,mt8183-dpi", > + .data = (void *)MTK_DPI }, > { .compatible = "mediatek,mt2701-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt2712-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt8173-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > + { .compatible = "mediatek,mt8183-disp-mutex", > + .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt2701-disp-pwm", > .data = (void *)MTK_DISP_BLS }, > { .compatible = "mediatek,mt8173-disp-pwm", > @@ -423,6 +466,8 @@ static const struct of_device_id mtk_drm_of_ids[] = { > .data = &mt2712_mmsys_driver_data}, > { .compatible = "mediatek,mt8173-mmsys", > .data = &mt8173_mmsys_driver_data}, > + { .compatible = "mediatek,mt8183-mmsys", > + .data = &mt8183_mmsys_driver_data}, > { } > }; > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel