From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC698C433B4 for ; Thu, 8 Apr 2021 06:05:39 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 593E061155 for ; Thu, 8 Apr 2021 06:05:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 593E061155 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Date:CC:To:From: Subject:Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=cfcnzDYye5VRp+3c9K+lGNDRygVXQM0gmv6fI5/LlEI=; b=mtX/U29ALSv9GZMtR2BBXkumm LSz/VwsAEy0zG9QYLNdq1PW2fW69GDhj17FBEqbEZL7aTabO9aCfm6zbwWb8t01n7WBxXqNDWFJry PaJjEXOWjukMP1oGHPyIOg6oVn42PE08fRCVD1IrYedb3XqZrF+GGGRDjsmG16rviXKk4tYdLpLG1 3iSRgtd7O54VRdzFQkd/0r1npWfKR3o5XA2Aqby46PmZyv8Csnp4HL/VlihkvkVp0QKI4LTDusuAs jwPsWd5TEolhOLcJTgDSp+3xfeFXG0JWlRN0y8Fz1KTKApZRpOb9Ch1P/p2wsilbrr7WaZdhCF/m8 T+ZHf11PQ==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lUNnA-0072oz-Ko; Thu, 08 Apr 2021 06:05:24 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lUNn4-0072o9-UG; Thu, 08 Apr 2021 06:05:22 +0000 X-UUID: b27cfac436c240d9aa4a2f8300831237-20210407 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=lMu54n3WM7h13T4KRXSxF20E2a6a7I6PmSwVbYUM2ys=; b=Bi6SOH460znrXWsR0YJziqBdrrZX6/YoEV+URq1eC4BUN2kxDlzJTH9q0I+7bD3UdP8834lCeKj+mAZWKnZ7rwppzkBQqEqo25bWYmTeTuLJv6fliY2yWF2U+Kg1Hfe2dBq/1/LmLOyju5EpfYC/QZUaXLX078HIsYmV+HMP6RY=; X-UUID: b27cfac436c240d9aa4a2f8300831237-20210407 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1013267768; Wed, 07 Apr 2021 23:05:13 -0700 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 7 Apr 2021 22:58:23 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 8 Apr 2021 13:58:21 +0800 Received: from [172.21.84.99] (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 8 Apr 2021 13:58:21 +0800 Message-ID: <1617861501.8874.4.camel@mtksdccf07> Subject: Re: [PATCH v2 4/6] soc: mediatek: devapc: rename variable for new IC support From: Nina Wu To: Matthias Brugger CC: Rob Herring , Zhen Lei , Neal Liu , , , , , , Date: Thu, 8 Apr 2021 13:58:21 +0800 In-Reply-To: References: <1617259087-5502-1-git-send-email-nina-cm.wu@mediatek.com> <1617259087-5502-4-git-send-email-nina-cm.wu@mediatek.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210408_070519_622351_1ABE8423 X-CRM114-Status: GOOD ( 27.14 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi, Matthias On Tue, 2021-04-06 at 15:43 +0200, Matthias Brugger wrote: > Regarding the commit subject: > "soc: mediatek: devapc: rename variable for new IC support" > maybe something like: > "soc: mediatek: devapc: rename register variable infra_base" > > Other then that looks good to me. > OK. I will fix it in the next version. Thanks > On 01/04/2021 08:38, Nina Wu wrote: > > From: Nina Wu > > > > For new ICs, there are multiple devapc HWs for different subsys. > > For example, there is devapc respectively for infra, peri, peri2, etc. > > So we rename the variable 'infra_base' to 'base' for code readability. > > > > Signed-off-by: Nina Wu > > --- > > drivers/soc/mediatek/mtk-devapc.c | 24 ++++++++++++------------ > > 1 file changed, 12 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/soc/mediatek/mtk-devapc.c b/drivers/soc/mediatek/mtk-devapc.c > > index 68c3e35..bcf6e3c 100644 > > --- a/drivers/soc/mediatek/mtk-devapc.c > > +++ b/drivers/soc/mediatek/mtk-devapc.c > > @@ -45,7 +45,7 @@ struct mtk_devapc_data { > > > > struct mtk_devapc_context { > > struct device *dev; > > - void __iomem *infra_base; > > + void __iomem *base; > > u32 vio_idx_num; > > struct clk *infra_clk; > > const struct mtk_devapc_data *data; > > @@ -56,7 +56,7 @@ static void clear_vio_status(struct mtk_devapc_context *ctx) > > void __iomem *reg; > > int i; > > > > - reg = ctx->infra_base + ctx->data->vio_sta_offset; > > + reg = ctx->base + ctx->data->vio_sta_offset; > > > > for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->vio_idx_num - 1); i++) > > writel(GENMASK(31, 0), reg + 4 * i); > > @@ -71,7 +71,7 @@ static void mask_module_irq(struct mtk_devapc_context *ctx, bool mask) > > u32 val; > > int i; > > > > - reg = ctx->infra_base + ctx->data->vio_mask_offset; > > + reg = ctx->base + ctx->data->vio_mask_offset; > > > > if (mask) > > val = GENMASK(31, 0); > > @@ -113,11 +113,11 @@ static int devapc_sync_vio_dbg(struct mtk_devapc_context *ctx) > > int ret; > > u32 val; > > > > - pd_vio_shift_sta_reg = ctx->infra_base + > > + pd_vio_shift_sta_reg = ctx->base + > > ctx->data->vio_shift_sta_offset; > > - pd_vio_shift_sel_reg = ctx->infra_base + > > + pd_vio_shift_sel_reg = ctx->base + > > ctx->data->vio_shift_sel_offset; > > - pd_vio_shift_con_reg = ctx->infra_base + > > + pd_vio_shift_con_reg = ctx->base + > > ctx->data->vio_shift_con_offset; > > > > /* Find the minimum shift group which has violation */ > > @@ -159,8 +159,8 @@ static void devapc_extract_vio_dbg(struct mtk_devapc_context *ctx) > > void __iomem *vio_dbg0_reg; > > void __iomem *vio_dbg1_reg; > > > > - vio_dbg0_reg = ctx->infra_base + ctx->data->vio_dbg0_offset; > > - vio_dbg1_reg = ctx->infra_base + ctx->data->vio_dbg1_offset; > > + vio_dbg0_reg = ctx->base + ctx->data->vio_dbg0_offset; > > + vio_dbg1_reg = ctx->base + ctx->data->vio_dbg1_offset; > > > > vio_dbgs.vio_dbg0 = readl(vio_dbg0_reg); > > vio_dbgs.vio_dbg1 = readl(vio_dbg1_reg); > > @@ -198,7 +198,7 @@ static irqreturn_t devapc_violation_irq(int irq_number, void *data) > > */ > > static void start_devapc(struct mtk_devapc_context *ctx) > > { > > - writel(BIT(31), ctx->infra_base + ctx->data->apc_con_offset); > > + writel(BIT(31), ctx->base + ctx->data->apc_con_offset); > > > > mask_module_irq(ctx, false); > > } > > @@ -210,7 +210,7 @@ static void stop_devapc(struct mtk_devapc_context *ctx) > > { > > mask_module_irq(ctx, true); > > > > - writel(BIT(2), ctx->infra_base + ctx->data->apc_con_offset); > > + writel(BIT(2), ctx->base + ctx->data->apc_con_offset); > > } > > > > static const struct mtk_devapc_data devapc_mt6779 = { > > @@ -249,8 +249,8 @@ static int mtk_devapc_probe(struct platform_device *pdev) > > ctx->data = of_device_get_match_data(&pdev->dev); > > ctx->dev = &pdev->dev; > > > > - ctx->infra_base = of_iomap(node, 0); > > - if (!ctx->infra_base) > > + ctx->base = of_iomap(node, 0); > > + if (!ctx->base) > > return -EINVAL; > > > > if (of_property_read_u32(node, "vio_idx_num", &ctx->vio_idx_num)) > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B043AC433ED for ; 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Thu, 8 Apr 2021 13:58:21 +0800 Message-ID: <1617861501.8874.4.camel@mtksdccf07> Subject: Re: [PATCH v2 4/6] soc: mediatek: devapc: rename variable for new IC support From: Nina Wu To: Matthias Brugger CC: Rob Herring , Zhen Lei , Neal Liu , , , , , , Date: Thu, 8 Apr 2021 13:58:21 +0800 In-Reply-To: References: <1617259087-5502-1-git-send-email-nina-cm.wu@mediatek.com> <1617259087-5502-4-git-send-email-nina-cm.wu@mediatek.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210408_070519_622351_1ABE8423 X-CRM114-Status: GOOD ( 27.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Matthias On Tue, 2021-04-06 at 15:43 +0200, Matthias Brugger wrote: > Regarding the commit subject: > "soc: mediatek: devapc: rename variable for new IC support" > maybe something like: > "soc: mediatek: devapc: rename register variable infra_base" > > Other then that looks good to me. > OK. I will fix it in the next version. Thanks > On 01/04/2021 08:38, Nina Wu wrote: > > From: Nina Wu > > > > For new ICs, there are multiple devapc HWs for different subsys. > > For example, there is devapc respectively for infra, peri, peri2, etc. > > So we rename the variable 'infra_base' to 'base' for code readability. > > > > Signed-off-by: Nina Wu > > --- > > drivers/soc/mediatek/mtk-devapc.c | 24 ++++++++++++------------ > > 1 file changed, 12 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/soc/mediatek/mtk-devapc.c b/drivers/soc/mediatek/mtk-devapc.c > > index 68c3e35..bcf6e3c 100644 > > --- a/drivers/soc/mediatek/mtk-devapc.c > > +++ b/drivers/soc/mediatek/mtk-devapc.c > > @@ -45,7 +45,7 @@ struct mtk_devapc_data { > > > > struct mtk_devapc_context { > > struct device *dev; > > - void __iomem *infra_base; > > + void __iomem *base; > > u32 vio_idx_num; > > struct clk *infra_clk; > > const struct mtk_devapc_data *data; > > @@ -56,7 +56,7 @@ static void clear_vio_status(struct mtk_devapc_context *ctx) > > void __iomem *reg; > > int i; > > > > - reg = ctx->infra_base + ctx->data->vio_sta_offset; > > + reg = ctx->base + ctx->data->vio_sta_offset; > > > > for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->vio_idx_num - 1); i++) > > writel(GENMASK(31, 0), reg + 4 * i); > > @@ -71,7 +71,7 @@ static void mask_module_irq(struct mtk_devapc_context *ctx, bool mask) > > u32 val; > > int i; > > > > - reg = ctx->infra_base + ctx->data->vio_mask_offset; > > + reg = ctx->base + ctx->data->vio_mask_offset; > > > > if (mask) > > val = GENMASK(31, 0); > > @@ -113,11 +113,11 @@ static int devapc_sync_vio_dbg(struct mtk_devapc_context *ctx) > > int ret; > > u32 val; > > > > - pd_vio_shift_sta_reg = ctx->infra_base + > > + pd_vio_shift_sta_reg = ctx->base + > > ctx->data->vio_shift_sta_offset; > > - pd_vio_shift_sel_reg = ctx->infra_base + > > + pd_vio_shift_sel_reg = ctx->base + > > ctx->data->vio_shift_sel_offset; > > - pd_vio_shift_con_reg = ctx->infra_base + > > + pd_vio_shift_con_reg = ctx->base + > > ctx->data->vio_shift_con_offset; > > > > /* Find the minimum shift group which has violation */ > > @@ -159,8 +159,8 @@ static void devapc_extract_vio_dbg(struct mtk_devapc_context *ctx) > > void __iomem *vio_dbg0_reg; > > void __iomem *vio_dbg1_reg; > > > > - vio_dbg0_reg = ctx->infra_base + ctx->data->vio_dbg0_offset; > > - vio_dbg1_reg = ctx->infra_base + ctx->data->vio_dbg1_offset; > > + vio_dbg0_reg = ctx->base + ctx->data->vio_dbg0_offset; > > + vio_dbg1_reg = ctx->base + ctx->data->vio_dbg1_offset; > > > > vio_dbgs.vio_dbg0 = readl(vio_dbg0_reg); > > vio_dbgs.vio_dbg1 = readl(vio_dbg1_reg); > > @@ -198,7 +198,7 @@ static irqreturn_t devapc_violation_irq(int irq_number, void *data) > > */ > > static void start_devapc(struct mtk_devapc_context *ctx) > > { > > - writel(BIT(31), ctx->infra_base + ctx->data->apc_con_offset); > > + writel(BIT(31), ctx->base + ctx->data->apc_con_offset); > > > > mask_module_irq(ctx, false); > > } > > @@ -210,7 +210,7 @@ static void stop_devapc(struct mtk_devapc_context *ctx) > > { > > mask_module_irq(ctx, true); > > > > - writel(BIT(2), ctx->infra_base + ctx->data->apc_con_offset); > > + writel(BIT(2), ctx->base + ctx->data->apc_con_offset); > > } > > > > static const struct mtk_devapc_data devapc_mt6779 = { > > @@ -249,8 +249,8 @@ static int mtk_devapc_probe(struct platform_device *pdev) > > ctx->data = of_device_get_match_data(&pdev->dev); > > ctx->dev = &pdev->dev; > > > > - ctx->infra_base = of_iomap(node, 0); > > - if (!ctx->infra_base) > > + ctx->base = of_iomap(node, 0); > > + if (!ctx->base) > > return -EINVAL; > > > > if (of_property_read_u32(node, "vio_idx_num", &ctx->vio_idx_num)) > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org 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MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 8 Apr 2021 13:58:21 +0800 Message-ID: <1617861501.8874.4.camel@mtksdccf07> Subject: Re: [PATCH v2 4/6] soc: mediatek: devapc: rename variable for new IC support From: Nina Wu To: Matthias Brugger CC: Rob Herring , Zhen Lei , Neal Liu , , , , , , Date: Thu, 8 Apr 2021 13:58:21 +0800 In-Reply-To: References: <1617259087-5502-1-git-send-email-nina-cm.wu@mediatek.com> <1617259087-5502-4-git-send-email-nina-cm.wu@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SGksIE1hdHRoaWFzDQoNCk9uIFR1ZSwgMjAyMS0wNC0wNiBhdCAxNTo0MyArMDIwMCwgTWF0dGhp YXMgQnJ1Z2dlciB3cm90ZToNCj4gUmVnYXJkaW5nIHRoZSBjb21taXQgc3ViamVjdDoNCj4gInNv YzogbWVkaWF0ZWs6IGRldmFwYzogcmVuYW1lIHZhcmlhYmxlIGZvciBuZXcgSUMgc3VwcG9ydCIN Cj4gbWF5YmUgc29tZXRoaW5nIGxpa2U6DQo+ICJzb2M6IG1lZGlhdGVrOiBkZXZhcGM6IHJlbmFt ZSByZWdpc3RlciB2YXJpYWJsZSBpbmZyYV9iYXNlIg0KPiANCj4gT3RoZXIgdGhlbiB0aGF0IGxv b2tzIGdvb2QgdG8gbWUuDQo+IA0KDQpPSy4gSSB3aWxsIGZpeCBpdCBpbiB0aGUgbmV4dCB2ZXJz aW9uLg0KDQpUaGFua3MNCg0KPiBPbiAwMS8wNC8yMDIxIDA4OjM4LCBOaW5hIFd1IHdyb3RlOg0K PiA+IEZyb206IE5pbmEgV3UgPE5pbmEtQ00uV3VAbWVkaWF0ZWsuY29tPg0KPiA+IA0KPiA+IEZv ciBuZXcgSUNzLCB0aGVyZSBhcmUgbXVsdGlwbGUgZGV2YXBjIEhXcyBmb3IgZGlmZmVyZW50IHN1 YnN5cy4NCj4gPiBGb3IgZXhhbXBsZSwgdGhlcmUgaXMgZGV2YXBjIHJlc3BlY3RpdmVseSBmb3Ig aW5mcmEsIHBlcmksIHBlcmkyLCBldGMuDQo+ID4gU28gd2UgcmVuYW1lIHRoZSB2YXJpYWJsZSAn aW5mcmFfYmFzZScgdG8gJ2Jhc2UnIGZvciBjb2RlIHJlYWRhYmlsaXR5Lg0KPiA+IA0KPiA+IFNp Z25lZC1vZmYtYnk6IE5pbmEgV3UgPE5pbmEtQ00uV3VAbWVkaWF0ZWsuY29tPg0KPiA+IC0tLQ0K PiA+ICBkcml2ZXJzL3NvYy9tZWRpYXRlay9tdGstZGV2YXBjLmMgfCAyNCArKysrKysrKysrKyst LS0tLS0tLS0tLS0NCj4gPiAgMSBmaWxlIGNoYW5nZWQsIDEyIGluc2VydGlvbnMoKyksIDEyIGRl bGV0aW9ucygtKQ0KPiA+IA0KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3NvYy9tZWRpYXRlay9t dGstZGV2YXBjLmMgYi9kcml2ZXJzL3NvYy9tZWRpYXRlay9tdGstZGV2YXBjLmMNCj4gPiBpbmRl eCA2OGMzZTM1Li5iY2Y2ZTNjIDEwMDY0NA0KPiA+IC0tLSBhL2RyaXZlcnMvc29jL21lZGlhdGVr L210ay1kZXZhcGMuYw0KPiA+ICsrKyBiL2RyaXZlcnMvc29jL21lZGlhdGVrL210ay1kZXZhcGMu Yw0KPiA+IEBAIC00NSw3ICs0NSw3IEBAIHN0cnVjdCBtdGtfZGV2YXBjX2RhdGEgew0KPiA+ICAN Cj4gPiAgc3RydWN0IG10a19kZXZhcGNfY29udGV4dCB7DQo+ID4gIAlzdHJ1Y3QgZGV2aWNlICpk ZXY7DQo+ID4gLQl2b2lkIF9faW9tZW0gKmluZnJhX2Jhc2U7DQo+ID4gKwl2b2lkIF9faW9tZW0g KmJhc2U7DQo+ID4gIAl1MzIgdmlvX2lkeF9udW07DQo+ID4gIAlzdHJ1Y3QgY2xrICppbmZyYV9j bGs7DQo+ID4gIAljb25zdCBzdHJ1Y3QgbXRrX2RldmFwY19kYXRhICpkYXRhOw0KPiA+IEBAIC01 Niw3ICs1Niw3IEBAIHN0YXRpYyB2b2lkIGNsZWFyX3Zpb19zdGF0dXMoc3RydWN0IG10a19kZXZh cGNfY29udGV4dCAqY3R4KQ0KPiA+ICAJdm9pZCBfX2lvbWVtICpyZWc7DQo+ID4gIAlpbnQgaTsN Cj4gPiAgDQo+ID4gLQlyZWcgPSBjdHgtPmluZnJhX2Jhc2UgKyBjdHgtPmRhdGEtPnZpb19zdGFf b2Zmc2V0Ow0KPiA+ICsJcmVnID0gY3R4LT5iYXNlICsgY3R4LT5kYXRhLT52aW9fc3RhX29mZnNl dDsNCj4gPiAgDQo+ID4gIAlmb3IgKGkgPSAwOyBpIDwgVklPX01PRF9UT19SRUdfSU5EKGN0eC0+ dmlvX2lkeF9udW0gLSAxKTsgaSsrKQ0KPiA+ICAJCXdyaXRlbChHRU5NQVNLKDMxLCAwKSwgcmVn ICsgNCAqIGkpOw0KPiA+IEBAIC03MSw3ICs3MSw3IEBAIHN0YXRpYyB2b2lkIG1hc2tfbW9kdWxl X2lycShzdHJ1Y3QgbXRrX2RldmFwY19jb250ZXh0ICpjdHgsIGJvb2wgbWFzaykNCj4gPiAgCXUz MiB2YWw7DQo+ID4gIAlpbnQgaTsNCj4gPiAgDQo+ID4gLQlyZWcgPSBjdHgtPmluZnJhX2Jhc2Ug KyBjdHgtPmRhdGEtPnZpb19tYXNrX29mZnNldDsNCj4gPiArCXJlZyA9IGN0eC0+YmFzZSArIGN0 eC0+ZGF0YS0+dmlvX21hc2tfb2Zmc2V0Ow0KPiA+ICANCj4gPiAgCWlmIChtYXNrKQ0KPiA+ICAJ CXZhbCA9IEdFTk1BU0soMzEsIDApOw0KPiA+IEBAIC0xMTMsMTEgKzExMywxMSBAQCBzdGF0aWMg aW50IGRldmFwY19zeW5jX3Zpb19kYmcoc3RydWN0IG10a19kZXZhcGNfY29udGV4dCAqY3R4KQ0K PiA+ICAJaW50IHJldDsNCj4gPiAgCXUzMiB2YWw7DQo+ID4gIA0KPiA+IC0JcGRfdmlvX3NoaWZ0 X3N0YV9yZWcgPSBjdHgtPmluZnJhX2Jhc2UgKw0KPiA+ICsJcGRfdmlvX3NoaWZ0X3N0YV9yZWcg PSBjdHgtPmJhc2UgKw0KPiA+ICAJCQkgICAgICAgY3R4LT5kYXRhLT52aW9fc2hpZnRfc3RhX29m ZnNldDsNCj4gPiAtCXBkX3Zpb19zaGlmdF9zZWxfcmVnID0gY3R4LT5pbmZyYV9iYXNlICsNCj4g PiArCXBkX3Zpb19zaGlmdF9zZWxfcmVnID0gY3R4LT5iYXNlICsNCj4gPiAgCQkJICAgICAgIGN0 eC0+ZGF0YS0+dmlvX3NoaWZ0X3NlbF9vZmZzZXQ7DQo+ID4gLQlwZF92aW9fc2hpZnRfY29uX3Jl ZyA9IGN0eC0+aW5mcmFfYmFzZSArDQo+ID4gKwlwZF92aW9fc2hpZnRfY29uX3JlZyA9IGN0eC0+ YmFzZSArDQo+ID4gIAkJCSAgICAgICBjdHgtPmRhdGEtPnZpb19zaGlmdF9jb25fb2Zmc2V0Ow0K PiA+ICANCj4gPiAgCS8qIEZpbmQgdGhlIG1pbmltdW0gc2hpZnQgZ3JvdXAgd2hpY2ggaGFzIHZp b2xhdGlvbiAqLw0KPiA+IEBAIC0xNTksOCArMTU5LDggQEAgc3RhdGljIHZvaWQgZGV2YXBjX2V4 dHJhY3RfdmlvX2RiZyhzdHJ1Y3QgbXRrX2RldmFwY19jb250ZXh0ICpjdHgpDQo+ID4gIAl2b2lk IF9faW9tZW0gKnZpb19kYmcwX3JlZzsNCj4gPiAgCXZvaWQgX19pb21lbSAqdmlvX2RiZzFfcmVn Ow0KPiA+ICANCj4gPiAtCXZpb19kYmcwX3JlZyA9IGN0eC0+aW5mcmFfYmFzZSArIGN0eC0+ZGF0 YS0+dmlvX2RiZzBfb2Zmc2V0Ow0KPiA+IC0JdmlvX2RiZzFfcmVnID0gY3R4LT5pbmZyYV9iYXNl ICsgY3R4LT5kYXRhLT52aW9fZGJnMV9vZmZzZXQ7DQo+ID4gKwl2aW9fZGJnMF9yZWcgPSBjdHgt PmJhc2UgKyBjdHgtPmRhdGEtPnZpb19kYmcwX29mZnNldDsNCj4gPiArCXZpb19kYmcxX3JlZyA9 IGN0eC0+YmFzZSArIGN0eC0+ZGF0YS0+dmlvX2RiZzFfb2Zmc2V0Ow0KPiA+ICANCj4gPiAgCXZp b19kYmdzLnZpb19kYmcwID0gcmVhZGwodmlvX2RiZzBfcmVnKTsNCj4gPiAgCXZpb19kYmdzLnZp b19kYmcxID0gcmVhZGwodmlvX2RiZzFfcmVnKTsNCj4gPiBAQCAtMTk4LDcgKzE5OCw3IEBAIHN0 YXRpYyBpcnFyZXR1cm5fdCBkZXZhcGNfdmlvbGF0aW9uX2lycShpbnQgaXJxX251bWJlciwgdm9p ZCAqZGF0YSkNCj4gPiAgICovDQo+ID4gIHN0YXRpYyB2b2lkIHN0YXJ0X2RldmFwYyhzdHJ1Y3Qg bXRrX2RldmFwY19jb250ZXh0ICpjdHgpDQo+ID4gIHsNCj4gPiAtCXdyaXRlbChCSVQoMzEpLCBj dHgtPmluZnJhX2Jhc2UgKyBjdHgtPmRhdGEtPmFwY19jb25fb2Zmc2V0KTsNCj4gPiArCXdyaXRl bChCSVQoMzEpLCBjdHgtPmJhc2UgKyBjdHgtPmRhdGEtPmFwY19jb25fb2Zmc2V0KTsNCj4gPiAg DQo+ID4gIAltYXNrX21vZHVsZV9pcnEoY3R4LCBmYWxzZSk7DQo+ID4gIH0NCj4gPiBAQCAtMjEw LDcgKzIxMCw3IEBAIHN0YXRpYyB2b2lkIHN0b3BfZGV2YXBjKHN0cnVjdCBtdGtfZGV2YXBjX2Nv bnRleHQgKmN0eCkNCj4gPiAgew0KPiA+ICAJbWFza19tb2R1bGVfaXJxKGN0eCwgdHJ1ZSk7DQo+ ID4gIA0KPiA+IC0Jd3JpdGVsKEJJVCgyKSwgY3R4LT5pbmZyYV9iYXNlICsgY3R4LT5kYXRhLT5h cGNfY29uX29mZnNldCk7DQo+ID4gKwl3cml0ZWwoQklUKDIpLCBjdHgtPmJhc2UgKyBjdHgtPmRh dGEtPmFwY19jb25fb2Zmc2V0KTsNCj4gPiAgfQ0KPiA+ICANCj4gPiAgc3RhdGljIGNvbnN0IHN0 cnVjdCBtdGtfZGV2YXBjX2RhdGEgZGV2YXBjX210Njc3OSA9IHsNCj4gPiBAQCAtMjQ5LDggKzI0 OSw4IEBAIHN0YXRpYyBpbnQgbXRrX2RldmFwY19wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNl ICpwZGV2KQ0KPiA+ICAJY3R4LT5kYXRhID0gb2ZfZGV2aWNlX2dldF9tYXRjaF9kYXRhKCZwZGV2 LT5kZXYpOw0KPiA+ICAJY3R4LT5kZXYgPSAmcGRldi0+ZGV2Ow0KPiA+ICANCj4gPiAtCWN0eC0+ aW5mcmFfYmFzZSA9IG9mX2lvbWFwKG5vZGUsIDApOw0KPiA+IC0JaWYgKCFjdHgtPmluZnJhX2Jh c2UpDQo+ID4gKwljdHgtPmJhc2UgPSBvZl9pb21hcChub2RlLCAwKTsNCj4gPiArCWlmICghY3R4 LT5iYXNlKQ0KPiA+ICAJCXJldHVybiAtRUlOVkFMOw0KPiA+ICANCj4gPiAgCWlmIChvZl9wcm9w ZXJ0eV9yZWFkX3UzMihub2RlLCAidmlvX2lkeF9udW0iLCAmY3R4LT52aW9faWR4X251bSkpDQo+ ID4gDQoNCg==