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Wed, 07 Apr 2021 23:09:38 -0700 Received: from mtkmbs08n2.mediatek.inc (172.21.101.56) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 7 Apr 2021 23:09:36 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 8 Apr 2021 14:09:28 +0800 Received: from [172.21.84.99] (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 8 Apr 2021 14:09:28 +0800 Message-ID: <1617862168.8874.13.camel@mtksdccf07> Subject: Re: [PATCH v2 5/6] soc: mediatek: devapc: add debug register for new IC support From: Nina Wu To: Matthias Brugger CC: Rob Herring , Zhen Lei , Neal Liu , , , , , , Date: Thu, 8 Apr 2021 14:09:28 +0800 In-Reply-To: <23c0d15c-6cc2-dc40-e45a-c2fb749cec1f@gmail.com> References: <1617259087-5502-1-git-send-email-nina-cm.wu@mediatek.com> <1617259087-5502-5-git-send-email-nina-cm.wu@mediatek.com> <23c0d15c-6cc2-dc40-e45a-c2fb749cec1f@gmail.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: 7CAFF274F06E74740FF1A0901266ECC9C36F1710CE7BB4806B874DD48507ED1D2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210408_070945_428107_CA0DF711 X-CRM114-Status: GOOD ( 31.24 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi, Matthias On Tue, 2021-04-06 at 15:53 +0200, Matthias Brugger wrote: > > On 01/04/2021 08:38, Nina Wu wrote: > > From: Nina Wu > > > > There are 3 debug info registers in new ICs while in legacy ones, > > we have only 2. When dumping the debug info, we need to check first > > if the 3rd debug register exists and then we can konw how to decipher > > the debug info. > > > > Signed-off-by: Nina Wu > > --- > > drivers/soc/mediatek/mtk-devapc.c | 31 +++++++++++++++++++++++++++++-- > > 1 file changed, 29 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/soc/mediatek/mtk-devapc.c b/drivers/soc/mediatek/mtk-devapc.c > > index bcf6e3c..af55c01 100644 > > --- a/drivers/soc/mediatek/mtk-devapc.c > > +++ b/drivers/soc/mediatek/mtk-devapc.c > > @@ -26,9 +26,19 @@ struct mtk_devapc_vio_dbgs { > > u32 addr_h:4; > > u32 resv:4; > > } dbg0_bits; > > + > > + /* Not used, reference only */ > > + struct { > > + u32 dmnid:6; > > + u32 vio_w:1; > > + u32 vio_r:1; > > + u32 addr_h:4; > > + u32 resv:20; > > + } dbg0_bits_ver2; > > }; > > > > u32 vio_dbg1; > > + u32 vio_dbg2; > > }; > > > > struct mtk_devapc_data { > > @@ -37,6 +47,7 @@ struct mtk_devapc_data { > > u32 vio_sta_offset; > > u32 vio_dbg0_offset; > > u32 vio_dbg1_offset; > > + u32 vio_dbg2_offset; > > u32 apc_con_offset; > > u32 vio_shift_sta_offset; > > u32 vio_shift_sel_offset; > > @@ -158,12 +169,29 @@ static void devapc_extract_vio_dbg(struct mtk_devapc_context *ctx) > > struct mtk_devapc_vio_dbgs vio_dbgs; > > void __iomem *vio_dbg0_reg; > > void __iomem *vio_dbg1_reg; > > + void __iomem *vio_dbg2_reg; > > + u32 vio_addr, bus_id; > > > > vio_dbg0_reg = ctx->base + ctx->data->vio_dbg0_offset; > > vio_dbg1_reg = ctx->base + ctx->data->vio_dbg1_offset; > > + vio_dbg2_reg = ctx->base + ctx->data->vio_dbg2_offset; > > We should read this only if we have version2 of the devapc. > You're right. It is not good to read vio_dbg2_reg in version one. Even though we will only get the value from offset 0 (which is not expected) instead of doing any real harm. (like causing bus hang) > > > > vio_dbgs.vio_dbg0 = readl(vio_dbg0_reg); > > vio_dbgs.vio_dbg1 = readl(vio_dbg1_reg); > > + vio_dbgs.vio_dbg2 = readl(vio_dbg2_reg); > > + > > + if (!ctx->data->vio_dbg2_offset) { > > I think we should add a version field to mtk_devapc_data to distinguish the two > of them. OK. I will try to add this field in the next version > > > + /* arch version 1 */ > > + bus_id = vio_dbgs.dbg0_bits.mstid; > > + vio_addr = vio_dbgs.vio_dbg1; > > + } else { > > + /* arch version 2 */ > > + bus_id = vio_dbgs.vio_dbg1; > > + vio_addr = vio_dbgs.vio_dbg2; > > + > > + /* To align with the bit definition of arch_ver 1 */ > > + vio_dbgs.vio_dbg0 = (vio_dbgs.vio_dbg0 << 16); > > That's magic, better add another variable domain_id and do here: > domain_id = vio_dgbs.dbg0_bits_ver2.dmnid; > OK. I will fix it up in the next version. Thanks > > + } > > > > /* Print violation information */ > > if (vio_dbgs.dbg0_bits.vio_w) > > @@ -172,8 +200,7 @@ static void devapc_extract_vio_dbg(struct mtk_devapc_context *ctx) > > dev_info(ctx->dev, "Read Violation\n"); > > > > dev_info(ctx->dev, "Bus ID:0x%x, Dom ID:0x%x, Vio Addr:0x%x\n", > > - vio_dbgs.dbg0_bits.mstid, vio_dbgs.dbg0_bits.dmnid, > > - vio_dbgs.vio_dbg1); > > + bus_id, vio_dbgs.dbg0_bits.dmnid, vio_addr); > > } > > > > /* > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10F25C433ED for ; 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Thu, 8 Apr 2021 14:09:28 +0800 Message-ID: <1617862168.8874.13.camel@mtksdccf07> Subject: Re: [PATCH v2 5/6] soc: mediatek: devapc: add debug register for new IC support From: Nina Wu To: Matthias Brugger CC: Rob Herring , Zhen Lei , Neal Liu , , , , , , Date: Thu, 8 Apr 2021 14:09:28 +0800 In-Reply-To: <23c0d15c-6cc2-dc40-e45a-c2fb749cec1f@gmail.com> References: <1617259087-5502-1-git-send-email-nina-cm.wu@mediatek.com> <1617259087-5502-5-git-send-email-nina-cm.wu@mediatek.com> <23c0d15c-6cc2-dc40-e45a-c2fb749cec1f@gmail.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: 7CAFF274F06E74740FF1A0901266ECC9C36F1710CE7BB4806B874DD48507ED1D2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210408_070945_428107_CA0DF711 X-CRM114-Status: GOOD ( 31.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Matthias On Tue, 2021-04-06 at 15:53 +0200, Matthias Brugger wrote: > > On 01/04/2021 08:38, Nina Wu wrote: > > From: Nina Wu > > > > There are 3 debug info registers in new ICs while in legacy ones, > > we have only 2. When dumping the debug info, we need to check first > > if the 3rd debug register exists and then we can konw how to decipher > > the debug info. > > > > Signed-off-by: Nina Wu > > --- > > drivers/soc/mediatek/mtk-devapc.c | 31 +++++++++++++++++++++++++++++-- > > 1 file changed, 29 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/soc/mediatek/mtk-devapc.c b/drivers/soc/mediatek/mtk-devapc.c > > index bcf6e3c..af55c01 100644 > > --- a/drivers/soc/mediatek/mtk-devapc.c > > +++ b/drivers/soc/mediatek/mtk-devapc.c > > @@ -26,9 +26,19 @@ struct mtk_devapc_vio_dbgs { > > u32 addr_h:4; > > u32 resv:4; > > } dbg0_bits; > > + > > + /* Not used, reference only */ > > + struct { > > + u32 dmnid:6; > > + u32 vio_w:1; > > + u32 vio_r:1; > > + u32 addr_h:4; > > + u32 resv:20; > > + } dbg0_bits_ver2; > > }; > > > > u32 vio_dbg1; > > + u32 vio_dbg2; > > }; > > > > struct mtk_devapc_data { > > @@ -37,6 +47,7 @@ struct mtk_devapc_data { > > u32 vio_sta_offset; > > u32 vio_dbg0_offset; > > u32 vio_dbg1_offset; > > + u32 vio_dbg2_offset; > > u32 apc_con_offset; > > u32 vio_shift_sta_offset; > > u32 vio_shift_sel_offset; > > @@ -158,12 +169,29 @@ static void devapc_extract_vio_dbg(struct mtk_devapc_context *ctx) > > struct mtk_devapc_vio_dbgs vio_dbgs; > > void __iomem *vio_dbg0_reg; > > void __iomem *vio_dbg1_reg; > > + void __iomem *vio_dbg2_reg; > > + u32 vio_addr, bus_id; > > > > vio_dbg0_reg = ctx->base + ctx->data->vio_dbg0_offset; > > vio_dbg1_reg = ctx->base + ctx->data->vio_dbg1_offset; > > + vio_dbg2_reg = ctx->base + ctx->data->vio_dbg2_offset; > > We should read this only if we have version2 of the devapc. > You're right. It is not good to read vio_dbg2_reg in version one. Even though we will only get the value from offset 0 (which is not expected) instead of doing any real harm. (like causing bus hang) > > > > vio_dbgs.vio_dbg0 = readl(vio_dbg0_reg); > > vio_dbgs.vio_dbg1 = readl(vio_dbg1_reg); > > + vio_dbgs.vio_dbg2 = readl(vio_dbg2_reg); > > + > > + if (!ctx->data->vio_dbg2_offset) { > > I think we should add a version field to mtk_devapc_data to distinguish the two > of them. OK. I will try to add this field in the next version > > > + /* arch version 1 */ > > + bus_id = vio_dbgs.dbg0_bits.mstid; > > + vio_addr = vio_dbgs.vio_dbg1; > > + } else { > > + /* arch version 2 */ > > + bus_id = vio_dbgs.vio_dbg1; > > + vio_addr = vio_dbgs.vio_dbg2; > > + > > + /* To align with the bit definition of arch_ver 1 */ > > + vio_dbgs.vio_dbg0 = (vio_dbgs.vio_dbg0 << 16); > > That's magic, better add another variable domain_id and do here: > domain_id = vio_dgbs.dbg0_bits_ver2.dmnid; > OK. I will fix it up in the next version. Thanks > > + } > > > > /* Print violation information */ > > if (vio_dbgs.dbg0_bits.vio_w) > > @@ -172,8 +200,7 @@ static void devapc_extract_vio_dbg(struct mtk_devapc_context *ctx) > > dev_info(ctx->dev, "Read Violation\n"); > > > > dev_info(ctx->dev, "Bus ID:0x%x, Dom ID:0x%x, Vio Addr:0x%x\n", > > - vio_dbgs.dbg0_bits.mstid, vio_dbgs.dbg0_bits.dmnid, > > - vio_dbgs.vio_dbg1); > > + bus_id, vio_dbgs.dbg0_bits.dmnid, vio_addr); > > } > > > > /* > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, 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Message-ID: <1617862168.8874.13.camel@mtksdccf07> Subject: Re: [PATCH v2 5/6] soc: mediatek: devapc: add debug register for new IC support From: Nina Wu To: Matthias Brugger CC: Rob Herring , Zhen Lei , Neal Liu , , , , , , Date: Thu, 8 Apr 2021 14:09:28 +0800 In-Reply-To: <23c0d15c-6cc2-dc40-e45a-c2fb749cec1f@gmail.com> References: <1617259087-5502-1-git-send-email-nina-cm.wu@mediatek.com> <1617259087-5502-5-git-send-email-nina-cm.wu@mediatek.com> <23c0d15c-6cc2-dc40-e45a-c2fb749cec1f@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: 7CAFF274F06E74740FF1A0901266ECC9C36F1710CE7BB4806B874DD48507ED1D2000:8 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SGksIE1hdHRoaWFzDQoNCk9uIFR1ZSwgMjAyMS0wNC0wNiBhdCAxNTo1MyArMDIwMCwgTWF0dGhp YXMgQnJ1Z2dlciB3cm90ZToNCj4gDQo+IE9uIDAxLzA0LzIwMjEgMDg6MzgsIE5pbmEgV3Ugd3Jv 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