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Wed, 28 Jul 2021 20:42:39 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 29 Jul 2021 11:42:31 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 29 Jul 2021 11:42:31 +0800 Message-ID: <1627530151.32756.9.camel@mtksdaap41> Subject: Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes From: CK Hu To: Hsin-Yi Wang CC: Frank Wunderlich , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Enric Balletbo i Serra , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , lkml , , Frank Wunderlich Date: Thu, 29 Jul 2021 11:42:31 +0800 In-Reply-To: References: <20210727174025.10552-1-linux@fw-web.de> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210728_204245_092137_9BD866DC X-CRM114-Status: GOOD ( 26.51 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi, Hsin-yi: On Thu, 2021-07-29 at 11:15 +0800, Hsin-Yi Wang wrote: > On Wed, Jul 28, 2021 at 1:41 AM Frank Wunderlich wrote: > > > > From: CK Hu > > > > SOUT has many bits and need to be cleared before set new value. > > Write only could do the clear, but for MOUT, it clears bits that > > should not be cleared. So use a mask to reset only the needed bits. > > > > this fixes HDMI issues on MT7623/BPI-R2 since 5.13 > > > > Cc: stable@vger.kernel.org > > Fixes: 440147639ac7 ("soc: mediatek: mmsys: Use an array for setting the routing registers") > > Signed-off-by: Frank Wunderlich > > Signed-off-by: CK Hu > > --- > > code is taken from here (upstreamed without mask part) > > https://urldefense.com/v3/__https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/*/2345186/5__;Kw!!CTRNKA9wMg0ARbw!1ebx2FjrHnqvOqw3HdVyMMYcEUivNbxRIOi1_DXMWwfxJHx45NyKI-Dt4Mvo1g$ > > basicly CK Hu's code so i set him as author > > --- > > drivers/soc/mediatek/mtk-mmsys.c | 7 +- > > drivers/soc/mediatek/mtk-mmsys.h | 133 +++++++++++++++++++++---------- > > 2 files changed, 98 insertions(+), 42 deletions(-) > > > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > > index 080660ef11bf..0f949896fd06 100644 > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > @@ -68,7 +68,9 @@ void mtk_mmsys_ddp_connect(struct device *dev, > > > > for (i = 0; i < mmsys->data->num_routes; i++) > > if (cur == routes[i].from_comp && next == routes[i].to_comp) { > > - reg = readl_relaxed(mmsys->regs + routes[i].addr) | routes[i].val; > > + reg = readl_relaxed(mmsys->regs + routes[i].addr); > > + reg &= ~routes[i].mask; > > + reg |= routes[i].val; > > writel_relaxed(reg, mmsys->regs + routes[i].addr); > > } > > } > > @@ -85,7 +87,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, > > > > for (i = 0; i < mmsys->data->num_routes; i++) > > if (cur == routes[i].from_comp && next == routes[i].to_comp) { > > - reg = readl_relaxed(mmsys->regs + routes[i].addr) & ~routes[i].val; > > + reg = readl_relaxed(mmsys->regs + routes[i].addr); > > + reg &= ~routes[i].mask; > > This patch is breaking the mt8183 internal display. I think it's > because ~routes[i].val; is removed? > Also what should the routes[i].mask be if it's not set in > mmsys_mt8183_routing_table? I'm not sure this problem is about MOUT or SOUT. But for MOUT, it's not necessary to set mask because the value is equal to mask. To make thins simple, the code could be /* For MOUT, value is equal to mask, so mask is 0 and clear the value */ reg &= ~routes[i].mask & ~routes[i].val; Regards, CK > > > writel_relaxed(reg, mmsys->regs + routes[i].addr); > > } > > } > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDFA5C4338F for ; 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Thu, 29 Jul 2021 11:42:31 +0800 Message-ID: <1627530151.32756.9.camel@mtksdaap41> Subject: Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes From: CK Hu To: Hsin-Yi Wang CC: Frank Wunderlich , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Enric Balletbo i Serra , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , lkml , , Frank Wunderlich Date: Thu, 29 Jul 2021 11:42:31 +0800 In-Reply-To: References: <20210727174025.10552-1-linux@fw-web.de> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210728_204245_092137_9BD866DC X-CRM114-Status: GOOD ( 26.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Hsin-yi: On Thu, 2021-07-29 at 11:15 +0800, Hsin-Yi Wang wrote: > On Wed, Jul 28, 2021 at 1:41 AM Frank Wunderlich wrote: > > > > From: CK Hu > > > > SOUT has many bits and need to be cleared before set new value. > > Write only could do the clear, but for MOUT, it clears bits that > > should not be cleared. So use a mask to reset only the needed bits. > > > > this fixes HDMI issues on MT7623/BPI-R2 since 5.13 > > > > Cc: stable@vger.kernel.org > > Fixes: 440147639ac7 ("soc: mediatek: mmsys: Use an array for setting the routing registers") > > Signed-off-by: Frank Wunderlich > > Signed-off-by: CK Hu > > --- > > code is taken from here (upstreamed without mask part) > > https://urldefense.com/v3/__https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/*/2345186/5__;Kw!!CTRNKA9wMg0ARbw!1ebx2FjrHnqvOqw3HdVyMMYcEUivNbxRIOi1_DXMWwfxJHx45NyKI-Dt4Mvo1g$ > > basicly CK Hu's code so i set him as author > > --- > > drivers/soc/mediatek/mtk-mmsys.c | 7 +- > > drivers/soc/mediatek/mtk-mmsys.h | 133 +++++++++++++++++++++---------- > > 2 files changed, 98 insertions(+), 42 deletions(-) > > > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > > index 080660ef11bf..0f949896fd06 100644 > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > @@ -68,7 +68,9 @@ void mtk_mmsys_ddp_connect(struct device *dev, > > > > for (i = 0; i < mmsys->data->num_routes; i++) > > if (cur == routes[i].from_comp && next == routes[i].to_comp) { > > - reg = readl_relaxed(mmsys->regs + routes[i].addr) | routes[i].val; > > + reg = readl_relaxed(mmsys->regs + routes[i].addr); > > + reg &= ~routes[i].mask; > > + reg |= routes[i].val; > > writel_relaxed(reg, mmsys->regs + routes[i].addr); > > } > > } > > @@ -85,7 +87,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, > > > > for (i = 0; i < mmsys->data->num_routes; i++) > > if (cur == routes[i].from_comp && next == routes[i].to_comp) { > > - reg = readl_relaxed(mmsys->regs + routes[i].addr) & ~routes[i].val; > > + reg = readl_relaxed(mmsys->regs + routes[i].addr); > > + reg &= ~routes[i].mask; > > This patch is breaking the mt8183 internal display. I think it's > because ~routes[i].val; is removed? > Also what should the routes[i].mask be if it's not set in > mmsys_mt8183_routing_table? I'm not sure this problem is about MOUT or SOUT. But for MOUT, it's not necessary to set mask because the value is equal to mask. To make thins simple, the code could be /* For MOUT, value is equal to mask, so mask is 0 and clear the value */ reg &= ~routes[i].mask & ~routes[i].val; Regards, CK > > > writel_relaxed(reg, mmsys->regs + routes[i].addr); > > } > > } > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBFD4C432BE for ; Thu, 29 Jul 2021 03:42:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF3C86101C for ; Thu, 29 Jul 2021 03:42:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233650AbhG2Dmk (ORCPT ); Wed, 28 Jul 2021 23:42:40 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:48088 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233553AbhG2Dmi (ORCPT ); Wed, 28 Jul 2021 23:42:38 -0400 X-UUID: b7c7981fbe13443dad4c914c3cb8bc6f-20210729 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=g/h6d5ht0Kz0+npXpy03sIdKmA8QrRfO6V6rBdcyB/E=; b=rtc7fWTZ1a/NQaHEu0naUj1+QF6Q9N22WuGae/iTfkcWw71ghZrira85urEdjDYaesMBevS27+Hh1nngrxiwY4eAqqzzHkpimNTOmCC0cv39TZMfu/zfoStpXOSVNtGoQqMkKrL7giifII/fz0qZWEmnRKdrCybySgEctnFNJLM=; X-UUID: b7c7981fbe13443dad4c914c3cb8bc6f-20210729 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 996941046; Thu, 29 Jul 2021 11:42:33 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 29 Jul 2021 11:42:31 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 29 Jul 2021 11:42:31 +0800 Message-ID: <1627530151.32756.9.camel@mtksdaap41> Subject: Re: [PATCH] soc: mmsys: mediatek: add mask to mmsys routes From: CK Hu To: Hsin-Yi Wang CC: Frank Wunderlich , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Enric Balletbo i Serra , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , lkml , , Frank Wunderlich Date: Thu, 29 Jul 2021 11:42:31 +0800 In-Reply-To: References: <20210727174025.10552-1-linux@fw-web.de> Content-Type: text/plain; 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