From: Thomas Monjalon <thomas@monjalon.net>
To: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Cc: stable@dpdk.org, bruce.richardson@intel.com, dev@dpdk.org
Subject: Re: [dpdk-stable] [PATCH 1/2] test/hash: fix multiwriter with non consecutive cores
Date: Thu, 26 Jul 2018 21:55:49 +0200 [thread overview]
Message-ID: <1638259.uLXcVBnkju@xps> (raw)
In-Reply-To: <20180717133151.30065-1-pablo.de.lara.guarch@intel.com>
17/07/2018 15:31, Pablo de Lara:
> When non consecutive cores are passed into the test application,
> the distribution of the keys that each thread needs to insert
> is not correct, since it assumes that there are no cores skipped
> between the master core and the worker core.
>
> Fixes: be856325cba3 ("hash: add scalable multi-writer insertion with Intel TSX")
> Cc: stable@dpdk.org
>
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Series applied, thanks
prev parent reply other threads:[~2018-07-26 19:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-17 13:31 [PATCH 1/2] test/hash: fix multiwriter with non consecutive cores Pablo de Lara
2018-07-17 13:31 ` [PATCH 2/2] test/hash: fix potential memory leak Pablo de Lara
2018-07-26 19:55 ` Thomas Monjalon [this message]
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