diff for duplicates of <1642221.rsatzvhHS5@wasted.cogentembedded.com> diff --git a/a/1.txt b/N1/1.txt index 561e140..3692b71 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -32,7 +32,7 @@ Index: renesas/arch/arm/boot/dts/r8a7792.dtsi }; /* Gate clocks */ -+ mstp0_clks: mstp0_clks@e6150130 { ++ mstp0_clks: mstp0_clks at e6150130 { + compatible = "renesas,r8a7792-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; @@ -41,7 +41,7 @@ Index: renesas/arch/arm/boot/dts/r8a7792.dtsi + clock-indices = <R8A7792_CLK_MSIOF0>; + clock-output-names = "msiof0"; + }; - mstp1_clks: mstp1_clks@e6150134 { + mstp1_clks: mstp1_clks at e6150134 { compatible = "renesas,r8a7792-mstp-clocks", "renesas,cpg-mstp-clocks"; @@ -811,12 +827,13 @@ @@ -58,5 +58,5 @@ Index: renesas/arch/arm/boot/dts/r8a7792.dtsi - clock-output-names = "sys-dmac1", "sys-dmac0"; + clock-output-names = "msiof1", "sys-dmac1", "sys-dmac0"; }; - mstp3_clks: mstp3_clks@e615013c { + mstp3_clks: mstp3_clks at e615013c { compatible = "renesas,r8a7792-mstp-clocks", diff --git a/a/content_digest b/N1/content_digest index c1fc69f..76dfd4d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,15 +1,8 @@ "ref\02481458.x1iQg26kO7@wasted.cogentembedded.com\0" - "From\0Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>\0" + "From\0sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)\0" "Subject\0[PATCH 1/2] ARM: dts: r8a7792: add MSIOF clocks\0" "Date\0Mon, 05 Sep 2016 23:55:01 +0300\0" - "To\0horms@verge.net.au" - linux-renesas-soc@vger.kernel.org - robh+dt@kernel.org - mark.rutland@arm.com - " devicetree@vger.kernel.org\0" - "Cc\0magnus.damm@gmail.com" - linux@arm.linux.org.uk - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Describe the MSIOF0/1 clocks and their parent, MP clock in the R8A7792\n" @@ -46,7 +39,7 @@ " \t\t};\n" " \n" " \t\t/* Gate clocks */\n" - "+\t\tmstp0_clks: mstp0_clks@e6150130 {\n" + "+\t\tmstp0_clks: mstp0_clks at e6150130 {\n" "+\t\t\tcompatible = \"renesas,r8a7792-mstp-clocks\",\n" "+\t\t\t\t \"renesas,cpg-mstp-clocks\";\n" "+\t\t\treg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;\n" @@ -55,7 +48,7 @@ "+\t\t\tclock-indices = <R8A7792_CLK_MSIOF0>;\n" "+\t\t\tclock-output-names = \"msiof0\";\n" "+\t\t};\n" - " \t\tmstp1_clks: mstp1_clks@e6150134 {\n" + " \t\tmstp1_clks: mstp1_clks at e6150134 {\n" " \t\t\tcompatible = \"renesas,r8a7792-mstp-clocks\",\n" " \t\t\t\t \"renesas,cpg-mstp-clocks\";\n" "@@ -811,12 +827,13 @@\n" @@ -72,7 +65,7 @@ "-\t\t\tclock-output-names = \"sys-dmac1\", \"sys-dmac0\";\n" "+\t\t\tclock-output-names = \"msiof1\", \"sys-dmac1\", \"sys-dmac0\";\n" " \t\t};\n" - " \t\tmstp3_clks: mstp3_clks@e615013c {\n" + " \t\tmstp3_clks: mstp3_clks at e615013c {\n" " \t\t\tcompatible = \"renesas,r8a7792-mstp-clocks\"," -1bc7503bc2d90899baf8aa8cffbf90fb2e68d809d0e7d7f839f72be2268b3cf8 +7767ef72c3f68884581104cbefd20c2f74c003950c5ee5850bb794f1a942199c
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