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From: <gregkh@linuxfoundation.org>
To: andre.przywara@arm.com,ardb@kernel.org,caij2003@gmail.com,catalin.marinas@arm.com,clang-built-linux@googlegroups.com,davem@davemloft.net,f.fainelli@gmail.com,gregkh@linuxfoundation.org,herbert@gondor.apana.org.au,jiancai@google.com,linux-arm-kernel@lists.infradead.org,linux@armlinux.org.uk,maskray@google.com,ndesaulniers@google.com,nico@fluxnic.net,peter.smith@linaro.org,rmk+kernel@armlinux.org.uk,sashal@kernel.org,stefan@agner.ch,tony@atomide.com,ulli.kroll@googlemail.com
Cc: <stable-commits@vger.kernel.org>
Subject: Patch "ARM: 8933/1: replace Sun/Solaris style flag on section directive" has been added to the 5.4-stable tree
Date: Thu, 30 Jun 2022 15:29:30 +0200	[thread overview]
Message-ID: <165659577010898@kroah.com> (raw)
In-Reply-To: <20220629180227.3408104-7-f.fainelli@gmail.com>


This is a note to let you know that I've just added the patch titled

    ARM: 8933/1: replace Sun/Solaris style flag on section directive

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-8933-1-replace-sun-solaris-style-flag-on-section-directive.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


From foo@baz Thu Jun 30 03:27:07 PM CEST 2022
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Wed, 29 Jun 2022 11:02:22 -0700
Subject: ARM: 8933/1: replace Sun/Solaris style flag on section directive
To: stable@vger.kernel.org
Cc: Nick Desaulniers <ndesaulniers@google.com>, Nicolas Pitre <nico@fluxnic.net>, Ard Biesheuvel <ardb@kernel.org>, Stefan Agner <stefan@agner.ch>, Fangrui Song <maskray@google.com>, Jian Cai <jiancai@google.com>, Peter Smith <peter.smith@linaro.org>, Russell King <rmk+kernel@armlinux.org.uk>, Florian Fainelli <f.fainelli@gmail.com>, Russell King <linux@armlinux.org.uk>, Herbert Xu <herbert@gondor.apana.org.au>, "David S. Miller" <davem@davemloft.net>, Tony Lindgren <tony@atomide.com>, Hans Ulli Kroll <ulli.kroll@googlemail.com>, Andre Przywara <andre.przywara@arm.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Catalin Marinas <catalin.marinas@arm.com>, Jian Cai <caij2003@gmail.com>, linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), linux-kernel@vger.kernel.org (open list), linux-crypto@vger.kernel.org (open list:CRYPTO API), linux-omap@vger.kernel.org (open list:OMAP2+ SUPPORT), clang-built-linux@googlegroups.com (open list:CLANG/LLVM BUILD SUPPORT), Sasha Levin
  <sashal@kernel.org>
Message-ID: <20220629180227.3408104-7-f.fainelli@gmail.com>

From: Nick Desaulniers <ndesaulniers@google.com>

commit 790756c7e0229dedc83bf058ac69633045b1000e upstream

It looks like a section directive was using "Solaris style" to declare
the section flags. Replace this with the GNU style so that Clang's
integrated assembler can assemble this directive.

The modified instances were identified via:
$ ag \.section | grep #

Link: https://ftp.gnu.org/old-gnu/Manuals/gas-2.9.1/html_chapter/as_7.html#SEC119
Link: https://github.com/ClangBuiltLinux/linux/issues/744
Link: https://bugs.llvm.org/show_bug.cgi?id=43759
Link: https://reviews.llvm.org/D69296

Acked-by: Nicolas Pitre <nico@fluxnic.net>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Suggested-by: Fangrui Song <maskray@google.com>
Suggested-by: Jian Cai <jiancai@google.com>
Suggested-by: Peter Smith <peter.smith@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm/boot/bootp/init.S            |    2 +-
 arch/arm/boot/compressed/big-endian.S |    2 +-
 arch/arm/boot/compressed/head.S       |    2 +-
 arch/arm/boot/compressed/piggy.S      |    2 +-
 arch/arm/mm/proc-arm1020.S            |    2 +-
 arch/arm/mm/proc-arm1020e.S           |    2 +-
 arch/arm/mm/proc-arm1022.S            |    2 +-
 arch/arm/mm/proc-arm1026.S            |    2 +-
 arch/arm/mm/proc-arm720.S             |    2 +-
 arch/arm/mm/proc-arm740.S             |    2 +-
 arch/arm/mm/proc-arm7tdmi.S           |    2 +-
 arch/arm/mm/proc-arm920.S             |    2 +-
 arch/arm/mm/proc-arm922.S             |    2 +-
 arch/arm/mm/proc-arm925.S             |    2 +-
 arch/arm/mm/proc-arm926.S             |    2 +-
 arch/arm/mm/proc-arm940.S             |    2 +-
 arch/arm/mm/proc-arm946.S             |    2 +-
 arch/arm/mm/proc-arm9tdmi.S           |    2 +-
 arch/arm/mm/proc-fa526.S              |    2 +-
 arch/arm/mm/proc-feroceon.S           |    2 +-
 arch/arm/mm/proc-mohawk.S             |    2 +-
 arch/arm/mm/proc-sa110.S              |    2 +-
 arch/arm/mm/proc-sa1100.S             |    2 +-
 arch/arm/mm/proc-v6.S                 |    2 +-
 arch/arm/mm/proc-v7.S                 |    2 +-
 arch/arm/mm/proc-v7m.S                |    4 ++--
 arch/arm/mm/proc-xsc3.S               |    2 +-
 arch/arm/mm/proc-xscale.S             |    2 +-
 28 files changed, 29 insertions(+), 29 deletions(-)

--- a/arch/arm/boot/bootp/init.S
+++ b/arch/arm/boot/bootp/init.S
@@ -13,7 +13,7 @@
  *  size immediately following the kernel, we could build this into
  *  a binary blob, and concatenate the zImage using the cat command.
  */
-		.section .start,#alloc,#execinstr
+		.section .start, "ax"
 		.type	_start, #function
 		.globl	_start
 
--- a/arch/arm/boot/compressed/big-endian.S
+++ b/arch/arm/boot/compressed/big-endian.S
@@ -6,7 +6,7 @@
  *  Author: Nicolas Pitre
  */
 
-	.section ".start", #alloc, #execinstr
+	.section ".start", "ax"
 
 	mrc	p15, 0, r0, c1, c0, 0	@ read control reg
 	orr	r0, r0, #(1 << 7)	@ enable big endian mode
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -140,7 +140,7 @@
 #endif
 		.endm
 
-		.section ".start", #alloc, #execinstr
+		.section ".start", "ax"
 /*
  * sort out different calling conventions
  */
--- a/arch/arm/boot/compressed/piggy.S
+++ b/arch/arm/boot/compressed/piggy.S
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-	.section .piggydata,#alloc
+	.section .piggydata, "a"
 	.globl	input_data
 input_data:
 	.incbin	"arch/arm/boot/compressed/piggy_data"
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -491,7 +491,7 @@ cpu_arm1020_name:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm1020_proc_info,#object
 __arm1020_proc_info:
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -449,7 +449,7 @@ arm1020e_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm1020e_proc_info,#object
 __arm1020e_proc_info:
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -443,7 +443,7 @@ arm1022_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm1022_proc_info,#object
 __arm1022_proc_info:
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -437,7 +437,7 @@ arm1026_crval:
 	string	cpu_arm1026_name, "ARM1026EJ-S"
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm1026_proc_info,#object
 __arm1026_proc_info:
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -172,7 +172,7 @@ arm720_crval:
  * See <asm/procinfo.h> for a definition of this structure.
  */
 	
-		.section ".proc.info.init", #alloc
+		.section ".proc.info.init", "a"
 
 .macro arm720_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cpu_flush:req
 		.type	__\name\()_proc_info,#object
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -128,7 +128,7 @@ __arm740_setup:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 	.type	__arm740_proc_info,#object
 __arm740_proc_info:
 	.long	0x41807400
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -72,7 +72,7 @@ __arm7tdmi_setup:
 
 		.align
 
-		.section ".proc.info.init", #alloc
+		.section ".proc.info.init", "a"
 
 .macro arm7tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, \
 	extra_hwcaps=0
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -434,7 +434,7 @@ arm920_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm920_proc_info,#object
 __arm920_proc_info:
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -412,7 +412,7 @@ arm922_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm922_proc_info,#object
 __arm922_proc_info:
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -477,7 +477,7 @@ arm925_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 .macro arm925_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache
 	.type	__\name\()_proc_info,#object
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -460,7 +460,7 @@ arm926_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm926_proc_info,#object
 __arm926_proc_info:
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -340,7 +340,7 @@ __arm940_setup:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__arm940_proc_info,#object
 __arm940_proc_info:
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -395,7 +395,7 @@ __arm946_setup:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 	.type	__arm946_proc_info,#object
 __arm946_proc_info:
 	.long	0x41009460
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -66,7 +66,7 @@ __arm9tdmi_setup:
 
 		.align
 
-		.section ".proc.info.init", #alloc
+		.section ".proc.info.init", "a"
 
 .macro arm9tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req
 		.type	__\name\()_proc_info, #object
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -185,7 +185,7 @@ fa526_cr1_set:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__fa526_proc_info,#object
 __fa526_proc_info:
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -571,7 +571,7 @@ feroceon_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 .macro feroceon_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache:req
 	.type	__\name\()_proc_info,#object
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -416,7 +416,7 @@ mohawk_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__88sv331x_proc_info,#object
 __88sv331x_proc_info:
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -196,7 +196,7 @@ sa110_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	.type	__sa110_proc_info,#object
 __sa110_proc_info:
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -239,7 +239,7 @@ sa1100_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 .macro sa1100_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req
 	.type	__\name\()_proc_info,#object
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -261,7 +261,7 @@ v6_crval:
 	string	cpu_elf_name, "v6"
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	/*
 	 * Match any ARMv6 processor core.
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -644,7 +644,7 @@ __v7_setup_stack:
 	string	cpu_elf_name, "v7"
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 	/*
 	 * Standard v7 proc info content
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -93,7 +93,7 @@ ENTRY(cpu_cm7_proc_fin)
 	ret	lr
 ENDPROC(cpu_cm7_proc_fin)
 
-	.section ".init.text", #alloc, #execinstr
+	.section ".init.text", "ax"
 
 __v7m_cm7_setup:
 	mov	r8, #(V7M_SCB_CCR_DC | V7M_SCB_CCR_IC| V7M_SCB_CCR_BP)
@@ -177,7 +177,7 @@ ENDPROC(__v7m_setup)
 	string cpu_elf_name "v7m"
 	string cpu_v7m_name "ARMv7-M"
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 .macro __v7m_proc name, initfunc, cache_fns = nop_cache_fns, hwcaps = 0,  proc_fns = v7m_processor_functions
 	.long	0			/* proc_info_list.__cpu_mm_mmu_flags */
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -496,7 +496,7 @@ xsc3_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 .macro xsc3_proc_info name:req, cpu_val:req, cpu_mask:req
 	.type	__\name\()_proc_info,#object
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -610,7 +610,7 @@ xscale_crval:
 
 	.align
 
-	.section ".proc.info.init", #alloc
+	.section ".proc.info.init", "a"
 
 .macro xscale_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache
 	.type	__\name\()_proc_info,#object


Patches currently in stable-queue which might be from f.fainelli@gmail.com are

queue-5.4/arm-8971-1-replace-the-sole-use-of-a-symbol-with-its-definition.patch
queue-5.4/arm-omap2-drop-unnecessary-adrl.patch
queue-5.4/arm-8933-1-replace-sun-solaris-style-flag-on-section-directive.patch
queue-5.4/crypto-arm-sha256-neon-avoid-adrl-pseudo-instruction.patch
queue-5.4/arm-9029-1-make-iwmmxt.s-support-clang-s-integrated-assembler.patch
queue-5.4/net-mscc-ocelot-allow-unregistered-ip-multicast-flooding.patch
queue-5.4/crypto-arm-sha512-neon-avoid-adrl-pseudo-instruction.patch
queue-5.4/arm-8989-1-use-.fpu-assembler-directives-instead-of-assembler-arguments.patch
queue-5.4/crypto-arm-ghash-ce-define-fpu-before-fpu-registers-are-referenced.patch
queue-5.4/arm-8929-1-use-apsr_nzcv-instead-of-r15-as-mrc-operand.patch
queue-5.4/crypto-arm-use-kconfig-based-compiler-checks-for-crypto-opcodes.patch
queue-5.4/arm-8990-1-use-vfp-assembler-mnemonics-in-register-load-store-macros.patch

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  reply	other threads:[~2022-06-30 13:31 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-29 18:02 [PATCH stable 5.4 00/11] ARM 32-bit build with Clang IAS Florian Fainelli
2022-06-29 18:02 ` Florian Fainelli
2022-06-29 18:02 ` [PATCH stable 5.4 01/11] ARM: 8989/1: use .fpu assembler directives instead of assembler arguments Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "ARM: 8989/1: use .fpu assembler directives instead of assembler arguments" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 02/11] ARM: 8990/1: use VFP assembler mnemonics in register load/store macros Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "ARM: 8990/1: use VFP assembler mnemonics in register load/store macros" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 03/11] ARM: 8971/1: replace the sole use of a symbol with its definition Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "ARM: 8971/1: replace the sole use of a symbol with its definition" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 04/11] crypto: arm/sha256-neon - avoid ADRL pseudo instruction Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "crypto: arm/sha256-neon - avoid ADRL pseudo instruction" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 05/11] crypto: arm/sha512-neon - avoid ADRL pseudo instruction Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "crypto: arm/sha512-neon - avoid ADRL pseudo instruction" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 06/11] ARM: 8933/1: replace Sun/Solaris style flag on section directive Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` gregkh [this message]
2022-06-29 18:02 ` [PATCH stable 5.4 07/11] ARM: 8929/1: use APSR_nzcv instead of r15 as mrc operand Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "ARM: 8929/1: use APSR_nzcv instead of r15 as mrc operand" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 08/11] ARM: OMAP2+: drop unnecessary adrl Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "ARM: OMAP2+: drop unnecessary adrl" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 09/11] ARM: 9029/1: Make iwmmxt.S support Clang's integrated assembler Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "ARM: 9029/1: Make iwmmxt.S support Clang's integrated assembler" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 10/11] crypto: arm - use Kconfig based compiler checks for crypto opcodes Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "crypto: arm - use Kconfig based compiler checks for crypto opcodes" has been added to the 5.4-stable tree gregkh
2022-06-29 18:02 ` [PATCH stable 5.4 11/11] crypto: arm/ghash-ce - define fpu before fpu registers are referenced Florian Fainelli
2022-06-29 18:02   ` Florian Fainelli
2022-06-30 13:29   ` Patch "crypto: arm/ghash-ce - define fpu before fpu registers are referenced" has been added to the 5.4-stable tree gregkh
2022-06-30 13:29 ` [PATCH stable 5.4 00/11] ARM 32-bit build with Clang IAS Greg Kroah-Hartman
2022-06-30 13:29   ` Greg Kroah-Hartman

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