From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A6CBBC43334 for ; Thu, 30 Jun 2022 13:31:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:In-Reply-To: Date:From:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=XRilaE7Bi8pc8pZwavNsJL13LzMeM76+2ooBPW2JtGQ=; b=PQOMr9rmrBkcLm JbvdI52xPJ4ZKdBZvIDzQBgEY+UWJGoOGQvgyAPVl4Zjfg/WWuEZsXYaY0/U2tKjENmZWL9XtNMCa 7/negiIlWEl/ah+KpwG6/NtI0puMy+EzN2aSrTNc3boRTkA4x2PsO8SAQn+jm4z7OwnPGJqar/6/J 97uffS9fD83h7P3WG9WKoVTNOxyl6nujoNTENNEgsLdyH6QoG5QC+Qlqq/trzYLnrHq1NFp/5zvuR L1YNY0E8zcWkQ3JrWVpp8Qas7s7xrfUqhOdEFAiU6VqQa5HlX59xMP7gqmc18c9++ddJeIg2fJVan wXn/X3uCjmrBxobKi29Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6uF3-00HIiF-UX; Thu, 30 Jun 2022 13:29:58 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6uEt-00HIea-FG for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2022 13:29:49 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id F33E1B82AC0; Thu, 30 Jun 2022 13:29:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 10CC3C34115; Thu, 30 Jun 2022 13:29:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1656595784; bh=UpRncBgKtI71ObmVUDSJD+UWUFambTQ9t0gYeow5e5I=; h=Subject:To:Cc:From:Date:In-Reply-To:From; b=qmhnVV/v02rEfTz2bEfpS14uYMbci0tgE2ikEp8WXkgrVQvRB2ZQg8WjHnUfkXExB MKRtIz7jaPiUXJUq3rstutphdAVUQP9BDWkD+o6d6uYCwZcKmrRzXUfKK3jr3BvOTo N3HJ9MKhDxMvAlQOOzLDeHSdySxy1dvQWEZxloDU= Subject: Patch "ARM: 8929/1: use APSR_nzcv instead of r15 as mrc operand" has been added to the 5.4-stable tree To: andre.przywara@arm.com,ardb@kernel.org,caij2003@gmail.com,catalin.marinas@arm.com,clang-built-linux@googlegroups.com,davem@davemloft.net,f.fainelli@gmail.com,gregkh@linuxfoundation.org,herbert@gondor.apana.org.au,linux-arm-kernel@lists.infradead.org,linux@armlinux.org.uk,ndesaulniers@google.com,nico@fluxnic.net,rmk+kernel@armlinux.org.uk,sashal@kernel.org,stefan@agner.ch,tony@atomide.com,ulli.kroll@googlemail.com Cc: From: Date: Thu, 30 Jun 2022 15:29:30 +0200 In-Reply-To: <20220629180227.3408104-8-f.fainelli@gmail.com> Message-ID: <1656595770211170@kroah.com> MIME-Version: 1.0 X-stable: commit X-Patchwork-Hint: ignore X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_062947_835717_0DF046AD X-CRM114-Status: GOOD ( 15.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a note to let you know that I've just added the patch titled ARM: 8929/1: use APSR_nzcv instead of r15 as mrc operand to the 5.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm-8929-1-use-apsr_nzcv-instead-of-r15-as-mrc-operand.patch and it can be found in the queue-5.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >From foo@baz Thu Jun 30 03:27:07 PM CEST 2022 From: Florian Fainelli Date: Wed, 29 Jun 2022 11:02:23 -0700 Subject: ARM: 8929/1: use APSR_nzcv instead of r15 as mrc operand To: stable@vger.kernel.org Cc: Stefan Agner , Russell King , Florian Fainelli , Russell King , Herbert Xu , "David S. Miller" , Tony Lindgren , Hans Ulli Kroll , Ard Biesheuvel , Nick Desaulniers , Nicolas Pitre , Andre Przywara , Greg Kroah-Hartman , Catalin Marinas , Jian Cai , linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), linux-kernel@vger.kernel.org (open list), linux-crypto@vger.kernel.org (open list:CRYPTO API), linux-omap@vger.kernel.org (open list:OMAP2+ SUPPORT), clang-built-linux@googlegroups.com (open list:CLANG/LLVM BUILD SUPPORT), Sasha Levin Message-ID: <20220629180227.3408104-8-f.fainelli@gmail.com> From: Stefan Agner commit 9f1984c6ae30e2a379751339ce3375a21099b5d4 upstream LLVM's integrated assembler does not accept r15 as mrc operand. arch/arm/boot/compressed/head.S:1267:16: error: operand must be a register in range [r0, r14] or apsr_nzcv 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache ^ Use APSR_nzcv instead of r15. The GNU assembler supports this syntax since binutils 2.21 [0]. [0] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=db472d6ff0f438a21b357249a9b48e4b74498076 Signed-off-by: Stefan Agner Signed-off-by: Russell King Signed-off-by: Florian Fainelli Signed-off-by: Greg Kroah-Hartman --- arch/arm/boot/compressed/head.S | 2 +- arch/arm/mm/proc-arm1026.S | 4 ++-- arch/arm/mm/proc-arm926.S | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -1274,7 +1274,7 @@ iflush: __armv5tej_mmu_cache_flush: tst r4, #1 movne pc, lr -1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache +1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate D cache bne 1b mcr p15, 0, r0, c7, c5, 0 @ flush I cache mcr p15, 0, r0, c7, c10, 4 @ drain WB --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -138,7 +138,7 @@ ENTRY(arm1026_flush_kern_cache_all) mov ip, #0 __flush_whole_cache: #ifndef CONFIG_CPU_DCACHE_DISABLE -1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate +1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test, clean, invalidate bne 1b #endif tst r2, #VM_EXEC @@ -363,7 +363,7 @@ ENTRY(cpu_arm1026_switch_mm) #ifdef CONFIG_MMU mov r1, #0 #ifndef CONFIG_CPU_DCACHE_DISABLE -1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate +1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test, clean, invalidate bne 1b #endif #ifndef CONFIG_CPU_ICACHE_DISABLE --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -131,7 +131,7 @@ __flush_whole_cache: #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache #else -1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate +1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate bne 1b #endif tst r2, #VM_EXEC @@ -358,7 +358,7 @@ ENTRY(cpu_arm926_switch_mm) mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache #else @ && 'Clean & Invalidate whole DCache' -1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate +1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate bne 1b #endif mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache Patches currently in stable-queue which might be from f.fainelli@gmail.com are queue-5.4/arm-8971-1-replace-the-sole-use-of-a-symbol-with-its-definition.patch queue-5.4/arm-omap2-drop-unnecessary-adrl.patch queue-5.4/arm-8933-1-replace-sun-solaris-style-flag-on-section-directive.patch queue-5.4/crypto-arm-sha256-neon-avoid-adrl-pseudo-instruction.patch queue-5.4/arm-9029-1-make-iwmmxt.s-support-clang-s-integrated-assembler.patch queue-5.4/net-mscc-ocelot-allow-unregistered-ip-multicast-flooding.patch queue-5.4/crypto-arm-sha512-neon-avoid-adrl-pseudo-instruction.patch queue-5.4/arm-8989-1-use-.fpu-assembler-directives-instead-of-assembler-arguments.patch queue-5.4/crypto-arm-ghash-ce-define-fpu-before-fpu-registers-are-referenced.patch queue-5.4/arm-8929-1-use-apsr_nzcv-instead-of-r15-as-mrc-operand.patch queue-5.4/crypto-arm-use-kconfig-based-compiler-checks-for-crypto-opcodes.patch queue-5.4/arm-8990-1-use-vfp-assembler-mnemonics-in-register-load-store-macros.patch _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel