From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69403C43334 for ; Thu, 30 Jun 2022 13:34:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:In-Reply-To: Date:From:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=pJAsZZepwnHoJLpdpKHtwwuiqfmKbWLzNKI+S2BvV6w=; b=tR1ACu9XmOMkvn FL5hL0flWgVUGnlsQH7Vx7/Ha+ffg8uRC5l87RcwSCfZ9wfSQdgd+d+YbR8f4ST/schVJccMRwBbG ti8DeF9lA6fJuovUcwc25x7jYhci//W+PLeGfvhbgZGbYHnIYZjex4tjtgGg5vm4WTOJ4Qh8PAsrX DeLAWAkv8m1+UGXi93J2qJ7/jo/kiRjJevRPOG90l50SZrJUSeg3ujMRkOUkoAXaNA2SgYW2nWTWL O7Dk0WW9ZcyGLpD7Sb0Q8CWvLSinQpsouE1TiHu0lnbyIseFZeQlkBI2zX8EdOxETrUmh6x+KrY5s OXALgyj8YWfcxaS89dkA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6uI7-00HKCI-LW; Thu, 30 Jun 2022 13:33:07 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6uFS-00HIqm-JS for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2022 13:30:25 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 44A09B82AC5; Thu, 30 Jun 2022 13:30:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A5505C34115; Thu, 30 Jun 2022 13:30:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1656595820; bh=qV7QwYNbInlH/N8VUD4hkxCMYZLLX6ng1DW2utMvDzs=; h=Subject:To:Cc:From:Date:In-Reply-To:From; b=rB5GP40pNQhaDn7YS66HawOfbQNmYw77utg2UM5HzxI3NB83Qdq0cVpG87JjENKpk Cov5OFYxmBhemaIBG1dl+KZUzQXzcvqcc57TDV39A1XX8ierNCxKaWZTlU+zgB/P/i 0TwUxXmbiwI+OWeiaXTBPZ/PQuUdE/4tENnEyqFc= Subject: Patch "ARM: 8990/1: use VFP assembler mnemonics in register load/store macros" has been added to the 5.4-stable tree To: andre.przywara@arm.com,ardb@kernel.org,caij2003@gmail.com,catalin.marinas@arm.com,clang-built-linux@googlegroups.com,davem@davemloft.net,f.fainelli@gmail.com,gregkh@linuxfoundation.org,herbert@gondor.apana.org.au,linux-arm-kernel@lists.infradead.org,linux@armlinux.org.uk,ndesaulniers@google.com,nico@fluxnic.net,rmk+kernel@armlinux.org.uk,sashal@kernel.org,stefan@agner.ch,tony@atomide.com,ulli.kroll@googlemail.com Cc: From: Date: Thu, 30 Jun 2022 15:29:31 +0200 In-Reply-To: <20220629180227.3408104-3-f.fainelli@gmail.com> Message-ID: <165659577150129@kroah.com> MIME-Version: 1.0 X-stable: commit X-Patchwork-Hint: ignore X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_063022_997115_40A1DCD9 X-CRM114-Status: GOOD ( 16.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a note to let you know that I've just added the patch titled ARM: 8990/1: use VFP assembler mnemonics in register load/store macros to the 5.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm-8990-1-use-vfp-assembler-mnemonics-in-register-load-store-macros.patch and it can be found in the queue-5.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >From foo@baz Thu Jun 30 03:27:07 PM CEST 2022 From: Florian Fainelli Date: Wed, 29 Jun 2022 11:02:18 -0700 Subject: ARM: 8990/1: use VFP assembler mnemonics in register load/store macros To: stable@vger.kernel.org Cc: Stefan Agner , Russell King , Florian Fainelli , Russell King , Herbert Xu , "David S. Miller" , Tony Lindgren , Hans Ulli Kroll , Ard Biesheuvel , Nick Desaulniers , Nicolas Pitre , Andre Przywara , Greg Kroah-Hartman , Catalin Marinas , Jian Cai , linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), linux-kernel@vger.kernel.org (open list), linux-crypto@vger.kernel.org (open list:CRYPTO API), linux-omap@vger.kernel.org (open list:OMAP2+ SUPPORT), clang-built-linux@googlegroups.com (open list:CLANG/LLVM BUILD SUPPORT), Sasha Levin Message-ID: <20220629180227.3408104-3-f.fainelli@gmail.com> From: Stefan Agner commit ee440336e5ef977c397afdb72cbf9c6b8effc8ea upstream The integrated assembler of Clang 10 and earlier do not allow to access the VFP registers through the coprocessor load/store instructions: :4:6: error: invalid operand for instruction LDC p11, cr0, [r10],#32*4 @ FLDMIAD r10!, {d0-d15} ^ This has been addressed with Clang 11 [0]. However, to support earlier versions of Clang and for better readability use of VFP assembler mnemonics still is preferred. Replace the coprocessor load/store instructions with explicit assembler mnemonics to accessing the floating point coprocessor registers. Use assembler directives to select the appropriate FPU version. This allows to build these macros with GNU assembler as well as with Clang's built-in assembler. [0] https://reviews.llvm.org/D59733 Link: https://github.com/ClangBuiltLinux/linux/issues/905 Signed-off-by: Stefan Agner Signed-off-by: Russell King Signed-off-by: Florian Fainelli Signed-off-by: Greg Kroah-Hartman --- arch/arm/include/asm/vfpmacros.h | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h @@ -19,23 +19,25 @@ @ read all the working registers back into the VFP .macro VFPFLDMIA, base, tmp + .fpu vfpv2 #if __LINUX_ARM_ARCH__ < 6 - LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} + fldmiax \base!, {d0-d15} #else - LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} + vldmia \base!, {d0-d15} #endif #ifdef CONFIG_VFPv3 + .fpu vfpv3 #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] tst \tmp, #HWCAP_VFPD32 - ldclne p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} + vldmiane \base!, {d16-d31} addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field cmp \tmp, #2 @ 32 x 64bit registers? - ldcleq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} + vldmiaeq \base!, {d16-d31} addne \base, \base, #32*4 @ step over unused register space #endif #endif @@ -44,22 +46,23 @@ @ write all the working registers out of the VFP .macro VFPFSTMIA, base, tmp #if __LINUX_ARM_ARCH__ < 6 - STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} + fstmiax \base!, {d0-d15} #else - STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} + vstmia \base!, {d0-d15} #endif #ifdef CONFIG_VFPv3 + .fpu vfpv3 #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] tst \tmp, #HWCAP_VFPD32 - stclne p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} + vstmiane \base!, {d16-d31} addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field cmp \tmp, #2 @ 32 x 64bit registers? - stcleq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} + vstmiaeq \base!, {d16-d31} addne \base, \base, #32*4 @ step over unused register space #endif #endif Patches currently in stable-queue which might be from f.fainelli@gmail.com are queue-5.4/arm-8971-1-replace-the-sole-use-of-a-symbol-with-its-definition.patch queue-5.4/arm-omap2-drop-unnecessary-adrl.patch queue-5.4/arm-8933-1-replace-sun-solaris-style-flag-on-section-directive.patch queue-5.4/crypto-arm-sha256-neon-avoid-adrl-pseudo-instruction.patch queue-5.4/arm-9029-1-make-iwmmxt.s-support-clang-s-integrated-assembler.patch queue-5.4/net-mscc-ocelot-allow-unregistered-ip-multicast-flooding.patch queue-5.4/crypto-arm-sha512-neon-avoid-adrl-pseudo-instruction.patch queue-5.4/arm-8989-1-use-.fpu-assembler-directives-instead-of-assembler-arguments.patch queue-5.4/crypto-arm-ghash-ce-define-fpu-before-fpu-registers-are-referenced.patch queue-5.4/arm-8929-1-use-apsr_nzcv-instead-of-r15-as-mrc-operand.patch queue-5.4/crypto-arm-use-kconfig-based-compiler-checks-for-crypto-opcodes.patch queue-5.4/arm-8990-1-use-vfp-assembler-mnemonics-in-register-load-store-macros.patch _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel