Re: [PATCH v5 2/9] rockchip: doc: add mask ROM mode text

[Quentin Schulz via U-Boot <u-boot@lists.u-boot-project.org>]

Hi Johan,

On 8/6/26 1:10 PM, Johan Jonker wrote:
> Add text that explains how to get into mask ROM mode.
> 
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> 
> Changed V5:
> reword
> ---
>   doc/board/rockchip/rockchip.rst | 25 +++++++++++++++++++++++--
>   1 file changed, 23 insertions(+), 2 deletions(-)
> 
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index de2df3046e28..af6c08c46636 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -325,6 +325,27 @@ To build rk3588 boards:
>           make evb-rk3588_defconfig
>           make CROSS_COMPILE=aarch64-linux-gnu-
>   
> +Mask ROM mode
> +-------------
> +
> +Mask ROM mode is the fallback mode of the boot ROM,
> +in which it listens for USB commands 0x471/0x472.
> +
> +Options to get your board into Mask ROM mode:
> +
> +* Hold the recovery button, depending on firmware support or wiring,
> +  while booting the board.
> +* Remove any SD cards, removable eMMC or removable UFS modules.
> +* Erase any storage media containing boot firmware.
> +
> +Methods of last resort (USE AT YOUR OWN RISK):
> +
> +Short the following pins briefly while powering the board, so the boot ROM
> +cannot locate any boot firmware and falls back into Mask ROM mode:
> +
> +* NAND: connect pin 8 and 9 of the NAND flash with a needle.
> +* eMMC: connect the clock line to ground.

I see that in the NAND section below pins 8 and 9 need to be connected 
and that's where you got the information but is there a standard that 
makes sure all NANDs are pin-to-pin compatible? I'm wondering if it 
wouldn't make more sense to specify which pin(s) (its function for 
example) need to be connected.

On RK3588, RK3576, possibly RK3562 and other RK35xx SoCs (but not 
RK356x, likely not RK3528, ...) it's also possible to enter Mask ROM 
mode by forcing channel 0 of the SARADC to be 0V. Can always be improved 
in a later patch.

For SPI NOR, on RK3399 Puma we make sure HOLD# is below the threshold 
and thus the SoC cannot communicate with it. Can always be improved in a 
later patch.

> +
>   Flashing
>   --------
>   
> @@ -485,9 +506,9 @@ To write a U-Boot image to the SD card (assumed to be /dev/sda):
>   NAND
>   """"
>   
> -Bring device in BootROM mode:
> +Bring device in Mask ROM mode:
>   
> -If bricked and no BootROM mode shows up then connect pin 8 and 9 of the NAND flash
> +If bricked and no Mask ROM mode shows up then connect pin 8 and 9 of the NAND flash
>   with a needle while reconnecting to the USB OTG port to a PC.
>   

There's another BootROM/Mask ROM swap that's missing. For RK3066:

"""
If all other boot options fail then it enters into a BootROM mode on the 
USB OTG port.
"""

Cheers,
Quentin