[PATCH v6 11/30] drivers/dma: replace packed attributes

[Andre Muezerie <andremue@linux.microsoft.com>]

MSVC struct packing is not compatible with GCC. Replace macro
__rte_packed with __rte_packed_begin to push existing pack value
and set packing to 1-byte and macro __rte_packed_end to restore
the pack value prior to the push.

Macro __rte_packed_end is deliberately utilized to trigger a
MSVC compiler warning if no existing packing has been pushed allowing
easy identification of locations where the __rte_packed_begin is
missing.

Signed-off-by: Andre Muezerie <andremue@linux.microsoft.com>
---
 drivers/dma/dpaa/dpaa_qdma.h    | 20 ++++++++++----------
 drivers/dma/dpaa2/dpaa2_qdma.h  | 16 ++++++++--------
 drivers/dma/ioat/ioat_hw_defs.h |  3 ++-
 3 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/drivers/dma/dpaa/dpaa_qdma.h b/drivers/dma/dpaa/dpaa_qdma.h
index 91eaf1455a..579483ac34 100644
--- a/drivers/dma/dpaa/dpaa_qdma.h
+++ b/drivers/dma/dpaa/dpaa_qdma.h
@@ -119,7 +119,7 @@
 	(((fsl_qdma_engine)->block_offset) * (x))
 
 /* qDMA Command Descriptor Formats */
-struct fsl_qdma_comp_cmd_desc {
+__rte_packed_begin struct fsl_qdma_comp_cmd_desc {
 	uint8_t status;
 	uint32_t rsv0:22;
 	uint32_t ser:1;
@@ -132,9 +132,9 @@ struct fsl_qdma_comp_cmd_desc {
 	uint8_t queue:3;
 	uint8_t rsv4:3;
 	uint8_t dd:2;
-} __rte_packed;
+} __rte_packed_end;
 
-struct fsl_qdma_comp_sg_desc {
+__rte_packed_begin struct fsl_qdma_comp_sg_desc {
 	uint32_t offset:13;
 	uint32_t rsv0:19;
 	uint32_t length:30;
@@ -143,9 +143,9 @@ struct fsl_qdma_comp_sg_desc {
 	uint32_t addr_lo;
 	uint8_t addr_hi;
 	uint32_t rsv1:24;
-} __rte_packed;
+} __rte_packed_end;
 
-struct fsl_qdma_sdf {
+__rte_packed_begin struct fsl_qdma_sdf {
 	uint32_t rsv0;
 	uint32_t ssd:12;
 	uint32_t sss:12;
@@ -160,9 +160,9 @@ struct fsl_qdma_sdf {
 	uint32_t sqos:3;
 	uint32_t ns:1;
 	uint32_t srttype:4;
-} __rte_packed;
+} __rte_packed_end;
 
-struct fsl_qdma_ddf {
+__rte_packed_begin struct fsl_qdma_ddf {
 	uint32_t rsv0;
 	uint32_t dsd:12;
 	uint32_t dss:12;
@@ -177,7 +177,7 @@ struct fsl_qdma_ddf {
 	uint32_t dqos:3;
 	uint32_t ns:1;
 	uint32_t dwttype:4;
-} __rte_packed;
+} __rte_packed_end;
 
 struct fsl_qdma_df {
 	struct fsl_qdma_sdf sdf;
@@ -186,7 +186,7 @@ struct fsl_qdma_df {
 
 #define FSL_QDMA_SG_MAX_ENTRY 64
 #define FSL_QDMA_MAX_DESC_NUM (FSL_QDMA_SG_MAX_ENTRY * QDMA_QUEUE_SIZE)
-struct fsl_qdma_cmpd_ft {
+__rte_packed_begin struct fsl_qdma_cmpd_ft {
 	struct fsl_qdma_comp_sg_desc desc_buf;
 	struct fsl_qdma_comp_sg_desc desc_sbuf;
 	struct fsl_qdma_comp_sg_desc desc_dbuf;
@@ -197,7 +197,7 @@ struct fsl_qdma_cmpd_ft {
 	uint64_t phy_ssge;
 	uint64_t phy_dsge;
 	uint64_t phy_df;
-} __rte_packed;
+} __rte_packed_end;
 
 #define FSL_QDMA_ERR_REG_STATUS_OFFSET 0xe00
 
diff --git a/drivers/dma/dpaa2/dpaa2_qdma.h b/drivers/dma/dpaa2/dpaa2_qdma.h
index 0fd1debaf8..664304e1ff 100644
--- a/drivers/dma/dpaa2/dpaa2_qdma.h
+++ b/drivers/dma/dpaa2/dpaa2_qdma.h
@@ -39,7 +39,7 @@
 #define DPAA2_QDMA_BMT_DISABLE 0x0
 
 /** Source/Destination Descriptor */
-struct qdma_sdd {
+__rte_packed_begin struct qdma_sdd {
 	uint32_t rsv;
 	/** Stride configuration */
 	uint32_t stride;
@@ -85,7 +85,7 @@ struct qdma_sdd {
 			uint32_t wrttype:4;
 		} write_cmd;
 	};
-} __rte_packed;
+} __rte_packed_end;
 
 #define QDMA_SG_FMT_SDB	0x0 /* single data buffer */
 #define QDMA_SG_FMT_FDS	0x1 /* frame data section */
@@ -96,7 +96,7 @@ struct qdma_sdd {
 #define QDMA_SG_BMT_ENABLE DPAA2_QDMA_BMT_ENABLE
 #define QDMA_SG_BMT_DISABLE DPAA2_QDMA_BMT_DISABLE
 
-struct qdma_sg_entry {
+__rte_packed_begin struct qdma_sg_entry {
 	uint32_t addr_lo;		/* address 0:31 */
 	uint32_t addr_hi:17;	/* address 32:48 */
 	uint32_t rsv:15;
@@ -122,7 +122,7 @@ struct qdma_sg_entry {
 			uint32_t f:1;
 		} ctrl;
 	};
-} __rte_packed;
+} __rte_packed_end;
 
 struct dpaa2_qdma_rbp {
 	uint32_t use_ultrashort:1;
@@ -213,19 +213,19 @@ enum {
 	DPAA2_QDMA_MAX_SDD
 };
 
-struct qdma_cntx_fle_sdd {
+__rte_packed_begin struct qdma_cntx_fle_sdd {
 	struct qbman_fle fle[DPAA2_QDMA_MAX_FLE];
 	struct qdma_sdd sdd[DPAA2_QDMA_MAX_SDD];
-} __rte_packed;
+} __rte_packed_end;
 
-struct qdma_cntx_sg {
+__rte_packed_begin struct qdma_cntx_sg {
 	struct qdma_cntx_fle_sdd fle_sdd;
 	struct qdma_sg_entry sg_src_entry[RTE_DPAAX_QDMA_JOB_SUBMIT_MAX];
 	struct qdma_sg_entry sg_dst_entry[RTE_DPAAX_QDMA_JOB_SUBMIT_MAX];
 	uint16_t cntx_idx[RTE_DPAAX_QDMA_JOB_SUBMIT_MAX];
 	uint16_t job_nb;
 	uint16_t rsv[3];
-} __rte_packed;
+} __rte_packed_end;
 
 #define DPAA2_QDMA_IDXADDR_FROM_SG_FLAG(flag) \
 	((void *)(uintptr_t)((flag) - ((flag) & RTE_DPAAX_QDMA_SG_IDX_ADDR_MASK)))
diff --git a/drivers/dma/ioat/ioat_hw_defs.h b/drivers/dma/ioat/ioat_hw_defs.h
index 11893951f2..e9c3ae236e 100644
--- a/drivers/dma/ioat/ioat_hw_defs.h
+++ b/drivers/dma/ioat/ioat_hw_defs.h
@@ -52,6 +52,7 @@ extern "C" {
 #define	IOAT_DMACAP_PQ		(1 << 9)
 #define	IOAT_DMACAP_DMA_DIF	(1 << 10)
 
+__rte_packed_begin
 struct ioat_registers {
 	uint8_t		chancnt;
 	uint8_t		xfercap;
@@ -75,7 +76,7 @@ struct ioat_registers {
 	uint8_t		reserved2[0x8];	/* 0xA0 */
 	uint32_t	chanerr;	/* 0xA8 */
 	uint32_t	chanerrmask;	/* 0xAC */
-} __rte_packed;
+} __rte_packed_end;
 
 #define IOAT_CHANCMD_RESET	0x20
 #define IOAT_CHANCMD_SUSPEND	0x04
-- 
2.34.1