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Wed, 6 Aug 2025 17:15:46 +0000 (UTC) Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v5 0/7] riscv: Add support for xmipsexectl From: patchwork-bot+linux-riscv@kernel.org Message-Id: <175450054474.2863135.5887102129908490866.git-patchwork-notify@kernel.org> Date: Wed, 06 Aug 2025 17:15:44 +0000 References: <20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com> In-Reply-To: <20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com> To: Aleksa Paunovic Cc: linux-riscv@lists.infradead.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, corbet@lwn.net, palmer@sifive.com, conor@kernel.org, djordje.todorovic@htecgroup.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, conor.dooley@microchip.com, alexghiti@rivosinc.com, arikalo@gmail.com, rvishwanathan@mips.com Hello: This series was applied to riscv/linux.git (for-next) by Alexandre Ghiti : On Thu, 24 Jul 2025 17:23:24 +0200 you wrote: > This patch series adds support for the xmipsexectl vendor extension. > A new hardware probe key has also been added to allow userspace to probe for MIPS vendor extensions. > > Additionally, since the standard Zihintpause PAUSE instruction encoding is not supported on some MIPS CPUs, > an errata was implemented for replacing this instruction with the xmipsexectl MIPS.PAUSE alternative encoding. > > Signed-off-by: Aleksa Paunovic > > [...] Here is the summary with links: - [v5,1/7] dt-bindings: riscv: Add xmipsexectl ISA extension description https://git.kernel.org/riscv/c/06d48c2c4f83 - [v5,2/7] riscv: Add xmipsexectl as a vendor extension https://git.kernel.org/riscv/c/02b01dfaf4fa - [v5,3/7] riscv: Add xmipsexectl instructions https://git.kernel.org/riscv/c/d85071f97570 - [v5,4/7] riscv: hwprobe: Add MIPS vendor extension probing https://git.kernel.org/riscv/c/20b80c735c05 - [v5,5/7] riscv: hwprobe: Document MIPS xmipsexectl vendor extension https://git.kernel.org/riscv/c/c714fbc023df - [v5,6/7] riscv: Add tools support for xmipsexectl https://git.kernel.org/riscv/c/378afb53aab2 - [v5,7/7] riscv: errata: Fix the PAUSE Opcode for MIPS P8700 https://git.kernel.org/riscv/c/838218910ea3 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66095CA0EC0 for ; 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Wed, 6 Aug 2025 17:15:46 +0000 (UTC) MIME-Version: 1.0 Subject: Re: [PATCH v5 0/7] riscv: Add support for xmipsexectl From: patchwork-bot+linux-riscv@kernel.org Message-Id: <175450054474.2863135.5887102129908490866.git-patchwork-notify@kernel.org> Date: Wed, 06 Aug 2025 17:15:44 +0000 References: <20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com> In-Reply-To: <20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com> To: Aleksa Paunovic Cc: linux-riscv@lists.infradead.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, corbet@lwn.net, palmer@sifive.com, conor@kernel.org, djordje.todorovic@htecgroup.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, conor.dooley@microchip.com, alexghiti@rivosinc.com, arikalo@gmail.com, rvishwanathan@mips.com X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hello: This series was applied to riscv/linux.git (for-next) by Alexandre Ghiti : On Thu, 24 Jul 2025 17:23:24 +0200 you wrote: > This patch series adds support for the xmipsexectl vendor extension. > A new hardware probe key has also been added to allow userspace to probe for MIPS vendor extensions. > > Additionally, since the standard Zihintpause PAUSE instruction encoding is not supported on some MIPS CPUs, > an errata was implemented for replacing this instruction with the xmipsexectl MIPS.PAUSE alternative encoding. > > Signed-off-by: Aleksa Paunovic > > [...] Here is the summary with links: - [v5,1/7] dt-bindings: riscv: Add xmipsexectl ISA extension description https://git.kernel.org/riscv/c/06d48c2c4f83 - [v5,2/7] riscv: Add xmipsexectl as a vendor extension https://git.kernel.org/riscv/c/02b01dfaf4fa - [v5,3/7] riscv: Add xmipsexectl instructions https://git.kernel.org/riscv/c/d85071f97570 - [v5,4/7] riscv: hwprobe: Add MIPS vendor extension probing https://git.kernel.org/riscv/c/20b80c735c05 - [v5,5/7] riscv: hwprobe: Document MIPS xmipsexectl vendor extension https://git.kernel.org/riscv/c/c714fbc023df - [v5,6/7] riscv: Add tools support for xmipsexectl https://git.kernel.org/riscv/c/378afb53aab2 - [v5,7/7] riscv: errata: Fix the PAUSE Opcode for MIPS P8700 https://git.kernel.org/riscv/c/838218910ea3 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv