From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
<ankit.k.nautiyal@intel.com>, <intel-gfx@lists.freedesktop.org>
Cc: <matthew.s.atwood@intel.com>,
Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
Jani Nikula <jani.nikula@intel.com>
Subject: Re: [PATCH 0/3] Add WCL as subplatform from PTL
Date: Mon, 15 Sep 2025 10:52:20 -0300 [thread overview]
Message-ID: <175794434072.1613.7031699748677413383@intel.com> (raw)
In-Reply-To: <175794363121.1613.6250224933429429857@intel.com>
Quoting Gustavo Sousa (2025-09-15 10:40:31-03:00)
>Quoting Dnyaneshwar Bhadane (2025-09-11 17:55:39-03:00)
>>- Add WCL as subplatform and update the definition struct.
>>- Update condition required to distinguish WCL C10 PHY selection
>>on port B.
>
>I have added comments in individual patches. More general comments
>below:
>
>- The title of the series is a bit innacurate as it just refers to the
> prelimiary work for the final objective of the series. I would simply
> re-use the original patch's subject because (i) it would help people
> see this series as a next version (considering that you used v2) of
> the originally single-patch series; and (ii) it is more accurate
> regaring the final objective of this set of changes.
>
>- This series should also be sent to intel-xe@lists.freedesktop.org,
> since we are touching stuff related to hardware enabled in the xe
> driver.
Huh... I just realized now that this was also sent[1] to
intel-xe@lists.freedesktop.org, but as a different mail thread and has
already gotten some feedback from Jani. Usually, we sent a single series
(same thread) to both recipients (intel-gfx and intel-xe). Sending them
as separate threads is not necesary and make reviews "fragmented".
[1] https://lore.kernel.org/intel-xe/20250911210514.389014-1-dnyaneshwar.bhadane@intel.com/
>
>--
>Gustavo Sousa
>
>>
>>Dnyaneshwar Bhadane (3):
>> drm/pcids: Split PTL pciids group to make wcl subplatform
>> drm/i915/display: Add definition for wcl as subplatform
>> drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A
>>
>> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 11 ++++-------
>> drivers/gpu/drm/i915/display/intel_display_device.c | 13 +++++++++++++
>> drivers/gpu/drm/i915/display/intel_display_device.h | 4 +++-
>> drivers/gpu/drm/xe/xe_pci.c | 1 +
>> include/drm/intel/pciids.h | 4 +++-
>> 5 files changed, 24 insertions(+), 9 deletions(-)
>>
>>--
>>2.51.0
>>
next prev parent reply other threads:[~2025-09-15 13:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 20:55 [PATCH 0/3] Add WCL as subplatform from PTL Dnyaneshwar Bhadane
2025-09-11 20:55 ` [PATCH 1/3] drm/pcids: Split PTL pciids group to make wcl subplatform Dnyaneshwar Bhadane
2025-09-15 13:33 ` Gustavo Sousa
2025-09-15 13:51 ` Jani Nikula
2025-09-15 13:57 ` Gustavo Sousa
2025-09-18 12:12 ` Bhadane, Dnyaneshwar
2025-09-11 20:55 ` [PATCH 2/3] drm/i915/display: Add definition for wcl as subplatform Dnyaneshwar Bhadane
2025-09-11 20:55 ` [PATCH 3/3] drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A Dnyaneshwar Bhadane
2025-09-15 13:20 ` Gustavo Sousa
2025-09-11 21:33 ` ✗ i915.CI.BAT: failure for Add WCL as subplatform from PTL Patchwork
2025-09-15 13:40 ` [PATCH 0/3] " Gustavo Sousa
2025-09-15 13:52 ` Gustavo Sousa [this message]
2025-09-19 16:26 ` Bhadane, Dnyaneshwar
-- strict thread matches above, loose matches on Subject: below --
2025-09-11 21:05 Dnyaneshwar Bhadane
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