diff for duplicates of <1782110.RW4F1b4ZIY@en-pc05>

diff --git a/a/1.txt b/N1/1.txt
index dfe69de..c11d009 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,41 +1,39 @@
 On Tuesday, June 13, 2017 2:00:16 AM CEST Richard Zhu wrote:
 > > -----Original Message-----
-> > From: Bjorn Helgaas [mailto:helgaas@kernel.org]
+> > From: Bjorn Helgaas [mailto:helgaas at kernel.org]
 > > Sent: Tuesday, June 13, 2017 7:49 AM
 > > To: Stefan Schoefegger <stefan.schoefegger@ginzinger.com>
-> > Cc: linux-pci@vger.kernel.org; Richard Zhu <hongxing.zhu@nxp.com>; Arnd
+> > Cc: linux-pci at vger.kernel.org; Richard Zhu <hongxing.zhu@nxp.com>; Arnd
 > > Bergmann <arnd@arndb.de>; open list <linux-kernel@vger.kernel.org>;
 > > Kishon Vijay Abraham I <kishon@ti.com>; Jingoo Han
 > > <jingoohan1@gmail.com>; Bjorn Helgaas <bhelgaas@google.com>;
-> > moderated list:PCI DRIVER FOR IMX6 <linux-arm-kernel@lists.infradead.or=
-g>;
+> > moderated list:PCI DRIVER FOR IMX6 <linux-arm-kernel@lists.infradead.org>;
 > > Lucas Stach <l.stach@pengutronix.de>
 > > Subject: Re: [PATCH v2 1/1] PCI: imx6: Add pcie compliance test option
-> >=20
+> > 
 > > On Wed, Jun 07, 2017 at 01:36:11PM +0200, Stefan Schoefegger wrote:
-> > > Link speed must not be limited to gen1 during link test for complianc=
-e
+> > > Link speed must not be limited to gen1 during link test for compliance
 > > > tests
-> > >=20
+> > > 
 > > > Signed-off-by: Stefan Schoefegger <stefan.schoefegger@ginzinger.com>
 > > > ---
-> > >=20
+> > > 
 > > > Changes since v1:
 > > >  - pci-imx6.c moved to dwc directory
-> > > =20
+> > >  
 > > >  drivers/pci/dwc/Kconfig    | 10 ++++++++++
 > > >  drivers/pci/dwc/pci-imx6.c | 21 ++++++++++++---------
 > > >  2 files changed, 22 insertions(+), 9 deletions(-)
-> > >=20
+> > > 
 > > > diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig index
 > > > b7e15526d676..b6e9ced5a45d 100644
 > > > --- a/drivers/pci/dwc/Kconfig
 > > > +++ b/drivers/pci/dwc/Kconfig
 > > > @@ -77,6 +77,16 @@ config PCI_IMX6
-> > >=20
+> > > 
 > > >  	select PCIEPORTBUS
 > > >  	select PCIE_DW_HOST
-> > >=20
+> > > 
 > > > +config PCI_IMX6_COMPLIANCE_TEST
 > > > +	bool "Enable pcie compliance tests on imx6"
 > > > +	depends on PCI_IMX6
@@ -45,51 +43,44 @@ e
 > > > +	  The link speed wouldn't be limited to gen1 when enabled.
 > > > +	  Enable only during compliance tests, otherwise
 > > > +	  link detection will fail on some peripherals.
-> >=20
+> > 
 > > I'm puzzled about why we would want to merge this patch.  It looks like
-> > we're trying to game the system to make the device pass compliance test=
-ing
-> > when it isn't really compliant.  Is this config option useful to users,=
- or
+> > we're trying to game the system to make the device pass compliance testing
+> > when it isn't really compliant.  Is this config option useful to users, or
 > > is it only useful during internal development of iMX SoCs?
->=20
+> 
 > [Zhu hongxing] Agree with Bjorn. These modifications shouldn't be merged.
 > They are used for the boards used to pass the PCIe RC certification, when
 > one Standalone external OSC is used as PCIe reference clock source in the
 > boards design.
-Yes, passing gen2 compliance test is only possible with external clk. But t=
-his=20
-is a errata of imx6 pci phy of PCIe clk jitter. Why should we not be able t=
-o=20
-do gen2 tests? I think it is useful to do other gen2 tests (signal integrit=
-y)=20
+Yes, passing gen2 compliance test is only possible with external clk. But this 
+is a errata of imx6 pci phy of PCIe clk jitter. Why should we not be able to 
+do gen2 tests? I think it is useful to do other gen2 tests (signal integrity) 
 during board design.
 > > >  config PCIE_SPEAR13XX
-> > > =20
+> > >  
 > > >  	bool "STMicroelectronics SPEAr PCIe controller"
 > > >  	depends on PCI
-> > >=20
+> > > 
 > > > diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c
 > > > index 19a289b8cc94..b0fbe52e25b0 100644
 > > > --- a/drivers/pci/dwc/pci-imx6.c
 > > > +++ b/drivers/pci/dwc/pci-imx6.c
 > > > @@ -533,15 +533,18 @@ static int imx6_pcie_establish_link(struct
-> >=20
+> > 
 > > imx6_pcie *imx6_pcie)
-> >=20
+> > 
 > > >  	u32 tmp;
 > > >  	int ret;
-> > >=20
+> > > 
 > > > -	/*
-> > > -	 * Force Gen1 operation when starting the link.  In case the link i=
-s
+> > > -	 * Force Gen1 operation when starting the link.  In case the link is
 > > > -	 * started in Gen2 mode, there is a possibility the devices on the
-> > > -	 * bus will not be detected at all.  This happens with PCIe switche=
-s.
+> > > -	 * bus will not be detected at all.  This happens with PCIe switches.
 > > > -	 */
-> > > -	tmp =3D dw_pcie_readl_dbi(pci, PCIE_RC_LCR);
-> > > -	tmp &=3D ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
-> > > -	tmp |=3D PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;
+> > > -	tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR);
+> > > -	tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
+> > > -	tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;
 > > > -	dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);
 > > > +	if (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {
 > > > +		/*
@@ -98,20 +89,20 @@ s.
 > > > +		 * devices on the bus will not be detected at all.  This
 > > > +		 * happens with PCIe switches.
 > > > +		 */
-> > > +		tmp =3D dw_pcie_readl_dbi(pci, PCIE_RC_LCR);
-> > > +		tmp &=3D ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
-> > > +		tmp |=3D PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;
+> > > +		tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR);
+> > > +		tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
+> > > +		tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;
 > > > +		dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);
 > > > +	}
-> > >=20
+> > > 
 > > >  	/* Start LTSSM. */
-> > >  	if (imx6_pcie->variant =3D=3D IMX7D)
-> > >=20
+> > >  	if (imx6_pcie->variant == IMX7D)
+> > > 
 > > > --
 > > > 2.11.0
-> > >=20
-> > >=20
+> > > 
+> > > 
 > > > _______________________________________________
 > > > linux-arm-kernel mailing list
-> > > linux-arm-kernel@lists.infradead.org
+> > > linux-arm-kernel at lists.infradead.org
 > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index e03e392..bd5a5f0 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,59 +1,48 @@
  "ref\01472121518-9340-1-git-send-email-stefan.schoefegger@ginzinger.com\0"
  "ref\020170612234924.GE4379@bhelgaas-glaptop.roam.corp.google.com\0"
  "ref\0AM5PR0402MB285053130F4B1FCBF67C31998CC20@AM5PR0402MB2850.eurprd04.prod.outlook.com\0"
- "From\0Sch\303\266fegger Stefan <Stefan.Schoefegger@ginzinger.com>\0"
- "Subject\0Re: [PATCH v2 1/1] PCI: imx6: Add pcie compliance test option\0"
+ "From\0Stefan.Schoefegger@ginzinger.com (Sch\303\266fegger Stefan)\0"
+ "Subject\0[PATCH v2 1/1] PCI: imx6: Add pcie compliance test option\0"
  "Date\0Tue, 13 Jun 2017 05:55:09 +0000\0"
- "To\0Richard Zhu <hongxing.zhu@nxp.com>\0"
- "Cc\0Bjorn Helgaas <helgaas@kernel.org>"
-  linux-pci@vger.kernel.org <linux-pci@vger.kernel.org>
-  Arnd Bergmann <arnd@arndb.de>
-  open list <linux-kernel@vger.kernel.org>
-  Kishon Vijay Abraham I <kishon@ti.com>
-  Jingoo Han <jingoohan1@gmail.com>
-  Bjorn Helgaas <bhelgaas@google.com>
-  moderated list:PCI DRIVER FOR IMX6 <linux-arm-kernel@lists.infradead.org>
- " Lucas Stach <l.stach@pengutronix.de>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Tuesday, June 13, 2017 2:00:16 AM CEST Richard Zhu wrote:\n"
  "> > -----Original Message-----\n"
- "> > From: Bjorn Helgaas [mailto:helgaas@kernel.org]\n"
+ "> > From: Bjorn Helgaas [mailto:helgaas at kernel.org]\n"
  "> > Sent: Tuesday, June 13, 2017 7:49 AM\n"
  "> > To: Stefan Schoefegger <stefan.schoefegger@ginzinger.com>\n"
- "> > Cc: linux-pci@vger.kernel.org; Richard Zhu <hongxing.zhu@nxp.com>; Arnd\n"
+ "> > Cc: linux-pci at vger.kernel.org; Richard Zhu <hongxing.zhu@nxp.com>; Arnd\n"
  "> > Bergmann <arnd@arndb.de>; open list <linux-kernel@vger.kernel.org>;\n"
  "> > Kishon Vijay Abraham I <kishon@ti.com>; Jingoo Han\n"
  "> > <jingoohan1@gmail.com>; Bjorn Helgaas <bhelgaas@google.com>;\n"
- "> > moderated list:PCI DRIVER FOR IMX6 <linux-arm-kernel@lists.infradead.or=\n"
- "g>;\n"
+ "> > moderated list:PCI DRIVER FOR IMX6 <linux-arm-kernel@lists.infradead.org>;\n"
  "> > Lucas Stach <l.stach@pengutronix.de>\n"
  "> > Subject: Re: [PATCH v2 1/1] PCI: imx6: Add pcie compliance test option\n"
- "> >=20\n"
+ "> > \n"
  "> > On Wed, Jun 07, 2017 at 01:36:11PM +0200, Stefan Schoefegger wrote:\n"
- "> > > Link speed must not be limited to gen1 during link test for complianc=\n"
- "e\n"
+ "> > > Link speed must not be limited to gen1 during link test for compliance\n"
  "> > > tests\n"
- "> > >=20\n"
+ "> > > \n"
  "> > > Signed-off-by: Stefan Schoefegger <stefan.schoefegger@ginzinger.com>\n"
  "> > > ---\n"
- "> > >=20\n"
+ "> > > \n"
  "> > > Changes since v1:\n"
  "> > >  - pci-imx6.c moved to dwc directory\n"
- "> > > =20\n"
+ "> > >  \n"
  "> > >  drivers/pci/dwc/Kconfig    | 10 ++++++++++\n"
  "> > >  drivers/pci/dwc/pci-imx6.c | 21 ++++++++++++---------\n"
  "> > >  2 files changed, 22 insertions(+), 9 deletions(-)\n"
- "> > >=20\n"
+ "> > > \n"
  "> > > diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig index\n"
  "> > > b7e15526d676..b6e9ced5a45d 100644\n"
  "> > > --- a/drivers/pci/dwc/Kconfig\n"
  "> > > +++ b/drivers/pci/dwc/Kconfig\n"
  "> > > @@ -77,6 +77,16 @@ config PCI_IMX6\n"
- "> > >=20\n"
+ "> > > \n"
  "> > >  \tselect PCIEPORTBUS\n"
  "> > >  \tselect PCIE_DW_HOST\n"
- "> > >=20\n"
+ "> > > \n"
  "> > > +config PCI_IMX6_COMPLIANCE_TEST\n"
  "> > > +\tbool \"Enable pcie compliance tests on imx6\"\n"
  "> > > +\tdepends on PCI_IMX6\n"
@@ -63,51 +52,44 @@
  "> > > +\t  The link speed wouldn't be limited to gen1 when enabled.\n"
  "> > > +\t  Enable only during compliance tests, otherwise\n"
  "> > > +\t  link detection will fail on some peripherals.\n"
- "> >=20\n"
+ "> > \n"
  "> > I'm puzzled about why we would want to merge this patch.  It looks like\n"
- "> > we're trying to game the system to make the device pass compliance test=\n"
- "ing\n"
- "> > when it isn't really compliant.  Is this config option useful to users,=\n"
- " or\n"
+ "> > we're trying to game the system to make the device pass compliance testing\n"
+ "> > when it isn't really compliant.  Is this config option useful to users, or\n"
  "> > is it only useful during internal development of iMX SoCs?\n"
- ">=20\n"
+ "> \n"
  "> [Zhu hongxing] Agree with Bjorn. These modifications shouldn't be merged.\n"
  "> They are used for the boards used to pass the PCIe RC certification, when\n"
  "> one Standalone external OSC is used as PCIe reference clock source in the\n"
  "> boards design.\n"
- "Yes, passing gen2 compliance test is only possible with external clk. But t=\n"
- "his=20\n"
- "is a errata of imx6 pci phy of PCIe clk jitter. Why should we not be able t=\n"
- "o=20\n"
- "do gen2 tests? I think it is useful to do other gen2 tests (signal integrit=\n"
- "y)=20\n"
+ "Yes, passing gen2 compliance test is only possible with external clk. But this \n"
+ "is a errata of imx6 pci phy of PCIe clk jitter. Why should we not be able to \n"
+ "do gen2 tests? I think it is useful to do other gen2 tests (signal integrity) \n"
  "during board design.\n"
  "> > >  config PCIE_SPEAR13XX\n"
- "> > > =20\n"
+ "> > >  \n"
  "> > >  \tbool \"STMicroelectronics SPEAr PCIe controller\"\n"
  "> > >  \tdepends on PCI\n"
- "> > >=20\n"
+ "> > > \n"
  "> > > diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c\n"
  "> > > index 19a289b8cc94..b0fbe52e25b0 100644\n"
  "> > > --- a/drivers/pci/dwc/pci-imx6.c\n"
  "> > > +++ b/drivers/pci/dwc/pci-imx6.c\n"
  "> > > @@ -533,15 +533,18 @@ static int imx6_pcie_establish_link(struct\n"
- "> >=20\n"
+ "> > \n"
  "> > imx6_pcie *imx6_pcie)\n"
- "> >=20\n"
+ "> > \n"
  "> > >  \tu32 tmp;\n"
  "> > >  \tint ret;\n"
- "> > >=20\n"
+ "> > > \n"
  "> > > -\t/*\n"
- "> > > -\t * Force Gen1 operation when starting the link.  In case the link i=\n"
- "s\n"
+ "> > > -\t * Force Gen1 operation when starting the link.  In case the link is\n"
  "> > > -\t * started in Gen2 mode, there is a possibility the devices on the\n"
- "> > > -\t * bus will not be detected at all.  This happens with PCIe switche=\n"
- "s.\n"
+ "> > > -\t * bus will not be detected at all.  This happens with PCIe switches.\n"
  "> > > -\t */\n"
- "> > > -\ttmp =3D dw_pcie_readl_dbi(pci, PCIE_RC_LCR);\n"
- "> > > -\ttmp &=3D ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;\n"
- "> > > -\ttmp |=3D PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;\n"
+ "> > > -\ttmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR);\n"
+ "> > > -\ttmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;\n"
+ "> > > -\ttmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;\n"
  "> > > -\tdw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);\n"
  "> > > +\tif (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {\n"
  "> > > +\t\t/*\n"
@@ -116,22 +98,22 @@
  "> > > +\t\t * devices on the bus will not be detected at all.  This\n"
  "> > > +\t\t * happens with PCIe switches.\n"
  "> > > +\t\t */\n"
- "> > > +\t\ttmp =3D dw_pcie_readl_dbi(pci, PCIE_RC_LCR);\n"
- "> > > +\t\ttmp &=3D ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;\n"
- "> > > +\t\ttmp |=3D PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;\n"
+ "> > > +\t\ttmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR);\n"
+ "> > > +\t\ttmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;\n"
+ "> > > +\t\ttmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;\n"
  "> > > +\t\tdw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);\n"
  "> > > +\t}\n"
- "> > >=20\n"
+ "> > > \n"
  "> > >  \t/* Start LTSSM. */\n"
- "> > >  \tif (imx6_pcie->variant =3D=3D IMX7D)\n"
- "> > >=20\n"
+ "> > >  \tif (imx6_pcie->variant == IMX7D)\n"
+ "> > > \n"
  "> > > --\n"
  "> > > 2.11.0\n"
- "> > >=20\n"
- "> > >=20\n"
+ "> > > \n"
+ "> > > \n"
  "> > > _______________________________________________\n"
  "> > > linux-arm-kernel mailing list\n"
- "> > > linux-arm-kernel@lists.infradead.org\n"
+ "> > > linux-arm-kernel at lists.infradead.org\n"
  > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-e57d3564a502042fb0be44d6fe20ea67fac9cc468f5c97bc9ac6c5530de25f32
+35210583ed50dee2bb327aaca9a90c87884ff83607c09da892a013158f28c5da
