diff for duplicates of <1787243.JuNJAuBqMb@avalon> diff --git a/a/1.txt b/N1/1.txt index 90b51c6..8c027de 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -24,7 +24,7 @@ On Thursday, 26 April 2018 19:53:40 EEST Kieran Bingham wrote: > resets = <&cpg 615>; > }; > -> + vspb: vsp@fe960000 { +> + vspb: vsp at fe960000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfe960000 0 0x8000>; > + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; @@ -35,14 +35,14 @@ On Thursday, 26 April 2018 19:53:40 EEST Kieran Bingham wrote: > + renesas,fcp = <&fcpvb0>; > + }; > + -> fcpvb0: fcp@fe96f000 { +> fcpvb0: fcp at fe96f000 { > compatible = "renesas,fcpv"; > reg = <0 0xfe96f000 0 0x200>; > @@ -1017,6 +1028,17 @@ > resets = <&cpg 607>; > }; > -> + vspi0: vsp@fe9a0000 { +> + vspi0: vsp at fe9a0000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfe9a0000 0 0x8000>; > + interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; @@ -53,14 +53,14 @@ On Thursday, 26 April 2018 19:53:40 EEST Kieran Bingham wrote: > + renesas,fcp = <&fcpvi0>; > + }; > + -> fcpvi0: fcp@fe9af000 { +> fcpvi0: fcp at fe9af000 { > compatible = "renesas,fcpv"; > reg = <0 0xfe9af000 0 0x200>; > @@ -1025,6 +1047,17 @@ > resets = <&cpg 611>; > }; > -> + vspd0: vsp@fea20000 { +> + vspd0: vsp at fea20000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfea20000 0 0x4000>; @@ -75,14 +75,14 @@ covering the entire space (0x8000) even if no LUT or CLU module is present. > + renesas,fcp = <&fcpvd0>; > + }; > + -> fcpvd0: fcp@fea27000 { +> fcpvd0: fcp at fea27000 { > compatible = "renesas,fcpv"; > reg = <0 0xfea27000 0 0x200>; > @@ -1033,6 +1066,17 @@ > resets = <&cpg 603>; > }; > -> + vspd1: vsp@fea28000 { +> + vspd1: vsp at fea28000 { > + compatible = "renesas,vsp2"; > + reg = <0 0xfea28000 0 0x4000>; @@ -100,7 +100,7 @@ Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > + renesas,fcp = <&fcpvd1>; > + }; > + -> fcpvd1: fcp@fea2f000 { +> fcpvd1: fcp at fea2f000 { > compatible = "renesas,fcpv"; > reg = <0 0xfea2f000 0 0x200>; diff --git a/a/content_digest b/N1/content_digest index ad0a599..825a2b2 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,20 +1,9 @@ "ref\020180426165346.494-1-kieran.bingham+renesas@ideasonboard.com\0" "ref\020180426165346.494-12-kieran.bingham+renesas@ideasonboard.com\0" - "From\0Laurent Pinchart <laurent.pinchart@ideasonboard.com>\0" - "Subject\0Re: [PATCH 11/17] arm64: dts: r8a77965: Add VSP instances\0" + "From\0laurent.pinchart@ideasonboard.com (Laurent Pinchart)\0" + "Subject\0[PATCH 11/17] arm64: dts: r8a77965: Add VSP instances\0" "Date\0Fri, 27 Apr 2018 00:11:05 +0300\0" - "To\0Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>\0" - "Cc\0linux-renesas-soc@vger.kernel.org" - Takeshi Kihara <takeshi.kihara.df@renesas.com> - Simon Horman <horms@verge.net.au> - Magnus Damm <magnus.damm@gmail.com> - Rob Herring <robh+dt@kernel.org> - Mark Rutland <mark.rutland@arm.com> - Catalin Marinas <catalin.marinas@arm.com> - Will Deacon <will.deacon@arm.com> - open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS <devicetree@vger.kernel.org> - moderated list:ARM64 PORT (AARCH64 ARCHITECTURE) <linux-arm-kernel@lists.infradead.org> - " open list <linux-kernel@vger.kernel.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Kieran,\n" @@ -43,7 +32,7 @@ "> \t\t\tresets = <&cpg 615>;\n" "> \t\t};\n" "> \n" - "> +\t\tvspb: vsp@fe960000 {\n" + "> +\t\tvspb: vsp at fe960000 {\n" "> +\t\t\tcompatible = \"renesas,vsp2\";\n" "> +\t\t\treg = <0 0xfe960000 0 0x8000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -54,14 +43,14 @@ "> +\t\t\trenesas,fcp = <&fcpvb0>;\n" "> +\t\t};\n" "> +\n" - "> \t\tfcpvb0: fcp@fe96f000 {\n" + "> \t\tfcpvb0: fcp at fe96f000 {\n" "> \t\t\tcompatible = \"renesas,fcpv\";\n" "> \t\t\treg = <0 0xfe96f000 0 0x200>;\n" "> @@ -1017,6 +1028,17 @@\n" "> \t\t\tresets = <&cpg 607>;\n" "> \t\t};\n" "> \n" - "> +\t\tvspi0: vsp@fe9a0000 {\n" + "> +\t\tvspi0: vsp at fe9a0000 {\n" "> +\t\t\tcompatible = \"renesas,vsp2\";\n" "> +\t\t\treg = <0 0xfe9a0000 0 0x8000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -72,14 +61,14 @@ "> +\t\t\trenesas,fcp = <&fcpvi0>;\n" "> +\t\t};\n" "> +\n" - "> \t\tfcpvi0: fcp@fe9af000 {\n" + "> \t\tfcpvi0: fcp at fe9af000 {\n" "> \t\t\tcompatible = \"renesas,fcpv\";\n" "> \t\t\treg = <0 0xfe9af000 0 0x200>;\n" "> @@ -1025,6 +1047,17 @@\n" "> \t\t\tresets = <&cpg 611>;\n" "> \t\t};\n" "> \n" - "> +\t\tvspd0: vsp@fea20000 {\n" + "> +\t\tvspd0: vsp at fea20000 {\n" "> +\t\t\tcompatible = \"renesas,vsp2\";\n" "> +\t\t\treg = <0 0xfea20000 0 0x4000>;\n" "\n" @@ -94,14 +83,14 @@ "> +\t\t\trenesas,fcp = <&fcpvd0>;\n" "> +\t\t};\n" "> +\n" - "> \t\tfcpvd0: fcp@fea27000 {\n" + "> \t\tfcpvd0: fcp at fea27000 {\n" "> \t\t\tcompatible = \"renesas,fcpv\";\n" "> \t\t\treg = <0 0xfea27000 0 0x200>;\n" "> @@ -1033,6 +1066,17 @@\n" "> \t\t\tresets = <&cpg 603>;\n" "> \t\t};\n" "> \n" - "> +\t\tvspd1: vsp@fea28000 {\n" + "> +\t\tvspd1: vsp at fea28000 {\n" "> +\t\t\tcompatible = \"renesas,vsp2\";\n" "> +\t\t\treg = <0 0xfea28000 0 0x4000>;\n" "\n" @@ -119,7 +108,7 @@ "> +\t\t\trenesas,fcp = <&fcpvd1>;\n" "> +\t\t};\n" "> +\n" - "> \t\tfcpvd1: fcp@fea2f000 {\n" + "> \t\tfcpvd1: fcp at fea2f000 {\n" "> \t\t\tcompatible = \"renesas,fcpv\";\n" "> \t\t\treg = <0 0xfea2f000 0 0x200>;\n" "\n" @@ -129,4 +118,4 @@ "\n" Laurent Pinchart -bdb0a3b2b05c150bbd2263ca5abcb6e2a5d6cb59fd41fb30826db6e8bad7d254 +1f27fea0a7e9c647dbb63441566a8f7ff1680295aadccef02bf32e585bf1d59a
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