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charset="utf-8" Content-Transfer-Encoding: base64 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org VGhhbmsgeW91IGZvciB5b3VyIGNvbnRyaWJ1dGlvbiEgU2FzaGlrbyBBSSByZXZpZXcgZm91bmQg bW9yZSBzZXZlcmUKaXNzdWUocykgaW4gb3RoZXIgcGF0Y2hlcyBvZiB0aGlzIHNlcmllcy4gVGhp cyBtYWlsIGlzIG9ubHkgYW4gRllJLCBpbiBjYXNlCnlvdSB3YW50IHRvIGFkZHJlc3MgdGhlIG5p dCBwaWNrcyBiZWxvdyB3aGVuIHlvdSByZXNwaW4uCgpMb3cgcHJpb3JpdHkgLyBuaXQgcGlja3Mg Zm9yIHlvdXIgY29uc2lkZXJhdGlvbjoKCi0gW0xvd10gVGhlIG5ldyBiaW5kaW5nCiAgRG9jdW1l bnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL25ldC9wY3Mvcm9ja2NoaXAscmszNTY4LXhwY3Mu eWFtbOKApgoKLS0KCmR0LWJpbmRpbmdzOiBuZXQ6IHBjczogYWRkIHJvY2tjaGlwLHJrMzU2OC14 cGNzIHN1cHBvcnQKClRoaXMgYWRkcyBhIG5ldyBiaW5kaW5nIGZvciB0aGUgU3lub3BzeXMgRGVz aWduV2FyZSBYUENTIG9uIHRoZSBSb2NrY2hpcApSSzM1NjggU29DLiBUaGUgWFBDUyBzaXRzIG9u IHRoZSBBUEIzIGJ1cywgY29ubmVjdHMgdG8gYSBOYW5lbmcgQ29tYm8KU2VyRGVzIFBIWSwgYW5k IGV4cG9zZXMgZm91ciBNSUkgcG9ydHMgYXMgZXRoZXJuZXQtcGNzLW1paUBOIGNoaWxkIG5vZGVz LgpUaGUgY29tbWl0IG1lc3NhZ2Ugc2F5cyB0aGUgQ1JVIHJlc2V0IGxpbmVzIGFyZSBsZWZ0IG91 dCBvbiBwdXJwb3NlLgoKPiBkaWZmIC0tZ2l0IGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2Jp bmRpbmdzL25ldC9wY3Mvcm9ja2NoaXAscmszNTY4LXhwY3MueWFtbCBiL0RvY3VtZW50YXRpb24v ZGV2aWNldHJlZS9iaW5kaW5ncy9uZXQvcGNzL3JvY2tjaGlwLHJrMzU2OC14cGNzLnlhbWwKPiBu ZXcgZmlsZSBtb2RlIDEwMDY0NAo+IGluZGV4IDAwMDAwMDAwMDAwMDAuLjcwM2ZjZmYwZTNmNzAK PiAtLS0gL2Rldi9udWxsCj4gKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdz L25ldC9wY3Mvcm9ja2NoaXAscmszNTY4LXhwY3MueWFtbAoKWyAuLi4gXQoKPiArICBwaHlzOgo+ ICsgICAgbWF4SXRlbXM6IDEKPiArCj4gKyAgcGh5LW5hbWVzOgo+ICsgICAgY29uc3Q6IHNlcmRl cwo+ICsKPiArICBwb3dlci1kb21haW5zOgo+ICsgICAgbWF4SXRlbXM6IDEKPiArCgpbIC4uLiBd Cgo+ICtyZXF1aXJlZDoKPiArICAtIGNvbXBhdGlibGUKPiArICAtIHJlZwo+ICsgIC0gIiNhZGRy ZXNzLWNlbGxzIgo+ICsgIC0gIiNzaXplLWNlbGxzIgo+ICsgIC0gY2xvY2tzCj4gKyAgLSBjbG9j ay1uYW1lcwo+ICsgIC0gcGh5cwo+ICsgIC0gcGh5LW5hbWVzCj4gKyAgLSBwb3dlci1kb21haW5z Cj4gKwo+ICthZGRpdGlvbmFsUHJvcGVydGllczogZmFsc2UKCltTZXZlcml0eTogTG93XQpTaG91 bGQgdGhpcyBiaW5kaW5nIGRlc2NyaWJlIHRoZSBYUENTIHJlc2V0IGlucHV0cz8gVGhlIENSVSBi aW5kaW5nCmhlYWRlciBhbHJlYWR5IGhhcyBmb3VyIHJlc2V0IElEcyBmb3IgdGhpcyBibG9jazoK CmluY2x1ZGUvZHQtYmluZGluZ3MvY2xvY2svcmszNTY4LWNydS5oOgojZGVmaW5lIFNSU1RfWFBD UwkJMTUwCiNkZWZpbmUgU1JTVF9YUENTX1RYX0RJVjEwCTE1MQojZGVmaW5lIFNSU1RfWFBDU19S WF9ESVYxMAkxNTIKI2RlZmluZSBTUlNUX1hQQ1NfWEdYU19SWAkxNTMKClRoZSBjb21taXQgbWVz c2FnZSBnaXZlcyB0aGlzIHJlYXNvbiBmb3IgbGVhdmluZyB0aGVtIG91dDoKCiAgVGhlIENSVSBy ZXNldCBsaW5lcyAoU1JTVF9YUENTKikgYXJlIGludGVudGlvbmFsbHkgbm90IGRlc2NyaWJlZDog bm8KICBpbi10cmVlIHVzZXIgcmVxdWVzdHMgdGhlbSwgYW5kIGJyaW5nLXVwIHJlbGllcyBvbiB0 aGUgUERfUElQRSBwb3dlcgogIGRvbWFpbiwgdGhlIFNlckRlcyBQSFkgYW5kIHRoZSBpbi1JUCBz b2Z0IHJlc2V0LgoKVGhhdCByZWFzb24gaXMgYmFzZWQgb24gd2hhdCBkcml2ZXJzIHVzZSB0b2Rh eSwgbm90IG9uIHdoYXQgdGhlIGhhcmR3YXJlCmhhcy4gRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVl L2JpbmRpbmdzL3dyaXRpbmctYmluZGluZ3MucnN0IHNheXM6CgogIERPIGF0dGVtcHQgdG8gbWFr ZSBiaW5kaW5ncyBjb21wbGV0ZSBldmVuIGlmIGEgZHJpdmVyIGRvZXNuJ3Qgc3VwcG9ydAogIHNv bWUgZmVhdHVyZXMuCgpUaGUgc2NoZW1hIGhhcyBubyByZXNldHMgb3IgcmVzZXQtbmFtZXMgcHJv cGVydHkgYW5kIGVuZHMgd2l0aAphZGRpdGlvbmFsUHJvcGVydGllczogZmFsc2UuIEEgRFQgdGhh dCBmdWxseSBkZXNjcmliZXMgdGhlIGhhcmR3YXJlIHdpdGgKc29tZXRoaW5nIGxpa2UgcmVzZXRz ID0gPCZjcnUgU1JTVF9YUENTPiwgLi4uIHdvdWxkIHRoZW4gZmFpbApkdF9iaW5kaW5nX2NoZWNr IGFuZCBkdGJzX2NoZWNrLgoKVGhlIGluLUlQIHNvZnQgcmVzZXQgYWxzbyBvbmx5IGFjdHMgaW5z aWRlIHRoZSBQQ1MgcmVnaXN0ZXIgYmxvY2suIEl0CmRvZXMgbm90IGFwcGVhciB0byBjb3ZlciB0 aGUgVFgvUlggZGl2MTAgb3IgWEdYUyBSWCByZXNldCBkb21haW5zLgoKQ291bGQgcmVzZXRzIGFu ZCByZXNldC1uYW1lcyBiZSBhZGRlZCBub3csIGV2ZW4gYXMgb3B0aW9uYWwgcHJvcGVydGllcz8K Ck9uIGEgcmVsYXRlZCBwb2ludCB0aGF0IEkgaGF2ZSBub3QgYmVlbiBhYmxlIHRvIGNvbmZpcm06 IHRoZSBnZW5lcmljCnNucHMsZHcteHBjcyBiaW5kaW5nIGRvY3VtZW50cyBhbiBzYmRfaW50cl9v IGludGVycnVwdHMgb3V0cHV0LCBhbmQKYWRkaXRpb25hbFByb3BlcnRpZXM6IGZhbHNlIGFsc28g cmVqZWN0cyB0aGF0IGhlcmUuIERvZXMgUkszNTY4IHJvdXRlCnRoYXQgaW50ZXJydXB0IHRvIHRo ZSBHSUM/IElmIGl0IGRvZXMsIHNob3VsZCBpbnRlcnJ1cHRzIGJlIGxpc3RlZCB0b28/CgotLSAK U2FzaGlrbyBBSSByZXZpZXcgwrcgaHR0cHM6Ly9uZXRkZXYtYWkuYm90cy5saW51eC5kZXYvc2Fz aGlrby8jL3BhdGNoc2V0LzIwMjYxMDA1MjIzMDExLjExMjQzNDctMS1jb2lhcHJhbnQlNDBnbWFp bC5jb20KCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkxp bnV4LXJvY2tjaGlwIG1haWxpbmcgbGlzdApMaW51eC1yb2NrY2hpcEBsaXN0cy5pbmZyYWRlYWQu b3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtcm9j a2NoaXAK From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 189AA37DEBE; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZrIv3h6u" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9AE031F000FF; Thu, 8 Oct 2026 16:32:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1791477172; bh=vOmhtgpp0CunsN7e7nTP80xujGK1hi9KxA+e2Q5Bid0=; h=Subject:From:To:Cc:Date:In-Reply-To:References; b=ZrIv3h6uHbT7jpD/++Tbd99EhBLTIXx/iEToD8YKEUGJ0YmDpGUOCBe/rAwePrP4P c6k5m/VX+1k1bl2eyzFSrOgzXFnU6c0BmHT9Og0C3Jsfm1fx8W7zQTJW0vbTTjqcxO wWh/txaYR7j5Doys2nX9VEs0xXBeR/ZbW6LgWaDMrrce+qqRTvNwg1XmWptLAxT8yG 4yjEcVBi4j+T9pARmbJgo57sxe69VrDvEGdLQ/R8iJ2qytGwtYh8g7OyZaoRYvaf5F dexO212QCB14qQ6+ncvh02ME0vMaIUlD45Afl3ciXJvbVYtse6Gh5I3Mget2wpJOyi Et45NHqzkBCoA== Subject: Re: [PATCH net-next v10 1/6] dt-bindings: net: pcs: add rockchip,rk3568-xpcs support From: netdev-bot+sashiko@kernel.org To: coiaprant@gmail.com Cc: kuba@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, maxime.chevallier@bootlin.com, hkallweit1@gmail.com, linux@armlinux.org.uk, david.wu@rock-chips.com, netdev@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Thu, 08 Oct 2026 16:32:51 +0000 Message-ID: <179147717113.434549.5384797662065196680@kernel.org> In-Reply-To: <20261005223011.1124347-2-coiaprant@gmail.com> References: <20261005223011.1124347-2-coiaprant@gmail.com> X-sashiko-severity: Low Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Thank you for your contribution! Sashiko AI review found more severe issue(s) in other patches of this series. This mail is only an FYI, in case you want to address the nit picks below when you respin. Low priority / nit picks for your consideration: - [Low] The new binding Documentation/devicetree/bindings/net/pcs/rockchip,rk3568-xpcs.yaml… -- dt-bindings: net: pcs: add rockchip,rk3568-xpcs support This adds a new binding for the Synopsys DesignWare XPCS on the Rockchip RK3568 SoC. The XPCS sits on the APB3 bus, connects to a Naneng Combo SerDes PHY, and exposes four MII ports as ethernet-pcs-mii@N child nodes. The commit message says the CRU reset lines are left out on purpose. > diff --git a/Documentation/devicetree/bindings/net/pcs/rockchip,rk3568-xpcs.yaml b/Documentation/devicetree/bindings/net/pcs/rockchip,rk3568-xpcs.yaml > new file mode 100644 > index 0000000000000..703fcff0e3f70 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/pcs/rockchip,rk3568-xpcs.yaml [ ... ] > + phys: > + maxItems: 1 > + > + phy-names: > + const: serdes > + > + power-domains: > + maxItems: 1 > + [ ... ] > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" > + - clocks > + - clock-names > + - phys > + - phy-names > + - power-domains > + > +additionalProperties: false [Severity: Low] Should this binding describe the XPCS reset inputs? The CRU binding header already has four reset IDs for this block: include/dt-bindings/clock/rk3568-cru.h: #define SRST_XPCS 150 #define SRST_XPCS_TX_DIV10 151 #define SRST_XPCS_RX_DIV10 152 #define SRST_XPCS_XGXS_RX 153 The commit message gives this reason for leaving them out: The CRU reset lines (SRST_XPCS*) are intentionally not described: no in-tree user requests them, and bring-up relies on the PD_PIPE power domain, the SerDes PHY and the in-IP soft reset. That reason is based on what drivers use today, not on what the hardware has. Documentation/devicetree/bindings/writing-bindings.rst says: DO attempt to make bindings complete even if a driver doesn't support some features. The schema has no resets or reset-names property and ends with additionalProperties: false. A DT that fully describes the hardware with something like resets = <&cru SRST_XPCS>, ... would then fail dt_binding_check and dtbs_check. The in-IP soft reset also only acts inside the PCS register block. It does not appear to cover the TX/RX div10 or XGXS RX reset domains. Could resets and reset-names be added now, even as optional properties? On a related point that I have not been able to confirm: the generic snps,dw-xpcs binding documents an sbd_intr_o interrupts output, and additionalProperties: false also rejects that here. Does RK3568 route that interrupt to the GIC? If it does, should interrupts be listed too? -- Sashiko AI review · https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20261005223011.1124347-1-coiaprant%40gmail.com