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Wed, 1 Jul 2026 13:14:12 +0200 (CEST) Content-Type: multipart/alternative; boundary=Apple-Mail-A9834DA5-6F3E-44C3-B813-B52DCA8C1CC2 Content-Transfer-Encoding: 7bit From: Christian Zigotzky X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list Mime-Version: 1.0 (1.0) Subject: Re: [PATCH] Connecting the SB600's i8259 controller rather in pasemi's pci.c than in pasemi's setup.c. Date: Wed, 1 Jul 2026 13:14:02 +0200 Message-Id: <179DBFE9-ACE5-4842-AF33-ACCA2B0D8C6D@xenosoft.de> References: <20260701105501.2093-1-chzigotzky@xenosoft.de> Cc: Darren Stevens , "R.T.Dickinson" , hypexed@yahoo.com.au In-Reply-To: <20260701105501.2093-1-chzigotzky@xenosoft.de> To: Christian Zigotzky , Krzysztof Kozlowski , Madhavan Srinivasan , Michael Ellerman , linux-kernel@vger.kernel.org, Nicholas Piggin , linuxppc-dev@lists.ozlabs.org, Christophe Leroy X-Mailer: iPhone Mail (23F84) --Apple-Mail-A9834DA5-6F3E-44C3-B813-B52DCA8C1CC2 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable The Nemo board [1] doesn=E2=80=99t boot without this patch. Darren explained= it really well: Originally we initialised the PCI-e ports in setup arch, this is quite early= , and it seems uses some kernel functions that were not recommended (They ch= anged a whole lot of different platforms at the same time for the same reaso= n) After this we added the ISA bridge, then the kernel would init the IRQ conto= llers. The patch that broke booting on the X1000 moved the pas_pci_init to a node i= n the machine description, where it called later in the boot sequence. Unfor= tunately this is after we've tried to add the i8259 contoller from the pas_i= nit_IRQ. Since our ISA bridge can't be found until we've connected the PCI-e= ports the system tries to write to registers that aren't yet mapped - resul= t a kernel panic, but before console I/O has been initialised so it appears t= o be a hang. We had a similar problem when they were introducing Radix suppo= rt. My patch changes our code so that it works with the new kernel code in place= . Basically I moved the code that adds the i8259 cascade to after we've scan= ned for the ISA bridge where I know it will work. Hopefully this makes sense, shout out if it doesn't Regards Darren [1] https://en.wikipedia.org/wiki/AmigaOne_X1000 > On 01 July 2026 at 12:55 pm, Christian Zigotzky w= rote : >=20 > =EF=BB=BF "pas_pci_init" was before "nemo_init_IRQ". > Now "pas_pci_init" is after "nemo_init_IRQ" in the official kernel source > code. > I think "pas_pci_init" scans (discovers) the PCI(e) devices > and after that, "nemo_init_IRQ" assigns interrupt numbers > to these devices if required. > It's not possible to assigns interrupt numbers to PCI(e) devices > which have not been discovered yet. >=20 > Signed-off-by: Christian Zigotzky > --- > arch/powerpc/platforms/pasemi/pci.c | 7 +++++++ > arch/powerpc/platforms/pasemi/setup.c | 7 ++++--- > 2 files changed, 11 insertions(+), 3 deletions(-) >=20 > diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/= pasemi/pci.c > index 2df955274652..7208c325bfc5 100644 > --- a/arch/powerpc/platforms/pasemi/pci.c > +++ b/arch/powerpc/platforms/pasemi/pci.c > @@ -25,6 +25,8 @@ >=20 > #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (of= f)) >=20 > +extern void nemo_init_IRQ(void); > + > static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset) > { > /* Device 0 Function 0 is special: It's config space spans function 1 a= s > @@ -265,6 +267,11 @@ static int __init pas_add_bridge(struct device_node *= dev) > */ > isa_bridge_find_early(hose); >=20 > + /* > + * ISA bridge is now active, add the i8259 cascade (if needed) > + */ > + nemo_init_IRQ(); > + > return 0; > } >=20 > diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platform= s/pasemi/setup.c > index d03b41336901..eec74611be46 100644 > --- a/arch/powerpc/platforms/pasemi/setup.c > +++ b/arch/powerpc/platforms/pasemi/setup.c > @@ -214,10 +214,12 @@ static void sb600_8259_cascade(struct irq_desc *desc= ) > chip->irq_eoi(&desc->irq_data); > } >=20 > -static void __init nemo_init_IRQ(struct mpic *mpic) > +void nemo_init_IRQ(void) > { > struct device_node *np; > int gpio_virq; > + struct mpic *mpic; > + > /* Connect the SB600's legacy i8259 controller */ > np =3D of_find_node_by_path("/pxp@0,e0000000"); > i8259_init(np, 0); > @@ -228,6 +230,7 @@ static void __init nemo_init_IRQ(struct mpic *mpic) > irq_set_chained_handler(gpio_virq, sb600_8259_cascade); > mpic_unmask_irq(irq_get_irq_data(gpio_virq)); >=20 > + mpic =3D irq_get_chip_data(gpio_virq); > irq_set_default_domain(mpic->irqhost); > } >=20 > @@ -298,8 +301,6 @@ static __init void pas_init_IRQ(void) > mpic_unmask_irq(irq_get_irq_data(nmi_virq)); > } >=20 > - nemo_init_IRQ(mpic); > - > of_node_put(mpic_node); > of_node_put(root); > } > -- > 2.55.0.windows.1 >=20 --Apple-Mail-A9834DA5-6F3E-44C3-B813-B52DCA8C1CC2 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: quoted-printable

The Nemo board [1] d= oesn=E2=80=99t boot without this patch. Darren explained it really well:

Originally we initialised the PCI-e ports in setup arc= h, this is quite early, and it seems uses some kernel functions that were no= t recommended (They changed a whole lot of different platforms at the same t= ime for the same reason)

After this we added the IS= A bridge, then the kernel would init the IRQ contollers.

The patch that broke booting on the X1000 moved the pas_pci_init to a n= ode in the machine description, where it called later in the boot sequence. U= nfortunately this is after we've tried to add the i8259 contoller from the p= as_init_IRQ. Since our ISA bridge can't be found until we've connected the P= CI-e ports the system tries to write to registers that aren't yet mapped - r= esult a kernel panic, but before console I/O has been initialised so it appe= ars to be a hang. We had a similar problem when they were introducing Radix s= upport.

My patch changes our code so that it works w= ith the new kernel code in place. Basically I moved the code that adds the i= 8259 cascade to after we've scanned for the ISA bridge where I know it will w= ork.

Hopefully this makes sense, shout out if it do= esn't

Regards
Darren

=

=
On 01 July 2026 at 12:55 pm, Christian Zigotzky &l= t;chzigotzky@xenosoft.de> wrote :

=EF=BB=BF "pas_pci_init" was before "nem= o_init_IRQ".
Now "pas_pci_init" is after "nemo_init_IRQ" in= the official kernel source
code.
I think "= pas_pci_init" scans (discovers) the PCI(e) devices
and afte= r that, "nemo_init_IRQ" assigns interrupt numbers
to these d= evices if required.
It's not possible to assigns interrupt n= umbers to PCI(e) devices
which have not been discovered yet= .

Signed-off-by: Christian Zigotzky <chz= igotzky@xenosoft.de>
---
arch/powerpc/pl= atforms/pasemi/pci.c   | 7 +++++++
arch/powerpc/p= latforms/pasemi/setup.c | 7 ++++---
2 files changed, 11 ins= ertions(+), 3 deletions(-)

diff --git a/arc= h/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index 2df955274652..7208c325bfc5 100644
--- a/arc= h/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platform= s/pasemi/pci.c
@@ -25,6 +25,8 @@

= #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) &= lt;< 12) | (off))

+extern void nemo_init= _IRQ(void);
+
static inline int pa_pxp_offs= et_valid(u8 bus, u8 devfn, int offset)
{
&= nbsp;  /* Device 0 Function 0 is special: It's config space spans funct= ion 1 as
@@ -265,6 +267,11 @@ static int __init pas_add_brid= ge(struct device_node *dev)
    */
   isa_bridge_find_early(hose);

+    /*
+     * ISA bridge is now ac= tive, add the i8259 cascade (if needed)
+     */
+    nemo_init_IRQ();
+
<= span>    return 0;
}

= diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/plat= forms/pasemi/setup.c
index d03b41336901..eec74611be46 100644=
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -214,10 +214= ,12 @@ static void sb600_8259_cascade(struct irq_desc *desc)
   chip->irq_eoi(&desc->irq_data);
}=

-static void __init nemo_init_IRQ(struct m= pic *mpic)
+void nemo_init_IRQ(void)
{
   struct device_node *np;
  &= nbsp;int gpio_virq;
+    struct mpic *mpic;=
+
   /* Connect the SB600's legacy i82= 59 controller */
   np =3D of_find_node_by_path(= "/pxp@0,e0000000");
   i8259_init(np, 0);=
@@ -228,6 +230,7 @@ static void __init nemo_init_IRQ(struct mpic *= mpic)
   irq_set_chained_handler(gpio_virq, sb60= 0_8259_cascade);
   mpic_unmask_irq(irq_get_irq_= data(gpio_virq));

+    mpic =3D i= rq_get_chip_data(gpio_virq);
   irq_set_default_= domain(mpic->irqhost);
}

@@ -298,8 +301,6 @@ static __init void pas_init_IRQ(void)
=        mpic_unmask_irq(irq_get_irq_data(nmi_virq));
   }

-   &nb= sp;nemo_init_IRQ(mpic);
-
   of_= node_put(mpic_node);
   of_node_put(root);
}
--
2.55.0.windows.1
= --Apple-Mail-A9834DA5-6F3E-44C3-B813-B52DCA8C1CC2--