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Mon, 27 Jun 2022 14:26:00 +0000 (GMT) Received: from [9.145.155.49] (unknown [9.145.155.49]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 27 Jun 2022 14:26:00 +0000 (GMT) Message-ID: <17ed3c2d-b2ef-0716-039e-527db996da73@linux.ibm.com> Date: Mon, 27 Jun 2022 16:26:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: Pierre Morel , qemu-s390x@nongnu.org Cc: qemu-devel@nongnu.org, borntraeger@de.ibm.com, pasic@linux.ibm.com, richard.henderson@linaro.org, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, mst@redhat.com, pbonzini@redhat.com, kvm@vger.kernel.org, ehabkost@redhat.com, marcel.apfelbaum@gmail.com, eblake@redhat.com, armbru@redhat.com, seiden@linux.ibm.com, nrb@linux.ibm.com References: <20220620140352.39398-1-pmorel@linux.ibm.com> <20220620140352.39398-4-pmorel@linux.ibm.com> From: Janosch Frank Subject: Re: [PATCH v8 03/12] s390x/cpu_topology: implementating Store Topology System Information In-Reply-To: <20220620140352.39398-4-pmorel@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: tvIAohccUGOVF7z6SuNfayVxAtg53xoc X-Proofpoint-GUID: pM3NBI_0GHb13OZnwRC5igGEe9aFNFzi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-06-27_06,2022-06-24_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 suspectscore=0 bulkscore=0 priorityscore=1501 spamscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 mlxlogscore=804 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206270062 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 6/20/22 16:03, Pierre Morel wrote: s390x/cpu_topology: Add STSI function code 15 handling > The handling of STSI is enhanced with the interception of the > function code 15 for storing CPU topology. s/interception/handling/ > > Using the objects built during the plugging of CPU, we build the > SYSIB 15_1_x structures. > > With this patch the maximum MNEST level is 2, this is also > the only level allowed and only SYSIB 15_1_2 will be built. > > Signed-off-by: Pierre Morel > +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) > +{ > + const MachineState *machine = MACHINE(qdev_get_machine()); > + void *p; > + int ret; > + > + /* > + * Until the SCLP STSI Facility reporting the MNEST value is used, > + * a sel2 value of 2 is the only value allowed in STSI 15.1.x. > + */ > + if (sel2 != 2) { > + setcc(cpu, 3); > + return; > + } > + > + p = g_malloc0(TARGET_PAGE_SIZE); > + > + setup_stsi(machine, p, 2); > + > + if (s390_is_pv()) { > + ret = s390_cpu_pv_mem_write(cpu, 0, p, TARGET_PAGE_SIZE); > + } else { > + ret = s390_cpu_virt_mem_write(cpu, addr, ar, p, TARGET_PAGE_SIZE); > + } For later reference: FCs over 3 are rejected by SIE for PV guests via cc 3. I currently don't know if and when that will be changed but I'll ask around. > + > + setcc(cpu, ret ? 3 : 0); > + g_free(p); > +} > + > diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c > index 7bd8db0e7b..563bf5ac60 100644 > --- a/target/s390x/kvm/kvm.c > +++ b/target/s390x/kvm/kvm.c > @@ -51,6 +51,7 @@ > #include "hw/s390x/s390-virtio-ccw.h" > #include "hw/s390x/s390-virtio-hcall.h" > #include "hw/s390x/pv.h" > +#include "hw/s390x/cpu-topology.h" > > #ifndef DEBUG_KVM > #define DEBUG_KVM 0 > @@ -1918,6 +1919,10 @@ static int handle_stsi(S390CPU *cpu) > /* Only sysib 3.2.2 needs post-handling for now. */ > insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); > return 0; > + case 15: > + insert_stsi_15_1_x(cpu, run->s390_stsi.sel2, run->s390_stsi.addr, > + run->s390_stsi.ar); > + return 0; > default: > return 0; > } > diff --git a/target/s390x/meson.build b/target/s390x/meson.build > index 84c1402a6a..890ccfa789 100644 > --- a/target/s390x/meson.build > +++ b/target/s390x/meson.build > @@ -29,6 +29,7 @@ s390x_softmmu_ss.add(files( > 'sigp.c', > 'cpu-sysemu.c', > 'cpu_models_sysemu.c', > + 'cpu_topology.c', > )) > > s390x_user_ss = ss.source_set()