From: Arnd Bergmann <arnd@arndb.de>
To: Kevin Cernekee <cernekee@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Ralf Baechle <ralf@linux-mips.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Maxime Bizon <mbizon@freebox.fr>, Jonas Gorski <jogo@openwrt.org>,
Linux MIPS Mailing List <linux-mips@linux-mips.org>
Subject: Re: [PATCH 10/11] irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers
Date: Thu, 30 Oct 2014 10:10:03 +0100 [thread overview]
Message-ID: <1819614.RKinL4RR5c@wuerfel> (raw)
In-Reply-To: <CAJiQ=7D+QhFjg7mR49KE2Lu1SC72djBLhbv4sC37tSTga+BVCQ@mail.gmail.com>
On Wednesday 29 October 2014 16:22:31 Kevin Cernekee wrote:
>
> This uses one domain per bcm7120-l2 DT node. If the DT node defines
> multiple enable/status pairs (i.e. >=64 IRQs) then the driver will
> create a single IRQ domain with 2+ generic chips.
>
> Multiple generic chips are required because the generic-chip code can
> only handle one enable/status register pair per instance.
>
Makes sense. Just make sure you have that explanation in the patch
description.
Arnd
next prev parent reply other threads:[~2014-10-30 9:10 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-29 3:58 [PATCH 01/11] irqchip: Allow irq_reg_{readl,writel} to use __raw_{readl_writel} Kevin Cernekee
2014-10-29 3:58 ` [PATCH 02/11] irqchip: brcmstb-l2: Eliminate dependency on ARM code Kevin Cernekee
2014-10-29 7:29 ` Arnd Bergmann
2014-10-29 7:29 ` Arnd Bergmann
2014-10-29 16:53 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 03/11] irqchip: bcm7120-l2: Eliminate bad IRQ check Kevin Cernekee
2014-10-29 16:53 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 04/11] irqchip: Remove ARM dependency for bcm7120-l2 and brcmstb-l2 Kevin Cernekee
2014-10-29 7:44 ` Arnd Bergmann
2014-10-29 16:53 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 05/11] irqchip: bcm7120-l2: Make sure all register accesses use base+offset Kevin Cernekee
2014-10-29 7:46 ` Arnd Bergmann
2014-10-29 7:56 ` Arnd Bergmann
2014-10-29 16:53 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 06/11] irqchip: bcm7120-l2: Use irq_reg_* accessors Kevin Cernekee
2014-10-29 7:46 ` Arnd Bergmann
2014-10-29 16:54 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 07/11] irqchip: brcmstb-l2: " Kevin Cernekee
2014-10-29 7:46 ` Arnd Bergmann
2014-10-29 7:46 ` Arnd Bergmann
2014-10-29 16:54 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 08/11] irqchip: bcm7120-l2: Fix missing nibble in gc->unused mask Kevin Cernekee
2014-10-29 7:47 ` Arnd Bergmann
2014-10-29 16:55 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 09/11] irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functions Kevin Cernekee
2014-10-29 16:55 ` Florian Fainelli
2014-10-29 16:55 ` Florian Fainelli
2014-10-29 3:58 ` [PATCH 10/11] irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers Kevin Cernekee
2014-10-29 7:53 ` Arnd Bergmann
2014-10-29 23:22 ` Kevin Cernekee
2014-10-30 9:10 ` Arnd Bergmann [this message]
2014-10-29 3:58 ` [PATCH 11/11] irqchip: Decouple bcm7120-l2 from brcmstb-l2 Kevin Cernekee
2014-10-29 7:55 ` Arnd Bergmann
2014-10-29 16:56 ` Florian Fainelli
2014-10-29 7:43 ` [PATCH 01/11] irqchip: Allow irq_reg_{readl,writel} to use __raw_{readl_writel} Arnd Bergmann
2014-10-29 17:36 ` Florian Fainelli
2014-10-29 19:14 ` Arnd Bergmann
2014-10-29 19:14 ` Arnd Bergmann
2014-10-29 18:48 ` Kevin Cernekee
2014-10-29 19:10 ` Thomas Gleixner
2014-10-29 19:14 ` Arnd Bergmann
2014-10-29 20:09 ` Kevin Cernekee
2014-10-29 21:13 ` Arnd Bergmann
2014-10-29 21:31 ` Thomas Gleixner
2014-10-29 21:41 ` Arnd Bergmann
2014-10-29 21:50 ` Thomas Gleixner
2014-10-29 23:05 ` Kevin Cernekee
2014-10-30 9:58 ` Arnd Bergmann
2014-10-30 19:03 ` Kevin Cernekee
2014-10-30 19:03 ` Kevin Cernekee
2014-10-30 19:52 ` Arnd Bergmann
2014-10-30 20:54 ` Kevin Cernekee
2014-10-30 21:18 ` Arnd Bergmann
2014-10-30 21:18 ` Arnd Bergmann
2014-10-29 10:12 ` Thomas Gleixner
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